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ECE211 Question Bank With Answer

The document provides information about the ECE211 Linear Integrated Electronics course offered at a university. It includes the course syllabus, objectives, outcomes and question bank with answers. The course covers topics like integrated circuit concepts, operational amplifiers, filters, voltage regulators, waveform generators, PLL, A/D and D/A converters. It aims to enable students to explain IC fabrication and analog circuits, analyze and design applications using op-amps, filters, regulators and understand data converters. The course is core and includes sessional exams, assignments and end semester exam for evaluation.

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0% found this document useful (0 votes)
328 views101 pages

ECE211 Question Bank With Answer

The document provides information about the ECE211 Linear Integrated Electronics course offered at a university. It includes the course syllabus, objectives, outcomes and question bank with answers. The course covers topics like integrated circuit concepts, operational amplifiers, filters, voltage regulators, waveform generators, PLL, A/D and D/A converters. It aims to enable students to explain IC fabrication and analog circuits, analyze and design applications using op-amps, filters, regulators and understand data converters. The course is core and includes sessional exams, assignments and end semester exam for evaluation.

Uploaded by

maanip85
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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ECE211 – LINEAR INTEGRATED ELECTRONICS

Question Bank with Answer

Academic year (2017 -2018) EVEN Semester

Bachelor of Technology (Electronics and Communication Engineering)

II Year / IV Semester

Prepared by: Mr. P. Manikandan (Course Coordinator)


University Vision University Mission

To be a Centre of Excellence of To Produce Technically Competent, Socially Committed


International Repute in Education and Technocrats and Administrators through Quality
Research. Education and Research

ELECTRONICS AND COMMUNICATION ENGINEERING DEPARTMENT

Vision Mission
To become an internationally leading ●To provide quality education in the domain of Electronics
centre of higher learning and research and Communication Engineering through periodically
in the domain of Electronics and updated curriculum, effective teaching learning process, best
Communication Engineering of breed laboratory facilities and collaborative ventures with
the industries
●To inculcate innovative skills, research aptitude, team-
work, ethical practices among students so as to meet
expectations of the industry as well as society

B.TECH. E.C.E. PROGRAMME EDUCATIONAL OBJECTIVES


Within a few years of obtaining an undergraduate degree in Electronics and Communication
Engineering, the students will be able to:
PEO1: Technical Proficiency:
● Succeed in obtaining employment appropriate to their interests, education and will become
productive and valued engineers within their companies
PEO2: Professional Growth:
● Continue to develop professionally through life-long learning, higher education, and other
creative pursuits in their areas of expertise or interest
PEO3: Management Skills:
● Exercise leadership (management) qualities in a responsive, ethical, and innovative
manner

B.TECH. E.C.E. PROGRAMME SPECIFIC OUTCOMES


At the end of the programme, the students will be able to:
PSO1: Knowledge: Apply the knowledge of engineering and basic sciences to design,
develop, test components and systems for applications including Signal Processing, VLSI
Design, Embedded, Communication Engineering and Networking
PSO2: Skills: Solve the complex engineering problems, using latest techniques, tools, along
with the needed skills with an understanding of societal, environmental, safety, legal and
cultural impacts of the solution
PSO3: Attitude: Apply the contextual knowledge of engineering to function effectively as
an individual or a leader in multidisciplinary environments
B.TECH. E.C.E. PROGRAMME OUTCOMES (R2013)

At the end of the programme, the students will be able to:


PO1:Apply knowledge of Mathematics, Science, Engineering fundamentals and
specialisation in Electronics and Communication Engineering to the conceptualisation of
Engineering models
PO2:Identify, formulate and solve complex problems in the domains of analog/digital
electronics, signal processing and communication engineering, reaching substantiated
conclusions using first principles of Mathematics and Engineering Sciences
PO3:Design/develop Microprocessor, Microcontroller based systems, Communication and
Networking systems, Algorithms for signal processing and VLSI circuit components to meet
desired specifications with realistic constraints such as manufacturability and sustainability
PO4:Design and conduct experiments in analog/digital systems, signal processing and
communication and networking systems, analyse and interpret data, and synthesise
information to provide valid conclusions using simulation techniques and/or numerical
methods, graphics
PO5:Select and apply necessary engineering instruments, equipment’s, like Digital Storage
Oscilloscope, Microprocessors and Microcontrollers, DSP and FPGA kits, and modern CAD
tools, for Digital Signal Processing, Communication Engineering, Networking and VLSI
Engineering practices with an understanding of their limitations
PO6:Apply reasoning informed by the contextual knowledge to assess societal, safety, legal
and cultural issues, and the consequent responsibilities relevant to the professional
engineering practice
PO7:Demonstrate the knowledge of contemporary issues in the field of Electronics and
Communication Engineering
PO8: Commit to professional ethics and responsibilities and norms of engineering practice
PO9:Work effectively as an individual, and also as a member or leader in multicultural and
multidisciplinary teams
PO10:Effectively communicate about their field of expertise on their activities, with their
peer and society at large, such as, being able to comprehend and write effective reports and
design documentation, make effective presentations
PO11:Manage projects by applying gained knowledge on Engineering and Management
principles
PO12:Adapt themselves completely to the demands of the Electronics and Communication-
related Engineering by life-long learning
SYLLABUS
ECE211 LINEAR INTEGRATED ELECTRONICS L T P C

3 1 0 4
INTEGRATED CIRCUIT, AMPLIFIER CONCEPTS
IC Classification – IC Fabrication –Integrated transistors – Monolithic (solid state) diodes, resistors,
capacitors, inductors – FET ICs – CMOS ICs –Transistor as switches, Current sources/sinks –Emitter-
Follower, Darlington pair, Differential amplifiers, Active loading, output stage, Level shifting
II OPERATIONAL AMPLIFIER
Ideal Op-amp –- Practical Op-amp – General Op-amp – Classification of op-amps - DC and AC
characteristics - Frequency compensation – Open loop, Closed loop op-amp configurations –Voltage
follower, Summing amplifier, Differencing amplifier, Instrumentation amplifier, Integrator,
Differentiator, Logarithmic amplifier, Analog computation, precision Rectifiers - Op-amp comparators
–comparator Applications.
III FILTERS, VOLTAGE REGULATORS
Comparison between active and passive filters – Design of LPF, HPF, BPF, BSF, All-pass filter, state
variable filters– Basics of voltage regulators – Linear voltage regulators using op-amp – IC voltage
regulators (78xx, 79xx) – IC 723 Regulators
IV WAVEFORM GENERATORS, PLL
Multi vibrators, Triangular wave generator, Sine wave generators, saw-tooth wave generator –555
Timer and its applications –Basic principles of PLL – VCO – IC VCO 566, LPF – Monolithic PLL-
IC565 – Applications of PLL IC 565
V A/D CONVERTERS, D/A CONVERTERS
Analog and Digital Interface Circuits – D/A converters – weighted resistor DAC - R-2R ladder DAC –
inverted R-2R ladder DAC –multiplying DAC – monolithic DAC - A/D Converters- direct type ADC –
parallel comparator ADC – counter type ADC – successive approximation ADC – change balancing
ADC – dual slope – Advanced Op-amps: CMOS op-amp
TEXT BOOKS
1. D. Roy Choudhury, Shail B. Jain, Linear Integrated Circuits, New Age, 4 Edition, 2012
th

2. S Salivahanan, Y. S. Kanchana Bhaskaran, Linear Integrated Circuits, TMH, 2011


3. S. P. Bali, Linear Integrated Circuits, TMH, 2008
4. William D Stanley, Operational amplifiers with Linear Integrated Circuits, Pearson, 4 Edition
th

REFERENCES
1. Gayakwad, Ramakant A., OP-Amps and Linear Integrated Circuits, PHI, 4 Edition, 2009
th

2. Sergio Franco, Design with Op-Amps and Analog Integrated Circuits, TMH, 3 Edition, 2002
rd

3. David A Johns, Ken Martin, Analog Integrated Circuit Design, Wiley India, 4 Edition, 2009
th

4. Texas Instruments, Op amps for everyone, e-book


COURSE OUTCOMES:
At the end of the course, the students will be able to
1.Explain fabrication and realisation of IC, analog sub circuits and various differential amplifiers.
2.Infer the DC and AC characteristics of operational amplifiers and design the linear and non-linear
applications using Op-amp.
3. Analyse and design of filters and voltage regulators.
4. Analyse basic working principle, operation and its application of waveform generators, PLL.
5. Classify and comprehend the working principle of data converters, advanced Operational Amplifiers
COURSE TYPE: Core-Theory
WEIGHTAGE:
Sessional Examinations Assignment End Semester Examination (Theory)

40% 10% 50%


UNIT I
INTEGRATED CIRCUIT AND AMPLIFIER CONCEPTS

1. Define an Integrated circuit.(Remember)


An integrated circuit(IC) is a miniature, low cost electronic circuit consisting of active and passive
components fabricated together on a single crystal of silicon. The active components are
transistors and diodes and passive components are resistors and capacitors.

2. Mention the advantages of integrated circuits over discrete components. (Understand


*Miniaturisation and hence increased equipment density.
*Cost reduction due to batch processing.
*Increased system reliability due to the elimination of soldered joints.
*Improved functional performance.
*Matched devices.
*Increased operating speeds.
*Reduction in power consumption.

3. Define sheet resistance.


Sheet resistance is defined as the resistance in ohms /square offered by the diffused area.

4. What is the use of buried n+ layer in monolithic IC transistor?


The buried n+ layer provides a low resistance path in the active collector region for the flow of
current.

5. What are the two common methods for obtaining integrated capacitors?
• Monolithic junction capacitor
•Thin-flim capacitor.

6.What are the basic processes involved in fabricating ICs using planar technology?
1.Silicon wafer (substrate) preparation
2.Epitaxial growth
3.Oxidation
4.Photolithography
5.Diffusion
6.Ion implantation
7.Isolation technique
8.Metallization
9.Assembly processing & packaging

7. What is active load? Where it is used and why?


The active load realized using current source in place of the passive load in the collector arm of
differential amplifier makes it possible to achieve high voltage gain without requiring large power supply
voltage.

8. List out the steps used in the preparation of Si – wafers.


1.Crystal growth & doping
2.Ingot trimming & grinding
3.Ingot slicing
4.Wafer policing & etching
5.Wafer cleaning.

9. What is lithography?
Lithography is a process by which the pattern appearing on the mask is transferred to the wafer.It involves
two steps: the first step requires applying a few drops of photoresist to the surface of the wafer & the
second step is spinning the surface to get an even coating of the photoresist across the surface of the
wafer.

10. What are the different types of lithography? What is optical lithography?
The different types of lithography are :
1. Photolithography 2.Electron beam lithography 3. X ray beam lithography 4.Ion beam lithography
Optical lithography:
Optical lithography comprises the formation images with visible or UV radiation in a photoresist using
contact, proximity or projection printing.

11. What are the two processes involved in photolithography?


a) Making a photographic mask
b) Photo etching
The development of photographic mask involves the preparation of initial artwork and its reduction,
decomposition of initial artwork or layout into several mask layers. Photo etching is used for the removal
of SiO2 from desired regions so that the desired impurities
can be diffuse.

12. What are the two important properties of SiO2?


1. SiO2 is an extremely hard protective coating & is unaffected by almost all reagents except by
hydrochloric acid. Thus it stands against any contamination.
2. By selective etching of SiO2, diffusion of impurities through carefully defined windows in the SiO2
can be accomplished to fabricate various components.

13. Why aluminium is preferred for metallization?


*It is a good conductor.
*it is easy to deposit aluminium films using vacuum deposition.
*It makes good mechanical bonds with silicon.
*It forms a low resistance contact.

14 .Define virtual ground of OP-Amp?


A virtual ground is a ground which acts like a ground. It is a point that is at the fixed ground potential
(0v),though it is not practically connected to the actual ground or common terminal of the circuit.

15. What are the advantages and limitations implantation of ion implantation?
Advantages:
• Accurate control over doping
• Very good reproducibility
• Precise resistance value
• A room temperature process
Limitations:
• Annealing at higher temperature is required for avoiding the crystal damage
• The possibility of dopant implanting through various layers of wafer.

16. Define CMRR of an op-amp.


The relative sensitivity of an op-amp to a difference signal as compared to a common mode signal
is called the common –mode rejection ratio. It is expressed in decibels. CMRR= Ad/Ac

17.What are the applications of current sources?


Transistor current sources are widely used in analog ICs both as biasing elements and as load
devices for amplifier stages.
18. Justify the reasons for using current sources in integrated circuits.
(i) Superior insensitivity of circuit performance to power supply variations and temperature.
(ii) More economical than resistors in terms of die area required to provide bias currents of small
value.
(iii) When used as load element, the high incremental resistance of current source results in high
voltage gain at low supply voltages.

19. What is the advantage of widlar current source over constant current source?
Using constant current source output current of small magnitude(microamp range) is not attainable
due to the limitations in chip area. Widlar current source is useful for obtaining small output
currents.Sensitivity of widlar current source is less compared to constant current source.

20.Mention the advantages of Wilson current source.


(i) Provides high output resistance.
(ii) Offers low sensitivity to transistor base currents.

Part-B
1. Explain the construction of monolithic bipolar transistor, monolithic diode and integrated
resistors.
Construction of monolithic bipolar transistor
The fabrication of a monolithic transistor includes the following steps.
1. Epitaxial growth
2. Oxidation
3. Photolithography
4. Isolation diffusion
5. Base diffusion
6. Emitter diffusion
7. Contact mask
8. Aluminium metallization
9. Passivation
The letters P and N in the figures refer to type of doping, and a minus (-) or plus (+) with P and N
indicates lighter or heavier doping respectively.
1. Epitaxial growth:
The first step in transistor fabrication is creation of the collector region. We normally require a low
resistivity path for the collector current. This is due to the fact that, the collector contact is normally
taken at the top, thus increasing the collector series resistance and the VCE(Sat) of the device.

The higher collector resistance is reduced by a process called buried layer as shown in figure. In
this arrangement, a heavily doped ‗N‘ region is sandwiched between the N-type epitaxial layer and
P – type substrate. This buried N+ layer provides a low resistance path in the active collector region
to the collector contact C. In effect, the buried layer provides a low resistance shunt path for the
flow of current.
For fabricating an NPN transistor, we begin with a P-type silicon substrate having a resistivity of
typically 1Ω-cm, corresponding to an acceptor ion concentration of 1.4 * 1015 atoms/cm3 . An
oxide mask with the necessary pattern for buried layer diffusion is prepared. This is followed by
masking and etching the oxide in the buried layer mask. The N-type buried layer is now diffused
into the substrate. A slow-diffusing material such as arsenic or antimony is used, so that the buried
layer will stay-put during subsequent diffusions. The junction depth is typically a few microns,
with sheet resistivity of around 20Ω per square. Then, an epitaxial layer of lightly doped N-silicon
is grown on the P-type substrate by placing the wafer in the furnace at 12000 C and introducing a
gas containing phosphorus (donor impurity). The resulting structure is shown in figure.
The subsequent diffusions are done in this epitaxial layer. All active and passive components
are formed on the thin N-layer epitaxial layer grown over the P-type substrate. Obtaining an
epitaxial layer of the proper thickness and doping with high crystal quality is perhaps the most
formidable challenge in bipolar device processing.
2. Oxidation:
As shown in figure, a thin layer of silicon dioxide (SiO2) is grown over the N-type layer by
exposing the silicon wafer to an oxygen atmosphere at about 10000 C.

3. Photolithography:

The prime use of photolithography in IC manufacturing is to selectively etch or remove the SiO2
layer. As shown in figure, the surface of the oxide is first covered with a thin uniform layer of
photosensitive emulsion (Photo resist). The mask, a black and white negative of the requied pattern,
is placed over the structure. When exposed to ultraviolet light, the photo resist under the transparent
region of the mask becomes poly-merized. The mask is then removed and the wafer is treated
chemically that removes the unexposed portions of the photoresist film. The polymerized region is
cured so that it becomes resistant to corrosion. Then the chip is dipped in an etching solution of
hydrofluoric acid which removes the oxide layer not protected by the polymerized photoresist. This
creates openings in the SiO2 layer through which P-type or N-type impurities can be diffused using
the isolation diffusion process as shown in figure. After diffusion of impurities, the polymerized
photoresist is removed with sulphuric acid and by a mechanical abrasion process.
4. Isolation Diffusion:
The integrated circuit contains many devices. Since a number of devices are to be fabricated on the
same IC chip, it becomes necessary to provide good isolation between various components and
their interconnections.
The most important techniques for isolation are:
1. PN junction Isolation
2. Dielectric Isolation
In PN junction isolation technique, the P+ type impurities are selectively diffused into the N-type
epitaxial layer so that it touches the P-type substrate at the bottom. This method generated N-type
isolation regions surrounded by P-type moats. If the P-substrate is held at the most negative
potential, the diodes will become reverse-biased, thus providing isolation between these islands.
The individual components are fabricated inside these islands. This method is very economical,
and is the most commonly used isolation method for general purpose integrated circuits.

In dielectric isolation method, a layer of solid dielectric such as silicon dioxide or ruby surrounds
each component and this dielectric provides isolation. The isolation is both physical and electrical.
This method is very expensive due to additional processing steps needed and this is mostly used
for fabricating IC‘s required for special application in military and aerospace.
The PN junction isolation diffusion method is shown in figure. The process take place in a furnace
using boron source. The diffusion depth must be atleast equal to the epitaxial thickness in order to
obtain complete isolation. Poor isolation results in device failures as all transistors might get
shorted together. The N-type island shown in figure forms the collector region of the NPN
transistor. The heavily doped P-type regions marked P+ are the isolation regions for the active and
passive components that will be formed in the various N-type islands of the epitaxial layer.
5 Base diffusion:
Formation of the base is a critical step in the construction of a bipolar transistor. The base must be
aligned, so that, during diffusion, it does not come into contact with either the isolation region or
the buried layer. Frequently, the base diffusion step is also used in parallel to fabricate diffused
resistors for the circuit. The value of these resistors depends on the diffusion conditions and the
width of the opening made during etching. The base width influences the transistor parameters very
strongly. Therefore, the base junction depth and resistivity must be tightly controlled. The base
sheet resistivity should be fairly high (200- 500Ω per square) so that the base does not inject carriers
into the emitter. For NPN transistor, the base is diffused in a furnace using a boron source. The
diffusion process is done in two steps, pre deposition of dopants at 9000 C and driving them in at
about 12000 C. The drive-in is done in an oxidizing ambience, so that oxide is grown over the base
region for subsequent fabrication steps. Figure shows that P-type base region of the transistor
diffused in the N-type island (collector region) using photolithography and isolation diffusion
processes.
6. Emitter Diffusion:
Emitter Diffusion is the final step in the fabrication of the transistor. The emitter opening must lie
wholly within the base. Emitter masking not only opens windows for the emitter, but also for the
contact point, which provides a low resistivity ohmic contact path for the emitter terminal.
The emitter diffusion is normally a heavy N-type diffusion, producing low-resistivity layer
that can inject charge easily into the base. A Phosphorus source is commonly used so that the
diffusion time id shortened and the previous layers do not diffuse further. The emitter is diffused
into the base, so that the emitter junction depth very closely approaches the base junction depth.
The active base is then a P-region between these two junctions which can be made very narrow by
adjusting the emitter diffusion time. Various diffusion and drive in cycles can be used to fabricate
the emitter. The Resistivity of the emitter is usually not too critical.
The N-type emitter region of the transistor diffused into the P-type base region is shown below.
However, this is not needed to fabricate a resistor where the resistivity of the P-type base region
itself will serve the purpose. In this way, an NPN transistor and a resistor are fabricated
simultaneously.
7. Contact Mask:
After the fabrication of emitter, windows are etched into the N-type regions where contacts are to
be made for collector and emitter terminals. Heavily concentrated phosphorus N+ dopant is
diffused into these regions simultaneously.
The reasons for the use of heavy N+ diffusion is explained as follows: Aluminium, being a
good conductor used for interconnection, is a P-type of impurity when used with silicon.
Therefore, it can produce an unwanted diode or rectifying contact with the lightly doped N material.
Introducing a high concentration of N+ dopant caused the Si lattice at the surface semi-metallic.
Thus the N+ layer makes a very good ohmic contact with the Aluminium layer. This is done by the
oxidation, photolithography and isolation diffusion processes.
8. Metallization:
The IC chip is now complete with the active and passive devices, and the metal leads are to
be formed for making connections with the terminals of the devices. Aluminium is deposited over
the entire wafer by vacuum deposition. The thickness for single layer metal is 1μ m. Metallization
is carried out by evaporating aluminium over the entire surface and then selectively etching away
aluminium to leave behind the desired interconnection and bonding pads as shown in figure.
Metallization is done for making interconnection between the various components fabricated in an
IC and providing bonding pads around the circumference of the IC chip for later connection of
wires
9. Passivation/ Assembly and Packaging:
Metallization is followed by passivation, in which an insulating and protective layer is deposited
over the whole device. This protects it against mechanical and chemical damage during subsequent
processing steps. Doped or undoped silicon oxide or silicon nitride, or some combination of them,
are usually chosen for passivation of layers. The layer is deposited by chemical vapour deposition
(CVD) technique at a temperature low enough not to harm the metallization.
Monolithic diodes
The diode used in integrated circuits are made using transistor structures in one of the five possible
connections. The three most popular structures are shown in figure. The diode is obtained from a
transistor structure using one of the following structures.
1. The emitter-base diode, with collector short circuited to the base.
2. The emitter-base diode with the collector open and
3. The collector –base diode, with the emitter open-circuited.
The choice of the diode structure depends on the performance and application desired. Collector
base diodes have higher collector-base arrays breaking rating, and they are suitable for common
cathode diode arrays diffused within a single isolation island. The emitter-base diffusion is very
popular for the fabrication of diodes, provided the reverse-voltage requirement of the circuit does
not exceed the lower base-emitter breakdown voltage.

Integrated Resistors:
A resistor in a monolithic integrated circuit is obtained by utilizing the bulk resistivity of
the diffused volume of semiconductor region. The commonly used methods for fabricating
integrated resistors are 1. Diffused 2. epitaxial 3. Pinched and 4. Thin film techniques.
Diffused Resistor:
The diffused resistor is formed in any one of the isolated regions of epitaxial layer during base or
emitter diffusion processes. This type of resistor fabrication is very economical as it runs in parallel
to the bipolar transistor fabrication. The N-type emitter diffusion and P-type base diffusion are
commonly used to realize the monolithic resistor.
The diffused resistor has a severe limitation in that, only small valued resistors can be fabricated.
The surface geometry such as the length, width and the diffused impurity profile determine the
resistance value. The commonly used parameter for defining this resistance is called the sheet
resistance. It is defined as the resistance in ohms/square offered by the diffused area.
In the monolithic resistor, the resistance value is expressed by
R = Rs 1/w where R= resistance offered (in ohms)
Rs = sheet resistance of the particular fabrication process involved (in ohms/square)
l = length of the diffused area and
w = width of the diffused area.
The sheet resistance of the base and emitter diffusion in 200Ω/Square and 2.2Ω/square respectively.
For example, an emitter-diffused strip of 2mil wide and 20 mil long will offer a resistance of 22Ω.
For higher values of resistance, the diffusion region can be formed in a zig-zag fashion resulting in
larger effective length. The poly silicon layer can also be used for resistor realization.

Epitaxial Resistor:

The N-epitaxial layer can be used for realizing large resistance values. The figure shows the cross
sectional view of the epitaxial resistor formed in the epitaxial layer between the two N+ aluminium
metal contacts.
Pinched resistor:

The sheet resistance offered by the diffusion regions can be increased by narrowing down
its cross-sectional area. This type of resistance is normally achieved in the base region. Figure
shows a pinched base diffused resistor. It can offer resistance of the order of mega ohms in a
comparatively smaller area. In the structure shown, no current can flow in the N-type material since
the diode realized at contact 2 is biased in reversed direction. Only very small reverse saturation
current can flow in conduction path for the current has been reduced or pinched. Therefore, the
resistance between the contact 1 and 2 increases as the width narrows down and hence it acts as a
pinched resistor.
Thin film resistor:

The thin film deposition technique can also be used for the fabrication of monolithic
resistors. A very thin metallic film of thickness less than 1μm is deposited on the silicon dioxide
layer by vapour deposition techniques. Normally, Nichrome (NiCr) is used for this process. Desired
geometry is achieved using masked etching processes to obtain suitable value of resistors. Ohmic
contacts are made using aluminium metallization as discussed in earlier sections.
The cross-sectional view of a thin film resistor as shown in figure. Sheet resistances of 40
to 400Ω/ square can be easily obtained in this method and thus 20kΩ to 50kΩ values are very
practical.
The advantages of thin film resistors are as follows:
1. They have smaller parasitic components which makes their high frequency behaviour
good.
2. The thin film resistor values can be very minutely controlled using laser trimming.
3. They have low temperature coefficient of resistance and this makes them more stable.
The thin film resistor can be obtained by the use of tantalum deposited over silicon dioxide layer.
The main disadvantage of thin film resistor is that its fabrication requires additional processing
steps.

2. Explain the monolithic IC manufacturing process for a circuit which consists of Transistor,
diode,resistor and capacitor.
To know the basics a sample circuit must be considered to be converted to its monolithic form. With basic
components like resistor, diode, and transistor a basic circuit is first made.
With the basic circuit, the different layers for the monolithic IC are then considered. The basic structure
of a monolithic IC will have 4 layers of different materials. The base layer will be a P-type silicon layer
and is named as the substrate layer. This layer will have a typical thickness of 200 micrometer. Silicon
is the preferred semiconductor for the P-type and N-type layer because of its favourable characteristics
for the manufacturing of an IC.
The layer above the substrate P-type silicon layer is the N-type layer. All the active and passive
components required for the circuit are fabricated onto this layer. This layer has a typical thickness of
25 micrometer. The N-type silicon material is grown as a single crystal extension of the P-layer and the
components are required are fabricated using series of P-type and N-type impurity diffusions. The N-
type layer becomes the collector for the transistor or an element for a diode or a capacitor.

Basic Monolithic IC
The layer above N-type is made of silicon dioxide (SiO2) material. Since there is a selective P-type and
N-type impurity diffusion going on in the second layer, this layer acts as a barrier in the process. This
layer is etched away from the region where diffusion is desired to be permitted with photolithographic
process. The rest of the wafer remains protected against diffusion. This layer also protects the silicon
layer from contamination.
The up-most layer is that made of aluminium. This metallic layer is used to provide interconnections
between the different components used in the IC.

Monolithic IC Manufacturing Process


For the manufacture and production of the monolithic IC, all circuit components and their
interconnections are to be formed in a single thin wafer. The different processes carried out for achieving
this are explained below.
1. P-layer Substrate Manufacture
Being the base layer of the IC, the P-type is silicon is first built for the IC. A silicon crystal of P-type is
grown in dimensions of 250mm length and 25mm diameter. The silicon is then cut into thin slices with
high precision using a diamond saw. Each wafer will precisely have a thickness of 200 micrometer and
a diameter of 25 mm. These thin slices are termed wafers. These wafers may be circular or rectangular
in shape with respect to the shape of the IC. After cutting hundreds of them each wafer is polished and
cleaned to form a P-type substrate layer.

2. N-type Epitaxial Growth


The epitaxial groth process of a low resistive N-type over a high resistive P-type is to be carried out. This
is done by placing the n-type layer on top of the P-type and heating then inside a diffusion furnace at
very high temperature (nearly 1200C). After heating, a gas mixture f Silicon atoms and pentavalent atoms
are also passed over the layer. This forms the epitaxial layer on the substrate. All the components required
for the circuit are built on top of this layer. The layer is then cooled down, polished and cleaned.

3. The Silicon Dioxide Insulation Layer


As explained above, this layer is required contamination of the N-layer epitaxy. This layer is only 1
micrometer thin and is grown by exposing the epitaxial layer to oxygen atmosphere at 1000C. A detailed
image showing the P-type, N-type epitaxial layer and SiO2 layer is given below.
Monolithic IC-Substrates and Layers

4. Photolithographic Process for SiO2


To diffuse the impurities with the N-type epitaxial region, the silicon dioxide layer has to be etched in
selected areas. Thus openings must be brought at these areas through photolithographic process. In this
process, the SiO2 layer is coated with a thin layer of a photosensitive material called photoresist. A large
black and white pattern is made in the desired patter, where the black pattern represents the area of
opening and white represents the area that is left idle. This pattern is reduced in size and fit to the layer,
above the photoresist. The whole layer is then exposed to ultraviolet light. Due to the exposure, the
photoresist right below the white pattern becomes polymerized. The pattern is then removed and the
wafer is developed using a chemical like trichloroethylene. The chemical dissolves the unpolymerized
portion of the photoresist film and leaves the surface. The oxide not covered by polymerised photoresist
is then removed by immersing the chip in an etching solution of HCl. Those portions of the Si02 which
are protected by the photoresist remain unaffected by the acid. After the etching and diffusion process,
with the help of chemical solvents like sulphuric acid, the resist mask is then removed by mechanical
abrasion. The appropriate impurities are then diffused through oxide free windows.

Monolithic IC - Photolithographic-Process

5. Isolation Diffusion
After photolithographic process the remaining SiO2 layer serves as a mask for the diffusion of acceptor
impurities. To get a proper time period for allowing a P-type impurity to penetrate into the N-type
epitaxial layer, isolation diffusion is to be carried out. By this process, the P-type impurity will travel
through the openings in SiO2 layer, and the N-type layer and thus reach the P-type substrate, Isolation
junctions are used to isolate between various components of the IC. The temperature and time period of
isolation diffusion should be carefully monitored and controlled. As a result of isolation diffusion, the
formation of N-type region called Isolation Island occurs. Each isolated island is then chosen to grow
each electrical component. From the figure below you can see that the isolation islands look like back-
to-back P-N junctions. The main use if this is to allow electrical isolation between the different
components inside the IC. Each electrical element is later on formed in a separate isolation island. The
bottom of the N-type isolation island ultimately forms the collector of an N-P-N transistor. The P-type
substrate is always kept negative with respect to the isolation islands and provided with reverse bias at
P-N junctions. The isolation will disappear if the P-N junctions are forward biased.

Monolithic IC - Isolation Diffusion


An effect of capacitance is produced in the region where the two adjoining isolation islands are connected
to the P-type substrate. This is basically a parasitic capacitance that will affect the performance of the
IC. This kind of capacitance is divided into two. As shown in the figure C1 is one kind of capacitance
that forms from the bottom of the N-type region to the substrate and capacitance C2 from the sidewalls
of the isolation islands to the P-region. The bottom component C1 is essentially due to step junction
formed by epitaxial growth and, therefore, varies as the square root of the voltage V between the isolation
region and substrate. The sidewall capacitance C2 is associated with a diffused graded junction and so
varies as (-1/2) exponential of V. The total capacitance is of the order of a few picoFarads.
6. Base Diffusion
The working of base diffusion process is shown in the figure below. This process is done to create a new
layer of SiO2 over the wafer. P-regions are formed under regulated environments by diffusing P-type
impurities like boron. This forms the base region of an N-P-N transistor or as well as resistors, the anode
of diode, and junction capacitor. In this case, the diffusion time is so controlled that the P-type impurities
do not reach the substrate. The resistivity of the base layer is usually much higher than that of the isolation
regions.

Monolithic IC - Base Diffusion


The isolation regions will have a lot lesser resistivity than that of the base layer.

7. Emitter Diffusion
Masking and etching process is again carried out to form a layer of silicon dioxide over the entire surface
and opening of the P-type region. The transistor emitters, the cathode regions for diodes, and junction
capacitors are grown by diffusion using N-type impurities like phosphorus through the windows created
through the process under controlled environmental process. As shown in the figure below there are two
additional windows: W1 and W2. These windows are made in the N-region to carry an aluminium
metallization process.

Fig. Emitter Diffusion


8. Aluminium Metallization
The windows made in the N-region after creating a silicon dioxide layer are then deposited with
aluminium on the top surface. The same photoresist technique that was used in photolithographic process
is also used here to etch away the unwanted aluminium areas. The structure then provides the connected
strips to which the leads are attached. The process can be better understood by going through the figure
below.

9. Scribing and Mounting


This is the final stage of the IC manufacturing process. After the metallization process, the silicon wafer
is then scribed with a diamond tipped tool and separated into individual chips. Each chip is then mounted
on a ceramic wafer and is attached to a suitable header. Next the package leads are connected to the IC
chip by bonding of aluminium or gold wire from the terminal pad on the IC chip to the package lead.
Thus the manufacturing process is complete. Thu, hundreds of IC’s is manufactured simultaneously on
a single silicon wafer.

3. Explain that how different circuit elements like capacitors, transistors, diodes, and resistors are
fabricated into an IC
Transistors
The fabrication process of a transistor is shown in the figure below. A P-type substrate is first grown
and then the collector, emitter, and base regions are diffused on top of it as shown in the figure. The
surface terminals for these regions are also provided for connection.
Both transistors and diodes are fabricated by using the epitaxial planar diffusion process that is
explained earlier. In case of discrete transistors, the P-type substrate is considered as the collector.
`But this is not possible in monolithic IC’s, as all the transistors connected on one P-type substrate
would have their collectors connected together. This is why separate collector regions are diffused
into the substrate.
Even though separate collector regions are formed, they are not completely isolated from the
substrate. For proper functioning of the circuit it is necessary that the P-type substrate is always kept
negative with respect to the transistor collector. This is achieved by connecting the substrate to the
most negative terminal of the circuit supply. The unwanted or parasitic junctions, even when reverse-
biased, can still affect the circuit performance adversely. The junction reverse leakage current can
cause a serious problem in circuits operating at very low current levels. The capacitance of the
reverse-biased junction may affect the circuit high-frequency performance, and the junction
breakdown voltage imposes limits on the usable level of supply voltage. All these adverse effects
can be reduced to the minimum if highly resistive material is employed for the substrate. If the
substrate is very lightly doped, it will behave almost as an insulator.

Diodes
They are also fabricated by the same diffusion process as transistors are. The only difference is that
only two of the regions are used to form one P-N junction. In figure, collector-base junction of the
transistor is used as a diode. Anode of the diode is formed during the base diffusion of the transistor
and the collector region of the transistor becomes the cathode of the diode. For high speed switching
emitter base junction is used as a diode.
Resistors
The resistors used in IC’s are given their respective ohmic value by varying the concentration of
doping impurity and depth of diffusion. The range of resistor values that may be produced by the
diffusion process varies from ohms to hundreds of kilohms. The typical tolerance, however, may be
no better than ± 5%, and may even be as high as ± 20%. On the other hand, if all the resistors are
diffused at the same time, then the tolerance ratio may be good. Most resistors are formed during
the base diffusion of the integrated transistor, as shown in figure below. This is because it is the
highest resistivity region. For low resistance values, emitter region is used as it has much lower
resistivity.

Another diffusion technique is also used for the growth of IC resistors. It is basically a thin-film
technique. In this process a metal film is deposited on a glass or Si02 surface. The resistance value
can be controlled by varying thickness, width and length of the film. Since diffused resistors can be
processed while diffusing transistors. This technique is more economic and less time consuming and
therefore, the most widely used.

Capacitors
The figure below shows the P and N-regions forming the capacitor plates. The dielectric of the
capacitor is the depletion region between them.

All P-N junctions have capacitance so capacitors may be produced by fabricating junctions. The
amount of change in the reverse bias varies the value of junction capacitance and also the depletion
width. The value may be as less as 100 picoFarads.
Using the silicon dioxide as a dielectric may also be a way to fabricate capacitors. One plate of the
capacitors is formed by diffusing a heavily doped N-region. The other plate of the capacitor is
formed by depositing a film of aluminium on the silicon dioxide dielectric on the wafer surface. For
such a capacitor, a voltage of any polarity can be used, and when comparing a diffused capacitor
with such a capacitor the diffused capacitor may have very small values of breakdown voltage.

4. Explain the operation of BJT Differential amplifier with various modes of operation.
Differential Amplifier is a dc-coupled amplifier that amplifies the difference between two
input signals. It is the building block of analog integrated circuits and operational amplifiers
(op-amp). One of the important feature of differential amplifier is that it tends to reject or nullify
the part of input signals which is common to both inputs. This provides very good noise
immunity in a lot of applications. Let’s see the block diagram of a differential amplifier.

Vi1 and Vi2 are input terminals and Vo1 and Vo2 are output terminals with respect to ground. We
can feed two input signals at the same time or one at a time. In the former case it is called dual
input otherwise it is single input. Similarly there are two ways to take output also. If the output
is taken from one terminal with respect to ground, it is unbalanced output or if the output is
taken between two output terminals, it is balanced output.
The simplest form of differential amplifier can be constructed using Bipolar Junction Transistors
as shown in the below circuit diagram. It is constructed using two matching transistors in
common emitter configuration whose emitters are tied together.
Configurations
Based on the methods of providing input and taking output, differential amplifiers can have four
different configurations as below
1. Single Input Unbalanced Output
2. Single Input Balanced Output
3. Dual Input Unbalanced Output
4. Dual Input Balanced Output
Single Input Unbalanced Output
In this case, only one input signal is given and the output is taken from only one of the two
collectors with respect to ground as shown below.

Differential Amplifier using Transistor – Single Input Unbalanced Output


When input signal Vin1 is applied to the transistor Q1, it’s amplified and inverted voltage gets
generated at the collector of the transistor Q1. At the same time it’s amplified and non-inverted
voltage gets generated at the collector of the transistor Q2 as shown in the above diagram.
Unbalanced output will contain unnecessary dc content as it is a dc coupled amplifier therefore
this configuration should follow by a level translator circuit.
The effect of input voltage Vin1 is coupled to the transistor Q2 via the common emitter resistor
R E.
Single Input Balanced Output
As above only one input signal is given even though the output is taken from both collectors.

Differential Amplifier using Transistor – Single Input Balanced Output


This will give us more amplified version of output as it is combining the effect of both transistors. There
won’t be any unnecessary dc content in balanced output as the dc contents in both outputs gets canceled
each other.
 Vo = Vo1 – Vo2
Dual Input Unbalanced Output
Both inputs are given in this case ie, differential input but the output is taken from only one of the two
collectors with respect to ground as shown below.

Differential Amplifier using Transistor – Dual Input Unbalanced Output


Amplified version of difference in both signals will be available at the output. The voltage gain is half
the gain of the dual input, balanced output differential amplifier. Unbalanced output will contain
unnecessary dc content as it is a dc coupled amplifier therefore this configuration should follow by a
level translator circuit.
Dual Input Balanced Output
Differential Amplifier using Transistor – Dual Input Balanced Output
Above circuit consists of two identical transistors Q1 and Q2 with its emitters coupled together.
Collectors are connected to main supply VCC through collector resistor Rc. Magnitude of power supplies
VCC and –VEE will be same.
 Vo = Ad(Vin1 – Vin2)
Where Ad = differential gain
Vin1, Vin2 = input voltages
When Vin1 = Vin2, obviously the output will be zero. ie, differential amplifier suppresses common mode
signals.
For effective operation, components on either sides should be match properly. Input signals are applied
at base of each transistor and output is taken from both collector terminals. There won’t be any
unnecessary dc content in balanced output as the dc contents in both outputs gets canceled each other.

5.Discuss about the DC and AC Analysis of differential amplifier

DC Analysis
DC analysis provides the operating point values ICQ and VCEQ for the transistors used in the circuit.
The DC equivalent circuit obtained by reducing all AC signals to zero as shown in figure below.

Differential Amplifier using Transistors – DC Analysis


Assume :
 Source Resistance, RS1 = RS2 = RS
 Q1 = Q2
 RE1 = RE2 hence RE = RE1||RE2
 RC1 = RC2 = RC
 |VCC|=|VEE|
Applying KVL to base – emitter loop of Q1,
 -IBRS – VBE – 2IERE + VEE = 0 ———————-(1)
Since IC = βIB and IC ≈ IE
 IB ≈ IE/β ———————-(2)
Substituting (2) in (1) =>
 – IERS/β – VBE – 2IERE + VEE = 0
 – IE(RS/β – 2RE) + VEE – VBE = 0
Where VBE = 0.7V for silicon and 0.2V for germanium.
Also RS/β << 2RE
Therefore,
 IE = (VEE – VBE)/2RE ————————(3)
Eqn.(3) =>
 RE determines the emitter current of Q1 and Q2
 IE is independent of RC
Since the voltage drop across RS is too small, we can neglect it. So,
 VE = –VBE
 VC = VCC – ICRC
VCE = VC – VE

= (VCC – ICRC) – (–VBE)

= VCC + VBE – ICRC ——————-(4)

We can determine operating point values using equations (3) and (4). Since two transistors are identical,
same equations can be used for both.
 IE = IC = (VEE – VBE)/2RE
 VCE = VCC + VBE – ICRC
AC Analysis
We can find Voltage Gain Ad and Input Resistance Ri of the differential amplifier by doing AC Analysis.
The ac equivalent circuit is obtained by reducing all DC voltage sources to zero and replacing transistor
with its equivalent.

Differential Amplifier using Transistors – AC Analysis


Since both dc emitter currents are equal resistances re1’ = re2’ = re’
Applying KVL in loop 1 and 2,
 Vin1 = RS1ib1 + ie1re’ + (ie1 + ie2)RE
 Vin2 = RS2ib2 + ie2re’ + (ie1 + ie2)RE
We know that,
ib1 ≈ ie1/β and ib2 ≈ ie2/β
Thus,
 Vin1 = (RS1/β) ie1 + ie1re’ + (ie1 + ie2) RE
 Vin2 = (RS2/β )ie2 + ie2re’ + (ie1 + ie2)RE
Consider RS1/ β & RS2/ β << RE & re’
 Vin1 = ie1 (re’ + RE) + ie2 RE
 Vin2 = ie2 (re’ + RE) + ie1RE
On solving these equations we get,
 ie1 = (Vin1(re’ + RE) – Vin2RE )/((re’ + RE)² – RE²) ———————(5)
 ie2 = (Vin2(re’ + RE) – Vin1RE)/ ((re’ + RE)² – RE² ) ———————(6)
Voltage Gain
Output voltage, Vo = VC2 – VC1

= -RCic2 – (-RCic1)
= Rc(ic1 – ic2)
=> Rc(ie1 – ie2) —————–(7)

On substituting (5) and (6) in (7) and solving


Vo = (Rc(Vin1 -Vin2)(re’ – 2RE) )/(re’(re’ + 2RE))
Vo = (RC/re’)(Vin1 – Vin2) ——————————–(8)
Thus the differential gain, Ad = RC/re’
This proves a differential amplifier amplifies the difference between two input signals.

Differential Input Resistance


Differential Input Resistance is the equivalent resistance measured across either of input terminals and
ground. Thus to find out Ri1, Vin2 should be grounded and to measure Ri2, Vin1 should be grounded.
Ri1 = Vin1/ib1 when Vin2 = 0

= Vin1/(ie1/β)

Substituting equation (5) of ie1


Ri1 = (Vin1β)/((Vin1(re’ + RE) – Vin2RE )/((re’ + RE)² – RE²))

= β/((re‘ + RE)/(re‘2 + 2re‘RE)

= βre‘(re‘ + 2RE)/(re‘ + RE)

RE >> re‘
re‘ + 2RE ≈ 2RE
re‘ + RE ≈ RE

Ri1 = 2βre‘
 Ri1 = 2βre‘
Similarly,
 Ri2 = 2βre‘
Output resistance
The effective resistance measured at output terminal with respect to ground. So the output resistance is
measured between the collector and the ground, which is same as the collector resistance RC.
 RO1 = RO2 = RC.
Common Mode Rejection Ratio (CMRR)
Dual input balanced output differential amplifier should suppress the common signals present at its
inputs. A differential amplifier is said to be in common mode when same signal is applied to both inputs
and the expected output will be zero, ie ideally common mode gain is zero.

Differential Amplifier using Transistor – Common Mode


Effectiveness of rejection depends on the matching of two common – emitter stages used. The ability of
a differential amplifier to reject common mode signal is called Common Mode Rejection Ratio (CMRR).
CMRR =|differential gain/common mode gain|

=|Ad/Ac|

Unit of CMRR is dB
CMRR = 20log|Ad/Ac|

As mentioned earlier, ideally output will be zero in common mode which implies infinite CMRR.

6.Explain the internal blocks of operational amplifier.


7.Discuss about Wilson and widlar current source.
8. Briefly explain about BJT Current mirror(constant current source).
UNIT- II
OPERATIONAL AMPLIFIERS

1.What is OPAMP?
An operational amplifier is a direct coupled high gain amplifier consisting of one or more differential
amplifiers, followed by a level translator and an output stage. It is a versatile device that can be used to
amplify ac as well as dc input signals & designed for computing mathematical functions such as addition,
subtraction , multiplication, integration & differentiation.

2. What are the different kinds of packages of IC741?


a)Metal can (TO) package b)Dual-in-line package c)Flat package or flat pack

3. What are the assumptions made from ideal opamp characteristics?


i) The current drawn by either of the input terminals(non- inverting /inverting) is negligible.
ii) The potential difference between the inverting & non-inverting input terminals is zero.
In practical op-amps, what is the effect of high frequency on its performance?
The open-loop gain of op-amp decreases at higher frequencies due to the presence of parasitic capacitance.
The closed-loop gain increases at higher frequencies and leads to instability.

4. What is the need for frequency compensation in practical op-amps?


Frequency compensation is needed when large bandwidth and lower closed loop gain is desired.
Compensating networks are used to control the phase shift and hence to improve the stability.

5. Mention the frequency compensation methods.


*Dominant-pole compensation
*Pole-zero compensation

6. Mention some of the linear applications of op – amps.


Adder, subtractor, voltage –to- current converter, current –to- voltage converters, instrumentation
amplifier, analog computation, power amplifier, etc are some of the linear op- amp circuits.

7. Mention some of the non linear applications of op-amps:-


Rectifier, peak detector, clipper, clamper, sample and hold circuit, log amplifier, anti –log
amplifier, multiplier are some of the non – linear op-amp circuits.
8. What are the areas of application of non-linear op- amp circuits?
1. Industrial instrumentation
2. Communication
3. Signal processing

9. What is voltage follower?


A circuit in which output follows the input is called voltage follower.

10. What is the need for an instrumentation amplifier?


In a number of industrial and consumer applications, the measurement of physical
quantities is usually done with the help of transducers. The output of transducer has to be amplified
So that it can drive the indicator or display system. This function is performed by an instrumentation
amplifier.

11. List the features of instrumentation amplifier:


1.High gain accuracy
2.High CMRR
3.High gain stability with low temperature coefficient
4Low dc offset
5.Low output impedance

12. What are the applications of V-I converter?


1.Low voltage dc and ac voltmeter
2.L E D
3.Zener diode tester

13. Define Bandpass filter.


The bandpass filter is the combination of high and low pass filters, and this allows a specified
range of frequencies to pass through..

14. Write down the condition for good differentiation .


1.For good differentiation, the time period of the input signal must be greater than or equal to Rf
C1
2.T > R f C1 Where, Rf is the feedback resistance
3.Cf is the input capacitance

15. Write transfer function of op amp as an integer.


The transfer function of the integer is │A│=1/ωR1cf

16. What do you mean by a precision diode?


The major limitation of ordinary diode is that it cannot rectify voltages below the cut – in voltage of
the diode. A circuit designed by placing a diode in the feedback loop of an op – amp is called the
precision diode and it is capable of rectifying input signals of the order of millivolt.

17. Write down the applications of precision diode.


1.Half - wave rectifier
2.Full - Wave rectifier
3.Peak – value detector
4.Clipper
5.Clamper

18. Define Logarithmic and antilogarithmic amplifier.


When a logarithmic PN junction is used in the feedback network of op-amp, the circuit
exhibits log or antilog response. The logarithmic amplifier is a current to voltage converter with the
transfer characteristics v0=vi In(If/Ii) Antilog amplifier is a decoding circuit which converts the
logarithmically encoded signal back to the original signal levels as given by vl=vR10-kvi

19. Differentiate Schmitt trigger and comparator


1. It compares the input signal with references voltage then yields the output voltage
2. It need not consist of feedback
3. comparator output need not to be square wave
1. It operates between two reference points namely UTP&LTP.
2. It employs positive feedback
3. Its output is square wave

20. List the applications of Log amplifiers:


1.Analog computation may require functions such as lnx, log x, sin hx etc. These functions can be
performed by log amplifiers
2.Log amplifier can perform direct dB display on digital voltmeter and spectrum analyzer
3.Log amplifier can be used to compress the dynamic range of a signal

21. What are the limitations of the basic differentiator circuit?


1.At high frequency, a differentiator may become unstable and break into oscillations
2,The input impedance decreases with increase in frequency , thereby making the circuit sensitive
to high frequency noise.

22. Enlist the characteristics of ideal opamp.


• Infinite Differential Gain
• Infinite input impedance
• Infinite Bandwidth
• Infinite open loop gain
• Zero Common Mode Gain
• Zero Offset Voltage
• Zero Bias Current
• Zero thermal shift

23. What is a comparator?


A comparator is a circuit which compares a signal voltage applied at one input of an op-
amp with a known reference voltage at the other input. It is an open loop op - amp with output +
Vsat.

24. What are the applications of comparator?


1.Zero crossing detector
2.Window detector
3.Time marker generator
4.Phase detector

25. What is a Schmitt trigger?


Schmitt trigger is a regenerative comparator. It converts sinusoidal input into a square wave output.
The output of Schmitt trigger swings between upper and lower threshold voltages, which are the
reference voltages of the input waveform.

26. What are the characteristics of a comparator?


1.Speed of operation
2.Accuracy
3.Compatibility of the output.
27. Why open loop OP-AMP configurations are not used in linear applications?

The open loop gain of the op-amp is not a constant and it varies with changing the temperature and
variations in power supply.Also the bandwidth of the open loop op-amp is negligibly small.For this
reasons open loop OP-AMP configurations are not used in linear applications.

28.Define slew rate.


The slew rate is defined as the maximum rate of change of output Voltage caused by a step input
voltage.An ideal slew rate is infinite which means that op-amp’s output voltage should change
instantaneously in response to input step voltage.

29.Why IC 741 is not used for high frequency applications?


IC741 has a low slew rate because of the predominance of capacitance present in the circuit at
higher frequencies. As frequency increases the output gets distorted due to limited slew rate.

30. What causes slew rate?


There is a capacitor with-in or outside of an op-amp to prevent oscillation. The capacitor which
prevents the output voltage from responding immediately to a fast changing input.

31. What happens when the common terminal of V+ and V- sources is not grounded? (DEC 09)
If the common point of the two supplies is not grounded, twice the supply voltage will get applied
and it may damage the op-amp.

32. In practical op-amps, what is the effect of high frequency on its performance?
The open-loop gain of op-amp decreases at higher frequencies due to the presence of parasitic
capacitance. The closed-loop gain increases at higher frequencies and leads to instability.

33. Define input offset voltage.


A small voltage applied to the input terminals to make the output voltage as zero when the two
input terminals are grounded is called input offset voltage.

34. Define input offset current. State the reasons for the offset currents at the input of the op-
amp.
The difference between the bias currents at the input terminals of the op-amp is called as input offset
current. The input terminals conduct a small value of dc current to bias the input transistors. Since
the input transistors cannot be made identical, there exists a difference in bias currents.

35.Define sensitivity.
Sensitivity is defined as the percentage or fractional change in output current per percentage or
fractional change in power-supply voltage.
Part B

1. Discuss about the Dc characteristics of operational amplifier


2.Discuss about the AC Characteristics of operational amplifier
3.Explain about the summing amplifier and differencing amplifier.
5. Explain in detail about the operation of instrumentation amplifier.
6. Discuss about the integrator and differentiator.
Integrator:
7. Discuss about the log and antilog amplifier.
8. Explain the working of Schmitt trigger
9. Discuss about the precision rectifiers
UNIT 3 FILTERS AND VOLTAGE REGULATORS

1. What is a filter?
Filter is a frequency selective circuit that passes signal of specified band of frequencies and
attenuates the signals of frequencies outside the band

2. What are the demerits of passive filters?


Passive filters works well for high frequencies. But at audio frequencies, the inductors become
problematic, as they become large, heavy and expensive. For low frequency applications, more
number of turns of wire must be used which in turn adds to the series resistance degrading
inductor’s performance ie, low Q, resulting in high power dissipation.

3. What are the advantages of active filters?


Active filters used op- amp as the active element and resistors and capacitors as passive elements.

4.Compare Active and Passive Filter.


Sl.No. Active Filter Passive Filter
1 This type of filters designed by active This type of filters designed only
elements(Op-Amp.) and passive elements(R,L by passive elements(R,L and C)
and C)
2 Active Filters provide gain No gain
3 Mostly used in Low frequency circuits Suitable for high frequency circuits
4 Requires additional power supply for biasing Power supply not necessary

5. Define low pass filter.


A low pass filter allows only low frequency signals up to a certain break point f to pass through.
H

6. Define High pass filter.


A low pass filter allows only high frequency signals up to a certain break point f to pass through.
H

7.Define Band pass filter.


The band pass filter is the combination of high and low pass filters, and this allows a specified
range of frequencies to pass through.
8.A band pass filter has lower and upper cut off frequency of 200Hz and 2kHz respectively
find the type of band pass filter.
Q=f /B.W.
c

Fc=√f1f2.=632.455
B.W.=f2-f1=1800;
Q=0.351
If Q<10; SO THE GIVEN FILTER IS WIDE BAND PASS FILTER
9. Write transfer function of op amp as an integer.
The transfer function of the integer is
│A│=1/ωRfC.
10. Draw the frequency response of ideal LPF, HPF, BPF and BSF.
Refer: text book
11. List the characteristics of Voltage Regulator
 Constant Output Voltage
 Vin≤Vout+2
 Voltage Regulator Should provide Output current which can drive other circuits
 Thermal shutdown
 Line and load regulation
 Ripple rejection
 Current protection

12. Define Load regulation and line regulation.


Load regulation:
Ratio between changes in output voltage and changes in load current.
Line Regulation:
Ratio between changes in output voltage and changes in line (input) current

13. List the components required to design a 5V Mobile charger.


 Step down transformer
 Rectifier
 Filter
 Regulator(7805)

14. What are the types of voltage regulator?


 Series regulator(Linear Regulator)
 Switching Regulator

15.Pin details of 7805:


1-INPUT(unregulated voltage)
2-GND(Ground)
3-OUTPUT(Regulated Voltage)
16.What do you mean by all pass filter?
It gives constant amplitude response and variable phase for all frequencies

17. Define notch filter.


It is electronic circuit which rejects a single frequency from the band of signal.

18. Draw the frequency response of notch filter.


19. Differentiate ideal and practical filter response
Ideal filter Practical filter
Zero attenuation for pass band Pass band No longer has zero attenuation
Infinity attenuation in stop band Stop band No longer has infinity attenuation
Transition band is not available(ie:Vertical transistion) Transition band is available between pass band
and stop band
EX:IDEAL LOW PASS FILTER EX:PRACTICAL LOW PASS FILTER

20. Compare butterworth, chebyshev and Bessel filters :


Refer:class notes

21. What is a switching regulator?

Switching regulators are those which operate the power transistor as a high frequency on/off switch, so
that the power transistor does not conduct current continously.This gives improved efficiency over
series regulators.

22. What are the advantages of IC voltage regulators?

*low cost *high reliability *reduction in size *excellent performance

23. Give some examples of monolithic IC voltage regulators: [NOV-2011]

78XX series fixed output, positive voltage regulators

79XX series fixed output, negative voltage regulators

723 general purpose regulator.

24. Define load regulation.

Load regulation is defined as the change in output voltage for a change in load current. It is expressed
in millivolts or as a percentage of the output voltage.

25. What is meant by current limiting?

Current limiting refers to the ability of a regulator to prevent the load current from increasing above a
preset value.

26. Give the drawbacks of linear regulators:

*The input step down transformer is bulky and expensive because of low line frequency.

*Because of low line frequency,large values of filter capacitors are required to decrease the ripple.
*Efficiency is reduced due to the continous power dissipation by the transistor as it operates in the
linear region.

27.What do you mean by PSRR?

Power supply ripple rejection ratio (PSRR) is a measure of how well a circuit rejects ripple coming from
the input power supply at various frequencies and is very critical in many RF and wireless applications

is expressed in decibels (dB). The basic equation for PSRR is

PSRR = 20 log(Ripple Input/Ripple Output)

28. Define current foldback.

current Foldback is a current limiting feature (a type of overload protection) of power supplies and power
amplifiers. When the load attempts to draw overcurrent from the supply, foldback reduces both the output
voltage and current to well below the normal operating limits.

29. Mention the advantages of opto-couplers: [April-2011]

*Better isolation between the two stages.

*Impedance problem between the stages is eliminated.

*Wide frequency response.

*Easily interfaced with digital circuit.

*Compact and light weight.

*Problems such as noise, transients, contact bounce,.. are eliminated.

30.What is dropout voltage?

Low dropout refers to the difference between the input and output voltages that allow the IC to
regulate the output load voltage. That is, an LDO can regulate the output load voltage until its input
and output approach each other at the dropout voltage. Ideally, the dropout voltage should be as low as
possible to minimize power dissipation and maximize efficiency. Typically, dropout is considered to
be reached when the output voltage has dropped to 100 mV below its nominal value. The load current
and pass transistor temperature affect the dropout voltage.
Part-B
1. Design of first order LPF
2. Discuss about the design of second order low pass filter.
3. Discuss about the design of first order High pass filter.
4. Discuss about the second order High pass filter design with its frequency response

Derivation : refer text book.


5. Design a basic wide-band, RC band stop filter with a lower cut-off frequency of 200Hz and
a Higher cut-off frequency of 800Hz. Find the geometric center frequency, -3dB bandwidth and Q
of the circuit.
6. Write short notes on IC723 General purpose Voltage regulator.
7. Discuss about the switching regulators.
8.Problem
UNIT- IV
Waveform Generators and PLL

1. What is a multivibrator?
Multivibrators are a group of regenerative circuits that are used extensively in timing applications.
It is a wave shaping circuit which gives symmetric or asymmetric square output. It has two states
either stable or quasi- stable depending on the type of multivibrator.

2. What do you mean by monostable multivibrator?


Monostable multivibrator is one which generates a single pulse of specified duration in response to
each external trigger signal. It has only one stable state. Application of a trigger causes a change to
the quasi-stable state.An external trigger signal generated due to charging and discharging of the
capacitor produces the transition to the original stable state.

3. What is an astable multivibrator?


Astable multivibrator is a free running oscillator having two quasi-stable states. Thus, there is
oscillations between these two states and no external signal are required to produce the change in
state.

4. What is a bistable multivibrator?


Bistable multivibrator is one that maintains a given output voltage level unless an external trigger is
applied . Application of an external trigger signal causes a change of state, and this output level is
maintained indefinitely until an second trigger is applied . Thus, it requires two external triggers
before it returns to its initial state

5. Mention any two audio frequency oscillators.

i. RC phase shift oscillator ii. Wein bridge oscillator

6. state the conditions for sustained oscillation

Aβ =1; Aβ =0 (or)360
0 0

1. The total phase shift around the loop must be zero at the desired frequency of oscillation
2. At fo, the magnitude of the loop gain |Aβ| should be equal to unity.

7. Find the duty cycle of Astable Multivibrator when RA=RB=10 kilo ohm.
Duty Cycle=T /T
ON TOTAL

=RARA+2RB

=0.33;=33.33%

8.What are the applications of 555 Timer?

 astable multivibrator
 monostable multivibrator
 Missing pulse detector
 Linear ramp generator
 Frequency divider
 Pulse width modulation
 FSK generator
 Pulse position modulator
 Schmitt trigger

9. List the applications of 555 timer in monostable mode of operation:.

 Missing pulse detector


 Linear ramp generator
 Frequency divider
 Pulse width modulation.

10. List the applications of 555 timer in Astable mode of operation:

 FSK generator
 Pulse-position modulator.

11. Define 555 IC?

The 555 timer is an integrated circuit specifically designed to perform signal generation and timing
functions.

12. List the basic blocks of IC 555 timer?

 A relaxation oscillator RS flip flop


 Two comparator
 Discharge transistor.

13. List the features of 555 Timer?

 It has two basic operating modes: monostable and astble


 It is available in three packages. 8 pin metal can , 8 pin dip, 14 pin dip.
 It has very high temperature stability.

14. Define duty cycle?

The ratio of high output and low output period is given by a mathematical parameter called duty cycle.
It is defined as the ratio of ON Time to total time.

15. Define VCO.

A voltage controlled oscillator is an oscillator circuit in which the frequency of oscillations can be
controlled by an externally applied voltage.

16. List the features of 566 VCO.

 Wide supply voltage range(10-24V)


 Very linear modulation characteristics
 High temperature stability

17. What does u mean by PLL?

A PLL is a basically a closed loop system designed to lock output frequency and phase to the
frequency and phase of an input si

18. List the basic building blocks of PLL:


1.Phase detector/comparator
2.Low pass filter
3.Error amplifier
4.Voltage controlled oscillator

19. Define FSK modulation.


FSK is a type of frequency modulation ,in which the binary data or code is transmitted by means
of a carrier frequency that is shifted between two fixed frequency namely mark(logic1) and space
frequency(logic 0).

20. What is analog multiplier?


A multiplier produces an output v0, which is proportional to the product of two inputs vx and vy
V0= kvxvy

21. List out the various methods available for performing for analog multiplier.
• Logarithmic summing technique
• Pulse height /width modulation technique
• Variable transconductance technique
• Multiplication using gilbert cell
• Multiplication technique using transconductance technique

22. Mention some areas where PLL is widely used.


1.Radar synchronizations
2. Satellite communication systems
3. Air borne navigational systems
4. FM communication systems
5.Computers.

23. What are the three stages through which PLL operates?
1.Free running
2.Capture
3.Locked/ tracking

24. Define lock-in range of a PLL.


The range of frequencies over which the PLL can maintain lock with the incoming signal is
called the lock-in range or tracking range. It is expressed as a percentage of theVCO free
running frequency.

25. Define capture range of PLL.


The range of frequencies over which the PLL can acquire lock with an input signal is called
the capture range. It is expressed as a percentage of the VCO free running frequency.
26. Write the expression for FSK modulation.
Δvf=f2-f/k0

27. Define free running mode .


An interactive computer mode that allows more than one user to have simultaneous use of a
program.
28. For perfect lock, what should be the phase relation between the incoming signal and
VCO output signal?
The VCO output should be 90 degrees out of phase with respect to the input signal.

29.Give the classification of phase detector:


1.Analog phase detector .
2.Digital phase detector

30.What is a switch type phase detector?


An electronic switch is opened and closed by signal coming from VCO and the input signal is
chopped at a repetition rate determined by the VCO frequency.This type of phase detector is called
a half wave detector since the phase information for only one half of the input signal is detected
and averaged.

31.What are the problems associated with switch type phase


detector?
1.The output voltage Ve is proportional to the input signal amplitude.This is undesirable because it
makes phase detector gain and loop gain dependent on the input signal amplitude.
2.The output is proportional to cosφ making it non linear.

32.What is a voltage controlled oscillator?


Voltage controlled oscillator is a free running multivibrator operating at a set frequency called the
free running frequency.This frequency can be shifted to either side by applying a dc control voltage
and the frequency deviation is proportional to the dc control voltage.

33. Define Voltage to Frequency conversion factor.


Voltage to Frequency conversion factor is defined as, K = f / V = 8f /V
v 0 c 0 cc

Vc is the modulation voltage f frequency shift


0

34.What is the purpose of having a low pass filter in PLL?


*It removes the high frequency components and noise.
*Controls the dynamic characteristics of the PLL such as capture range, lock-in range,bandwidth
and transient response.
*The charge on the filter capacitor gives a short- time memory to the
PLL

35.Discuss the effect of having large capture range.


The PLL cannot acquire a signal outside the capture range, but once captured, it will hold on till the
frequency goes beyond the lock-in range.Thus , to increase the ability of lock range,large capture
range is required.But, a large capture range will make the PLL more susceptible to noise and
undesirable signal.

36.Mention some typical applications of PLL:


• Frequency multiplication/division
• Frequency translation
• AM detection
• FM demodulation
• FSK demodulation.

37.What is a compander IC? Give some examples.


The term companding means compressing and expanding.In a communication system, the audio
signal is compressed in the transmitter and expanded in the receiver.
38.What are the merits of companding?
*The compression process reduces the dynamic range of the signal before it is transmitted.
*Companding preserves the signal to noise ratio of the original
signal and avoids non linear distortion of the signal when the input amplitude is large.
*It also reduces buzz,bias and low level audio tones caused by mild interference
39.A PLL has a free running frequency of f0=500khz and bandwidth of the low pass filter is 10
KHz.will the loop acquire lock for an input signal of 600 KHz.justify your answer.

Phase detector output: f0+f1=500k+600k;=1100 KHz

: f0-f1=500k-600k;=100 KHz

As both the components are outside the pass band of low pass filter, the loop will acquire lock.

Part-B
1. Draw the pin configuration of IC 555 TIMER and explain the Monostable mode of
operation.
2. Explain the operation of Astable mode of operation of IC 555 TIMER
3. Explain the operation of PLL.
4. Discuss about FSK Modulator and demodulator using PLL
Unit V-A/D CONVERTERS, D/A CONVERTERS

1. List the broad classification of ADCs


1. Direct type ADC. 2. Integrating type ADC.

2. List out the direct type ADCs.


1. Flash (comparator) type converter 2. Counter type converter 3. Tracking or servo
converter 4. Successive approximation type converter

3. List out some integrating type converters.


1. Charge balancing ADC 2. Dual slope ADC

4. What is integrating type converter?


An ADC converter that perform conversion in an indirect manner by first changing the analog
I/P signal to a linear function of time or frequency and then to a digital code is known as
integrating type A/D converter.

5. Explain in brief the principle of operation of successive Approximation ADC.

The circuit of successive approximation ADC consists of a successive approximation register


(SAR), to find the required value of each bit by trial & error.With the arrival of START
command, SAR sets the MSB bit to 1. The O/P is converted into an analog signal & it is
compared with I/P signal. This O/P is low or High. This process continues until all bits are
checked.

6. What are the main advantages of integrating type ADCs?


i. The integrating type of ADC’s do not need a sample/Hold circuit at the input.
ii. It is possible to transmit frequency even in noisy environment or in an isolated
form.

7.Where are the successive approximation type ADC’s used?


The Successive approximation ADCs are used in applications such as data loggers &
instrumentation where conversion speed is important.

8. What is the main drawback of a dual-slop ADC?


The dual slope ADC has long conversion time. This is the main drawback
of dual slope ADC.

9. State the advantages of dual slope ADC:


It provides excellent noise rejection of ac signals whose periods are integral multiples of the
integration time T.

10. Define conversion time.


It is defined as the total time required to convert an analog signal into its digital output. It
depends on the conversion technique used & the propagation delay of circuit components.

11. Define accuracy of converter.

Absolute accuracy:
It is the maximum deviation between the actual converter output & the ideal converter output.
Relative accuracy:
It is the maximum deviation after gain & offset errors have been removed. The accuracy of a
converter is also specified in form of LSB increments or % of full scale voltage.

12. What is settling time?


It represents the time it takes for the output to settle within a specifie band ±½LSB of its final
value following a code change at the input (usually a full scale change). It depends upon the
switching time of the logic circuitry due to internal parasitic capacitance & inductances. Settling
time ranges from 100ns. 10µs depending on word length & type circuit used.

13. Explain in brief stability of a converter:


The performance of converter changes with temperature age & power supply variation . So all
the relevant parameters such as offset, gain, linearity error & monotonicity must be specified
over the full temperature & power supply ranges to have better stability performances.

14. What is meant by linearity?


The linearity of an ADC/DAC is an important measure of its accuracy & tells us how close the
converter output is to its ideal transfer characteristics. The linearity error is usually expressed as
a fraction of LSB increment or percentage of full-scale voltage. A good converter exhibits a
linearity error of less than ±½LSB.

15. What is monotonic DAC?


A monotonic DAC is one whose analog output increases for an increase in digital input.

Part B

1. Explain in detail about Successive Approximation Type Analog to digital Converter.


2. Explain in detail about the operation of Dual slope ADC.
3. Discuss about the operation of weighted resistor DAC.
4. Discuss about the operation of R-2R ladder DAC.
5. Explain in detail about the operation of Flash Type ADC.

Another type of ADC is parallel ADC. Parallel ADC is called as Flash ADC. Its response is very fast. It
converts analog signal into digital signal using parallel set of comparators. As its conversion time is very
fast it is called as flash ADC.

Following figure shows circuit diagram of parallel ADC or flash ADC.

n-bit Flash ADC consist of parallel combination of 2^n-1 comparators. Outputs of all comparators are
connected to an encoder.
Analog voltage is applied to non inverting terminals of all comparators using a single line. Reference
voltage is applied to inverting terminals of comparators using divider circuit.

Each comparator produces digital output in the form of 1 or 0. If unknown analog voltage is greater than
reference voltage comparator produces high logic. If analog voltage is less than reference voltage then
comparator produces low logic i.e. 0.

Thus all parallel comparator produces digital representation of analog voltage in the form of zero and
one. These outputs of comparator are then applied to the fast encoder. Encoder converts those zeros and
once into binary number and produces digital binary output.

For example, see below table. When unknown voltage is 5 i.e. lies between 4.375 &5.625 is applied to
the flash ADC, first four encoders produces output ‘1’ and last three encoders produces output ‘0’.
Encoder converts this ‘1111000’ comparator output into ‘100’ binary number as digital output.

Table shows the outputs of comparators and encoder for a 3 bit flash ADC. The range of operation is
given as 0-10V.
Analog input Comparator Output Encoder Output

(V)
C1 C2 C3 C4 C5 C6 C7 D2 D1 D0

0.000-0.625 0 0 0 0 0 0 0 0 0 0

0.625-1.875 1 0 0 0 0 0 0 0 0 1

1.875-3.125 1 1 0 0 0 0 0 0 1 0

3.125-4.375 1 1 1 0 0 0 0 0 1 1

4.375-5.625 1 1 1 1 0 0 0 1 0 0

5.625-6.875 1 1 1 1 1 0 0 1 0 1

6.875-8.125 1 1 1 1 1 1 0 1 1 0

8.125-10.000 1 1 1 1 1 1 1 1 1 1

As the number of bits of ADC increases its resolution increases. But such high bit converter is bulky and
expensive.

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