ECE211 Question Bank With Answer
ECE211 Question Bank With Answer
II Year / IV Semester
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3 1 0 4
INTEGRATED CIRCUIT, AMPLIFIER CONCEPTS
IC Classification – IC Fabrication –Integrated transistors – Monolithic (solid state) diodes, resistors,
capacitors, inductors – FET ICs – CMOS ICs –Transistor as switches, Current sources/sinks –Emitter-
Follower, Darlington pair, Differential amplifiers, Active loading, output stage, Level shifting
II OPERATIONAL AMPLIFIER
Ideal Op-amp –- Practical Op-amp – General Op-amp – Classification of op-amps - DC and AC
characteristics - Frequency compensation – Open loop, Closed loop op-amp configurations –Voltage
follower, Summing amplifier, Differencing amplifier, Instrumentation amplifier, Integrator,
Differentiator, Logarithmic amplifier, Analog computation, precision Rectifiers - Op-amp comparators
–comparator Applications.
III FILTERS, VOLTAGE REGULATORS
Comparison between active and passive filters – Design of LPF, HPF, BPF, BSF, All-pass filter, state
variable filters– Basics of voltage regulators – Linear voltage regulators using op-amp – IC voltage
regulators (78xx, 79xx) – IC 723 Regulators
IV WAVEFORM GENERATORS, PLL
Multi vibrators, Triangular wave generator, Sine wave generators, saw-tooth wave generator –555
Timer and its applications –Basic principles of PLL – VCO – IC VCO 566, LPF – Monolithic PLL-
IC565 – Applications of PLL IC 565
V A/D CONVERTERS, D/A CONVERTERS
Analog and Digital Interface Circuits – D/A converters – weighted resistor DAC - R-2R ladder DAC –
inverted R-2R ladder DAC –multiplying DAC – monolithic DAC - A/D Converters- direct type ADC –
parallel comparator ADC – counter type ADC – successive approximation ADC – change balancing
ADC – dual slope – Advanced Op-amps: CMOS op-amp
TEXT BOOKS
1. D. Roy Choudhury, Shail B. Jain, Linear Integrated Circuits, New Age, 4 Edition, 2012
th
REFERENCES
1. Gayakwad, Ramakant A., OP-Amps and Linear Integrated Circuits, PHI, 4 Edition, 2009
th
2. Sergio Franco, Design with Op-Amps and Analog Integrated Circuits, TMH, 3 Edition, 2002
rd
3. David A Johns, Ken Martin, Analog Integrated Circuit Design, Wiley India, 4 Edition, 2009
th
5. What are the two common methods for obtaining integrated capacitors?
• Monolithic junction capacitor
•Thin-flim capacitor.
6.What are the basic processes involved in fabricating ICs using planar technology?
1.Silicon wafer (substrate) preparation
2.Epitaxial growth
3.Oxidation
4.Photolithography
5.Diffusion
6.Ion implantation
7.Isolation technique
8.Metallization
9.Assembly processing & packaging
9. What is lithography?
Lithography is a process by which the pattern appearing on the mask is transferred to the wafer.It involves
two steps: the first step requires applying a few drops of photoresist to the surface of the wafer & the
second step is spinning the surface to get an even coating of the photoresist across the surface of the
wafer.
10. What are the different types of lithography? What is optical lithography?
The different types of lithography are :
1. Photolithography 2.Electron beam lithography 3. X ray beam lithography 4.Ion beam lithography
Optical lithography:
Optical lithography comprises the formation images with visible or UV radiation in a photoresist using
contact, proximity or projection printing.
15. What are the advantages and limitations implantation of ion implantation?
Advantages:
• Accurate control over doping
• Very good reproducibility
• Precise resistance value
• A room temperature process
Limitations:
• Annealing at higher temperature is required for avoiding the crystal damage
• The possibility of dopant implanting through various layers of wafer.
19. What is the advantage of widlar current source over constant current source?
Using constant current source output current of small magnitude(microamp range) is not attainable
due to the limitations in chip area. Widlar current source is useful for obtaining small output
currents.Sensitivity of widlar current source is less compared to constant current source.
Part-B
1. Explain the construction of monolithic bipolar transistor, monolithic diode and integrated
resistors.
Construction of monolithic bipolar transistor
The fabrication of a monolithic transistor includes the following steps.
1. Epitaxial growth
2. Oxidation
3. Photolithography
4. Isolation diffusion
5. Base diffusion
6. Emitter diffusion
7. Contact mask
8. Aluminium metallization
9. Passivation
The letters P and N in the figures refer to type of doping, and a minus (-) or plus (+) with P and N
indicates lighter or heavier doping respectively.
1. Epitaxial growth:
The first step in transistor fabrication is creation of the collector region. We normally require a low
resistivity path for the collector current. This is due to the fact that, the collector contact is normally
taken at the top, thus increasing the collector series resistance and the VCE(Sat) of the device.
The higher collector resistance is reduced by a process called buried layer as shown in figure. In
this arrangement, a heavily doped ‗N‘ region is sandwiched between the N-type epitaxial layer and
P – type substrate. This buried N+ layer provides a low resistance path in the active collector region
to the collector contact C. In effect, the buried layer provides a low resistance shunt path for the
flow of current.
For fabricating an NPN transistor, we begin with a P-type silicon substrate having a resistivity of
typically 1Ω-cm, corresponding to an acceptor ion concentration of 1.4 * 1015 atoms/cm3 . An
oxide mask with the necessary pattern for buried layer diffusion is prepared. This is followed by
masking and etching the oxide in the buried layer mask. The N-type buried layer is now diffused
into the substrate. A slow-diffusing material such as arsenic or antimony is used, so that the buried
layer will stay-put during subsequent diffusions. The junction depth is typically a few microns,
with sheet resistivity of around 20Ω per square. Then, an epitaxial layer of lightly doped N-silicon
is grown on the P-type substrate by placing the wafer in the furnace at 12000 C and introducing a
gas containing phosphorus (donor impurity). The resulting structure is shown in figure.
The subsequent diffusions are done in this epitaxial layer. All active and passive components
are formed on the thin N-layer epitaxial layer grown over the P-type substrate. Obtaining an
epitaxial layer of the proper thickness and doping with high crystal quality is perhaps the most
formidable challenge in bipolar device processing.
2. Oxidation:
As shown in figure, a thin layer of silicon dioxide (SiO2) is grown over the N-type layer by
exposing the silicon wafer to an oxygen atmosphere at about 10000 C.
3. Photolithography:
The prime use of photolithography in IC manufacturing is to selectively etch or remove the SiO2
layer. As shown in figure, the surface of the oxide is first covered with a thin uniform layer of
photosensitive emulsion (Photo resist). The mask, a black and white negative of the requied pattern,
is placed over the structure. When exposed to ultraviolet light, the photo resist under the transparent
region of the mask becomes poly-merized. The mask is then removed and the wafer is treated
chemically that removes the unexposed portions of the photoresist film. The polymerized region is
cured so that it becomes resistant to corrosion. Then the chip is dipped in an etching solution of
hydrofluoric acid which removes the oxide layer not protected by the polymerized photoresist. This
creates openings in the SiO2 layer through which P-type or N-type impurities can be diffused using
the isolation diffusion process as shown in figure. After diffusion of impurities, the polymerized
photoresist is removed with sulphuric acid and by a mechanical abrasion process.
4. Isolation Diffusion:
The integrated circuit contains many devices. Since a number of devices are to be fabricated on the
same IC chip, it becomes necessary to provide good isolation between various components and
their interconnections.
The most important techniques for isolation are:
1. PN junction Isolation
2. Dielectric Isolation
In PN junction isolation technique, the P+ type impurities are selectively diffused into the N-type
epitaxial layer so that it touches the P-type substrate at the bottom. This method generated N-type
isolation regions surrounded by P-type moats. If the P-substrate is held at the most negative
potential, the diodes will become reverse-biased, thus providing isolation between these islands.
The individual components are fabricated inside these islands. This method is very economical,
and is the most commonly used isolation method for general purpose integrated circuits.
In dielectric isolation method, a layer of solid dielectric such as silicon dioxide or ruby surrounds
each component and this dielectric provides isolation. The isolation is both physical and electrical.
This method is very expensive due to additional processing steps needed and this is mostly used
for fabricating IC‘s required for special application in military and aerospace.
The PN junction isolation diffusion method is shown in figure. The process take place in a furnace
using boron source. The diffusion depth must be atleast equal to the epitaxial thickness in order to
obtain complete isolation. Poor isolation results in device failures as all transistors might get
shorted together. The N-type island shown in figure forms the collector region of the NPN
transistor. The heavily doped P-type regions marked P+ are the isolation regions for the active and
passive components that will be formed in the various N-type islands of the epitaxial layer.
5 Base diffusion:
Formation of the base is a critical step in the construction of a bipolar transistor. The base must be
aligned, so that, during diffusion, it does not come into contact with either the isolation region or
the buried layer. Frequently, the base diffusion step is also used in parallel to fabricate diffused
resistors for the circuit. The value of these resistors depends on the diffusion conditions and the
width of the opening made during etching. The base width influences the transistor parameters very
strongly. Therefore, the base junction depth and resistivity must be tightly controlled. The base
sheet resistivity should be fairly high (200- 500Ω per square) so that the base does not inject carriers
into the emitter. For NPN transistor, the base is diffused in a furnace using a boron source. The
diffusion process is done in two steps, pre deposition of dopants at 9000 C and driving them in at
about 12000 C. The drive-in is done in an oxidizing ambience, so that oxide is grown over the base
region for subsequent fabrication steps. Figure shows that P-type base region of the transistor
diffused in the N-type island (collector region) using photolithography and isolation diffusion
processes.
6. Emitter Diffusion:
Emitter Diffusion is the final step in the fabrication of the transistor. The emitter opening must lie
wholly within the base. Emitter masking not only opens windows for the emitter, but also for the
contact point, which provides a low resistivity ohmic contact path for the emitter terminal.
The emitter diffusion is normally a heavy N-type diffusion, producing low-resistivity layer
that can inject charge easily into the base. A Phosphorus source is commonly used so that the
diffusion time id shortened and the previous layers do not diffuse further. The emitter is diffused
into the base, so that the emitter junction depth very closely approaches the base junction depth.
The active base is then a P-region between these two junctions which can be made very narrow by
adjusting the emitter diffusion time. Various diffusion and drive in cycles can be used to fabricate
the emitter. The Resistivity of the emitter is usually not too critical.
The N-type emitter region of the transistor diffused into the P-type base region is shown below.
However, this is not needed to fabricate a resistor where the resistivity of the P-type base region
itself will serve the purpose. In this way, an NPN transistor and a resistor are fabricated
simultaneously.
7. Contact Mask:
After the fabrication of emitter, windows are etched into the N-type regions where contacts are to
be made for collector and emitter terminals. Heavily concentrated phosphorus N+ dopant is
diffused into these regions simultaneously.
The reasons for the use of heavy N+ diffusion is explained as follows: Aluminium, being a
good conductor used for interconnection, is a P-type of impurity when used with silicon.
Therefore, it can produce an unwanted diode or rectifying contact with the lightly doped N material.
Introducing a high concentration of N+ dopant caused the Si lattice at the surface semi-metallic.
Thus the N+ layer makes a very good ohmic contact with the Aluminium layer. This is done by the
oxidation, photolithography and isolation diffusion processes.
8. Metallization:
The IC chip is now complete with the active and passive devices, and the metal leads are to
be formed for making connections with the terminals of the devices. Aluminium is deposited over
the entire wafer by vacuum deposition. The thickness for single layer metal is 1μ m. Metallization
is carried out by evaporating aluminium over the entire surface and then selectively etching away
aluminium to leave behind the desired interconnection and bonding pads as shown in figure.
Metallization is done for making interconnection between the various components fabricated in an
IC and providing bonding pads around the circumference of the IC chip for later connection of
wires
9. Passivation/ Assembly and Packaging:
Metallization is followed by passivation, in which an insulating and protective layer is deposited
over the whole device. This protects it against mechanical and chemical damage during subsequent
processing steps. Doped or undoped silicon oxide or silicon nitride, or some combination of them,
are usually chosen for passivation of layers. The layer is deposited by chemical vapour deposition
(CVD) technique at a temperature low enough not to harm the metallization.
Monolithic diodes
The diode used in integrated circuits are made using transistor structures in one of the five possible
connections. The three most popular structures are shown in figure. The diode is obtained from a
transistor structure using one of the following structures.
1. The emitter-base diode, with collector short circuited to the base.
2. The emitter-base diode with the collector open and
3. The collector –base diode, with the emitter open-circuited.
The choice of the diode structure depends on the performance and application desired. Collector
base diodes have higher collector-base arrays breaking rating, and they are suitable for common
cathode diode arrays diffused within a single isolation island. The emitter-base diffusion is very
popular for the fabrication of diodes, provided the reverse-voltage requirement of the circuit does
not exceed the lower base-emitter breakdown voltage.
Integrated Resistors:
A resistor in a monolithic integrated circuit is obtained by utilizing the bulk resistivity of
the diffused volume of semiconductor region. The commonly used methods for fabricating
integrated resistors are 1. Diffused 2. epitaxial 3. Pinched and 4. Thin film techniques.
Diffused Resistor:
The diffused resistor is formed in any one of the isolated regions of epitaxial layer during base or
emitter diffusion processes. This type of resistor fabrication is very economical as it runs in parallel
to the bipolar transistor fabrication. The N-type emitter diffusion and P-type base diffusion are
commonly used to realize the monolithic resistor.
The diffused resistor has a severe limitation in that, only small valued resistors can be fabricated.
The surface geometry such as the length, width and the diffused impurity profile determine the
resistance value. The commonly used parameter for defining this resistance is called the sheet
resistance. It is defined as the resistance in ohms/square offered by the diffused area.
In the monolithic resistor, the resistance value is expressed by
R = Rs 1/w where R= resistance offered (in ohms)
Rs = sheet resistance of the particular fabrication process involved (in ohms/square)
l = length of the diffused area and
w = width of the diffused area.
The sheet resistance of the base and emitter diffusion in 200Ω/Square and 2.2Ω/square respectively.
For example, an emitter-diffused strip of 2mil wide and 20 mil long will offer a resistance of 22Ω.
For higher values of resistance, the diffusion region can be formed in a zig-zag fashion resulting in
larger effective length. The poly silicon layer can also be used for resistor realization.
Epitaxial Resistor:
The N-epitaxial layer can be used for realizing large resistance values. The figure shows the cross
sectional view of the epitaxial resistor formed in the epitaxial layer between the two N+ aluminium
metal contacts.
Pinched resistor:
The sheet resistance offered by the diffusion regions can be increased by narrowing down
its cross-sectional area. This type of resistance is normally achieved in the base region. Figure
shows a pinched base diffused resistor. It can offer resistance of the order of mega ohms in a
comparatively smaller area. In the structure shown, no current can flow in the N-type material since
the diode realized at contact 2 is biased in reversed direction. Only very small reverse saturation
current can flow in conduction path for the current has been reduced or pinched. Therefore, the
resistance between the contact 1 and 2 increases as the width narrows down and hence it acts as a
pinched resistor.
Thin film resistor:
The thin film deposition technique can also be used for the fabrication of monolithic
resistors. A very thin metallic film of thickness less than 1μm is deposited on the silicon dioxide
layer by vapour deposition techniques. Normally, Nichrome (NiCr) is used for this process. Desired
geometry is achieved using masked etching processes to obtain suitable value of resistors. Ohmic
contacts are made using aluminium metallization as discussed in earlier sections.
The cross-sectional view of a thin film resistor as shown in figure. Sheet resistances of 40
to 400Ω/ square can be easily obtained in this method and thus 20kΩ to 50kΩ values are very
practical.
The advantages of thin film resistors are as follows:
1. They have smaller parasitic components which makes their high frequency behaviour
good.
2. The thin film resistor values can be very minutely controlled using laser trimming.
3. They have low temperature coefficient of resistance and this makes them more stable.
The thin film resistor can be obtained by the use of tantalum deposited over silicon dioxide layer.
The main disadvantage of thin film resistor is that its fabrication requires additional processing
steps.
2. Explain the monolithic IC manufacturing process for a circuit which consists of Transistor,
diode,resistor and capacitor.
To know the basics a sample circuit must be considered to be converted to its monolithic form. With basic
components like resistor, diode, and transistor a basic circuit is first made.
With the basic circuit, the different layers for the monolithic IC are then considered. The basic structure
of a monolithic IC will have 4 layers of different materials. The base layer will be a P-type silicon layer
and is named as the substrate layer. This layer will have a typical thickness of 200 micrometer. Silicon
is the preferred semiconductor for the P-type and N-type layer because of its favourable characteristics
for the manufacturing of an IC.
The layer above the substrate P-type silicon layer is the N-type layer. All the active and passive
components required for the circuit are fabricated onto this layer. This layer has a typical thickness of
25 micrometer. The N-type silicon material is grown as a single crystal extension of the P-layer and the
components are required are fabricated using series of P-type and N-type impurity diffusions. The N-
type layer becomes the collector for the transistor or an element for a diode or a capacitor.
Basic Monolithic IC
The layer above N-type is made of silicon dioxide (SiO2) material. Since there is a selective P-type and
N-type impurity diffusion going on in the second layer, this layer acts as a barrier in the process. This
layer is etched away from the region where diffusion is desired to be permitted with photolithographic
process. The rest of the wafer remains protected against diffusion. This layer also protects the silicon
layer from contamination.
The up-most layer is that made of aluminium. This metallic layer is used to provide interconnections
between the different components used in the IC.
Monolithic IC - Photolithographic-Process
5. Isolation Diffusion
After photolithographic process the remaining SiO2 layer serves as a mask for the diffusion of acceptor
impurities. To get a proper time period for allowing a P-type impurity to penetrate into the N-type
epitaxial layer, isolation diffusion is to be carried out. By this process, the P-type impurity will travel
through the openings in SiO2 layer, and the N-type layer and thus reach the P-type substrate, Isolation
junctions are used to isolate between various components of the IC. The temperature and time period of
isolation diffusion should be carefully monitored and controlled. As a result of isolation diffusion, the
formation of N-type region called Isolation Island occurs. Each isolated island is then chosen to grow
each electrical component. From the figure below you can see that the isolation islands look like back-
to-back P-N junctions. The main use if this is to allow electrical isolation between the different
components inside the IC. Each electrical element is later on formed in a separate isolation island. The
bottom of the N-type isolation island ultimately forms the collector of an N-P-N transistor. The P-type
substrate is always kept negative with respect to the isolation islands and provided with reverse bias at
P-N junctions. The isolation will disappear if the P-N junctions are forward biased.
7. Emitter Diffusion
Masking and etching process is again carried out to form a layer of silicon dioxide over the entire surface
and opening of the P-type region. The transistor emitters, the cathode regions for diodes, and junction
capacitors are grown by diffusion using N-type impurities like phosphorus through the windows created
through the process under controlled environmental process. As shown in the figure below there are two
additional windows: W1 and W2. These windows are made in the N-region to carry an aluminium
metallization process.
3. Explain that how different circuit elements like capacitors, transistors, diodes, and resistors are
fabricated into an IC
Transistors
The fabrication process of a transistor is shown in the figure below. A P-type substrate is first grown
and then the collector, emitter, and base regions are diffused on top of it as shown in the figure. The
surface terminals for these regions are also provided for connection.
Both transistors and diodes are fabricated by using the epitaxial planar diffusion process that is
explained earlier. In case of discrete transistors, the P-type substrate is considered as the collector.
`But this is not possible in monolithic IC’s, as all the transistors connected on one P-type substrate
would have their collectors connected together. This is why separate collector regions are diffused
into the substrate.
Even though separate collector regions are formed, they are not completely isolated from the
substrate. For proper functioning of the circuit it is necessary that the P-type substrate is always kept
negative with respect to the transistor collector. This is achieved by connecting the substrate to the
most negative terminal of the circuit supply. The unwanted or parasitic junctions, even when reverse-
biased, can still affect the circuit performance adversely. The junction reverse leakage current can
cause a serious problem in circuits operating at very low current levels. The capacitance of the
reverse-biased junction may affect the circuit high-frequency performance, and the junction
breakdown voltage imposes limits on the usable level of supply voltage. All these adverse effects
can be reduced to the minimum if highly resistive material is employed for the substrate. If the
substrate is very lightly doped, it will behave almost as an insulator.
Diodes
They are also fabricated by the same diffusion process as transistors are. The only difference is that
only two of the regions are used to form one P-N junction. In figure, collector-base junction of the
transistor is used as a diode. Anode of the diode is formed during the base diffusion of the transistor
and the collector region of the transistor becomes the cathode of the diode. For high speed switching
emitter base junction is used as a diode.
Resistors
The resistors used in IC’s are given their respective ohmic value by varying the concentration of
doping impurity and depth of diffusion. The range of resistor values that may be produced by the
diffusion process varies from ohms to hundreds of kilohms. The typical tolerance, however, may be
no better than ± 5%, and may even be as high as ± 20%. On the other hand, if all the resistors are
diffused at the same time, then the tolerance ratio may be good. Most resistors are formed during
the base diffusion of the integrated transistor, as shown in figure below. This is because it is the
highest resistivity region. For low resistance values, emitter region is used as it has much lower
resistivity.
Another diffusion technique is also used for the growth of IC resistors. It is basically a thin-film
technique. In this process a metal film is deposited on a glass or Si02 surface. The resistance value
can be controlled by varying thickness, width and length of the film. Since diffused resistors can be
processed while diffusing transistors. This technique is more economic and less time consuming and
therefore, the most widely used.
Capacitors
The figure below shows the P and N-regions forming the capacitor plates. The dielectric of the
capacitor is the depletion region between them.
All P-N junctions have capacitance so capacitors may be produced by fabricating junctions. The
amount of change in the reverse bias varies the value of junction capacitance and also the depletion
width. The value may be as less as 100 picoFarads.
Using the silicon dioxide as a dielectric may also be a way to fabricate capacitors. One plate of the
capacitors is formed by diffusing a heavily doped N-region. The other plate of the capacitor is
formed by depositing a film of aluminium on the silicon dioxide dielectric on the wafer surface. For
such a capacitor, a voltage of any polarity can be used, and when comparing a diffused capacitor
with such a capacitor the diffused capacitor may have very small values of breakdown voltage.
4. Explain the operation of BJT Differential amplifier with various modes of operation.
Differential Amplifier is a dc-coupled amplifier that amplifies the difference between two
input signals. It is the building block of analog integrated circuits and operational amplifiers
(op-amp). One of the important feature of differential amplifier is that it tends to reject or nullify
the part of input signals which is common to both inputs. This provides very good noise
immunity in a lot of applications. Let’s see the block diagram of a differential amplifier.
Vi1 and Vi2 are input terminals and Vo1 and Vo2 are output terminals with respect to ground. We
can feed two input signals at the same time or one at a time. In the former case it is called dual
input otherwise it is single input. Similarly there are two ways to take output also. If the output
is taken from one terminal with respect to ground, it is unbalanced output or if the output is
taken between two output terminals, it is balanced output.
The simplest form of differential amplifier can be constructed using Bipolar Junction Transistors
as shown in the below circuit diagram. It is constructed using two matching transistors in
common emitter configuration whose emitters are tied together.
Configurations
Based on the methods of providing input and taking output, differential amplifiers can have four
different configurations as below
1. Single Input Unbalanced Output
2. Single Input Balanced Output
3. Dual Input Unbalanced Output
4. Dual Input Balanced Output
Single Input Unbalanced Output
In this case, only one input signal is given and the output is taken from only one of the two
collectors with respect to ground as shown below.
DC Analysis
DC analysis provides the operating point values ICQ and VCEQ for the transistors used in the circuit.
The DC equivalent circuit obtained by reducing all AC signals to zero as shown in figure below.
We can determine operating point values using equations (3) and (4). Since two transistors are identical,
same equations can be used for both.
IE = IC = (VEE – VBE)/2RE
VCE = VCC + VBE – ICRC
AC Analysis
We can find Voltage Gain Ad and Input Resistance Ri of the differential amplifier by doing AC Analysis.
The ac equivalent circuit is obtained by reducing all DC voltage sources to zero and replacing transistor
with its equivalent.
= -RCic2 – (-RCic1)
= Rc(ic1 – ic2)
=> Rc(ie1 – ie2) —————–(7)
= Vin1/(ie1/β)
RE >> re‘
re‘ + 2RE ≈ 2RE
re‘ + RE ≈ RE
Ri1 = 2βre‘
Ri1 = 2βre‘
Similarly,
Ri2 = 2βre‘
Output resistance
The effective resistance measured at output terminal with respect to ground. So the output resistance is
measured between the collector and the ground, which is same as the collector resistance RC.
RO1 = RO2 = RC.
Common Mode Rejection Ratio (CMRR)
Dual input balanced output differential amplifier should suppress the common signals present at its
inputs. A differential amplifier is said to be in common mode when same signal is applied to both inputs
and the expected output will be zero, ie ideally common mode gain is zero.
=|Ad/Ac|
Unit of CMRR is dB
CMRR = 20log|Ad/Ac|
As mentioned earlier, ideally output will be zero in common mode which implies infinite CMRR.
1.What is OPAMP?
An operational amplifier is a direct coupled high gain amplifier consisting of one or more differential
amplifiers, followed by a level translator and an output stage. It is a versatile device that can be used to
amplify ac as well as dc input signals & designed for computing mathematical functions such as addition,
subtraction , multiplication, integration & differentiation.
The open loop gain of the op-amp is not a constant and it varies with changing the temperature and
variations in power supply.Also the bandwidth of the open loop op-amp is negligibly small.For this
reasons open loop OP-AMP configurations are not used in linear applications.
31. What happens when the common terminal of V+ and V- sources is not grounded? (DEC 09)
If the common point of the two supplies is not grounded, twice the supply voltage will get applied
and it may damage the op-amp.
32. In practical op-amps, what is the effect of high frequency on its performance?
The open-loop gain of op-amp decreases at higher frequencies due to the presence of parasitic
capacitance. The closed-loop gain increases at higher frequencies and leads to instability.
34. Define input offset current. State the reasons for the offset currents at the input of the op-
amp.
The difference between the bias currents at the input terminals of the op-amp is called as input offset
current. The input terminals conduct a small value of dc current to bias the input transistors. Since
the input transistors cannot be made identical, there exists a difference in bias currents.
35.Define sensitivity.
Sensitivity is defined as the percentage or fractional change in output current per percentage or
fractional change in power-supply voltage.
Part B
1. What is a filter?
Filter is a frequency selective circuit that passes signal of specified band of frequencies and
attenuates the signals of frequencies outside the band
Fc=√f1f2.=632.455
B.W.=f2-f1=1800;
Q=0.351
If Q<10; SO THE GIVEN FILTER IS WIDE BAND PASS FILTER
9. Write transfer function of op amp as an integer.
The transfer function of the integer is
│A│=1/ωRfC.
10. Draw the frequency response of ideal LPF, HPF, BPF and BSF.
Refer: text book
11. List the characteristics of Voltage Regulator
Constant Output Voltage
Vin≤Vout+2
Voltage Regulator Should provide Output current which can drive other circuits
Thermal shutdown
Line and load regulation
Ripple rejection
Current protection
Switching regulators are those which operate the power transistor as a high frequency on/off switch, so
that the power transistor does not conduct current continously.This gives improved efficiency over
series regulators.
Load regulation is defined as the change in output voltage for a change in load current. It is expressed
in millivolts or as a percentage of the output voltage.
Current limiting refers to the ability of a regulator to prevent the load current from increasing above a
preset value.
*The input step down transformer is bulky and expensive because of low line frequency.
*Because of low line frequency,large values of filter capacitors are required to decrease the ripple.
*Efficiency is reduced due to the continous power dissipation by the transistor as it operates in the
linear region.
Power supply ripple rejection ratio (PSRR) is a measure of how well a circuit rejects ripple coming from
the input power supply at various frequencies and is very critical in many RF and wireless applications
current Foldback is a current limiting feature (a type of overload protection) of power supplies and power
amplifiers. When the load attempts to draw overcurrent from the supply, foldback reduces both the output
voltage and current to well below the normal operating limits.
Low dropout refers to the difference between the input and output voltages that allow the IC to
regulate the output load voltage. That is, an LDO can regulate the output load voltage until its input
and output approach each other at the dropout voltage. Ideally, the dropout voltage should be as low as
possible to minimize power dissipation and maximize efficiency. Typically, dropout is considered to
be reached when the output voltage has dropped to 100 mV below its nominal value. The load current
and pass transistor temperature affect the dropout voltage.
Part-B
1. Design of first order LPF
2. Discuss about the design of second order low pass filter.
3. Discuss about the design of first order High pass filter.
4. Discuss about the second order High pass filter design with its frequency response
1. What is a multivibrator?
Multivibrators are a group of regenerative circuits that are used extensively in timing applications.
It is a wave shaping circuit which gives symmetric or asymmetric square output. It has two states
either stable or quasi- stable depending on the type of multivibrator.
Aβ =1; Aβ =0 (or)360
0 0
1. The total phase shift around the loop must be zero at the desired frequency of oscillation
2. At fo, the magnitude of the loop gain |Aβ| should be equal to unity.
7. Find the duty cycle of Astable Multivibrator when RA=RB=10 kilo ohm.
Duty Cycle=T /T
ON TOTAL
=RARA+2RB
=0.33;=33.33%
astable multivibrator
monostable multivibrator
Missing pulse detector
Linear ramp generator
Frequency divider
Pulse width modulation
FSK generator
Pulse position modulator
Schmitt trigger
FSK generator
Pulse-position modulator.
The 555 timer is an integrated circuit specifically designed to perform signal generation and timing
functions.
The ratio of high output and low output period is given by a mathematical parameter called duty cycle.
It is defined as the ratio of ON Time to total time.
A voltage controlled oscillator is an oscillator circuit in which the frequency of oscillations can be
controlled by an externally applied voltage.
A PLL is a basically a closed loop system designed to lock output frequency and phase to the
frequency and phase of an input si
21. List out the various methods available for performing for analog multiplier.
• Logarithmic summing technique
• Pulse height /width modulation technique
• Variable transconductance technique
• Multiplication using gilbert cell
• Multiplication technique using transconductance technique
23. What are the three stages through which PLL operates?
1.Free running
2.Capture
3.Locked/ tracking
: f0-f1=500k-600k;=100 KHz
As both the components are outside the pass band of low pass filter, the loop will acquire lock.
Part-B
1. Draw the pin configuration of IC 555 TIMER and explain the Monostable mode of
operation.
2. Explain the operation of Astable mode of operation of IC 555 TIMER
3. Explain the operation of PLL.
4. Discuss about FSK Modulator and demodulator using PLL
Unit V-A/D CONVERTERS, D/A CONVERTERS
Absolute accuracy:
It is the maximum deviation between the actual converter output & the ideal converter output.
Relative accuracy:
It is the maximum deviation after gain & offset errors have been removed. The accuracy of a
converter is also specified in form of LSB increments or % of full scale voltage.
Part B
Another type of ADC is parallel ADC. Parallel ADC is called as Flash ADC. Its response is very fast. It
converts analog signal into digital signal using parallel set of comparators. As its conversion time is very
fast it is called as flash ADC.
n-bit Flash ADC consist of parallel combination of 2^n-1 comparators. Outputs of all comparators are
connected to an encoder.
Analog voltage is applied to non inverting terminals of all comparators using a single line. Reference
voltage is applied to inverting terminals of comparators using divider circuit.
Each comparator produces digital output in the form of 1 or 0. If unknown analog voltage is greater than
reference voltage comparator produces high logic. If analog voltage is less than reference voltage then
comparator produces low logic i.e. 0.
Thus all parallel comparator produces digital representation of analog voltage in the form of zero and
one. These outputs of comparator are then applied to the fast encoder. Encoder converts those zeros and
once into binary number and produces digital binary output.
For example, see below table. When unknown voltage is 5 i.e. lies between 4.375 &5.625 is applied to
the flash ADC, first four encoders produces output ‘1’ and last three encoders produces output ‘0’.
Encoder converts this ‘1111000’ comparator output into ‘100’ binary number as digital output.
Table shows the outputs of comparators and encoder for a 3 bit flash ADC. The range of operation is
given as 0-10V.
Analog input Comparator Output Encoder Output
(V)
C1 C2 C3 C4 C5 C6 C7 D2 D1 D0
0.000-0.625 0 0 0 0 0 0 0 0 0 0
0.625-1.875 1 0 0 0 0 0 0 0 0 1
1.875-3.125 1 1 0 0 0 0 0 0 1 0
3.125-4.375 1 1 1 0 0 0 0 0 1 1
4.375-5.625 1 1 1 1 0 0 0 1 0 0
5.625-6.875 1 1 1 1 1 0 0 1 0 1
6.875-8.125 1 1 1 1 1 1 0 1 1 0
8.125-10.000 1 1 1 1 1 1 1 1 1 1
As the number of bits of ADC increases its resolution increases. But such high bit converter is bulky and
expensive.