DIGITAL COMMUNICATIONS

LAB MANUAL

Subject Code: AEC105

Class: III Year I Semester (ECE)

Prepared By
T.Nagarjuna
Assistant Professor,
ECE Dept.

Department of Electronics and Communication Engineering

INSTITUTE OF AERONAUTICAL ENGINEERING

Dundigal – 500 043, Hyderabad
 INSTITUTE OF AERONAUTICAL ENGINEERING
Dundigal, Hyderabad - 500 043

ELECTRONICS AND COMMUNICATION ENGINEERING

Program Outcomes
PO1 Engineering knowledge : An ability to apply knowledge of basic sciences, mathematical
skills, engineering and technology to solve complex electronics and communication
Engineering problems (Fundamental Engineering Analysis Skills ).
PO2 Problem analysis : An ability to identify, formulate and analyze engineering problems using
Knowledge of Basic Mathematics and Engineering Sciences. (Engineering Problem Solving
Skills).
PO3 Design/development of solutions : An ability to provide solution and to design Electronics
and Communication Systems as per social needs(Social Awareness)
PO4 Conduct investigations of complex problems: An ability to investigate the problems in
Electronics and Communication field and develop suitable solutions (Creative Skills).
PO5 Modern tool usage An ability to use latest hardware and software tools to solve complex
Engineering problems (Software and Hardware Interface).
PO6 The engineer and society: An ability to apply knowledge of contemporary issues like health,
Safety and legal which influences engineering design (Social Awareness).
PO7 Environment and sustainability An ability to have awareness on society and environment
for sustainable solutions to Electronics & Communication Engineering problems( Social
awareness ).
PO8 Ethics: An ability to demonstrate understanding of professional and ethical
Responsibilities (Engineering impact assessment skills).
PO9 Individual and team work : An ability to work efficiently as an individual and in
Multidisciplinary teams (Team Work).
PO10 Communication: An ability to communicate effectively and efficiently both in verbal and
Written form (Communication Skills).
PO11 Project management and finance : An ability to develop confidence to pursue higher
Education and for life-long learning (Continuing education awareness).
PO12 Life -long learning : An ability to design, implement and manage the electronic projects for
real world applications with optimum financial resources(Practical engineering analysis
Skills).
Program Specific Outcomes
PSO1 Professional Skills: An ability to understand the basic concepts in Electronics &
Communication Engineering and to apply them to various areas, like Electronics,
Communications, Signal processing, VLSI, Embedded systems etc., in the design and
Implementation of complex systems.
PSO2 Problem-solving skills: An ability to solve complex Electronics and communication
Engineering problems, using latest hardware and software tools, along with analytical skills
to arrive cost effective and appropriate solutions.
PSO3 Successful career and Entrepreneurship: An understanding of social-awareness &
environmental-wisdom along with ethical responsibility to have a successful career and to
sustain passion and zeal for real-world applications using optimal resources as an
Entrepreneur.
 DIGITAL COMMUNICATIONS LAB SYLLABUS

Function Generator: 0-500MHz

RF Generators: A, B, C, D, E, F
band of frequencies

S. No. List of Page No.

Experiments
1 Sampling Theorem – Verification
2 Pulse Amplitude Modulation and Demodulation
3 Pulse Width Modulation and Demodulation
4 Pulse Position Modulation and Demodulation
5 PCM Generation and Detection.
6 Differential Pulse Code modulation.
7 Delta modulation.
8 Frequency Shift Keying: Generation and Detection.
9 Phase Shift Keying: Generation and Detection.
10 DPSK: Generation and Detection.
11 Amplitude Shift Key(Ask)
12 Study Of The Spectral Characteristics of PAM and QAM
13 Quadrature Phase Shift Keying
14 MATLAB For QPSK & DPSK.
 ATTAINMENT OF PROGRAM OUTCOMES
& PROGRAM SPECIFIC OUTCOMES
Program
Program
Exp. Specific
Experiment Outcomes
No. Outcomes
Attained
Attained
PO1, PO2
1 Sampling theorem PSO1

2 Pulse Amplitude modulation PO1, PO2 PSO1

PSO1, PSO2
3 Pulse width modulation PO1, PO2

4 Pulse position modulation PO1, PO2 PSO1

PO1, PO2, PO3 PSO1, PSO2

5 PCM Generation and Detection.

PO1, PO2, PO3

6 Differential Pulse Code modulation. PSO1 PSO2

7 Delta modulation. PO1, PO2 PO3 PSO1 PSO2

8 Frequency Shift Keying: Generation and Detection. PO1, PO2 PSO1

9 Phase Shift Keying: Generation and Detection. PO1, PO2 PO3 PSO1 PSO2

10 DPSK: Generation and Detection. PO1, PO2 PO3 PSO1 PSO2

11 Amplitude Shift Key: Generation and Detection. PO1, PO2 PO3 PSO1 PSO2

12 Study Of The Spectral Characteristics of PAM and QAM PO1, PO2 PSO1

13 Quadrature Phase Shift Keying PO1, PO2,PO3 PSO1 PSO2

14 MATLAB for QPSK & DPSK. PO1, PO2, PO3 PSO1

 DIGITAL COMMUNICATIONS LABORATORY
OBJECTIVE:

This laboratory course builds on the "digital communications" which is mandatory for all
students of electronics and communication engineering. The course aims at practical experience
with the processing the digital signals for various modulations and demodulations. Experiments
cover fundamental concepts of the digital modulation and demodulation process. The objective
of this laboratory is to enable the students to acknowledge with various digital modulation
techniques. They can critically analyze the behavior of their implementation

OUTCOMES:
Upon the completion of Digital Communications practical course, the student will be
able to:

1. Understand Basics of conversions from analog signals into digital signals.

2. Analyze the generation Various Signals and detection of the signals.
3. Determine the bandwidth and phase of the signals.
 EXPERIMENT No: 1
VERIFICATION OF SAMPLING THEOREM
1.1 Aim
To perform and verify the sampling theorem and reconstruction of sampled wave form.
1.2 Equipment Required

S.No Equipment / Components Required Range Quantity

1 Sampling Theorem Trainer Kit ----- 1
2 Function Generator (0-2) MHz 1
3 C.R.O. (0-30) MHz 1
4 Connecting wires. ---- -
5. BNC Probes

1.3 Theory
Sampling theorem states that if the sampling rate in any pulse modulation system exceeds twice the
maximum signal frequency the original signal can be reconstructed in the receiver with minimum distortion.
Let m (t) be a signal whose highest frequency component is fm. Let the value of m (t) be obtained at regular
intervals separated by time T far far less than (1/2 fm) The sampling is thus periodically done at each TS
seconds. Now the samples m(nTS ) where n is an integer which determines the signals uniquely. The signal
can be reconstructed from these samples without distortion.

Time Ts is called the SAMPLING TIME.

The minimum sampling rate is called NYQUIST RATE.

The validity of sampling theorem requires rapid sampling rate such that at least two samples are obtained
during the course of the interval corresponding to the highest frequency of the signal under analysis. Let us
consider an example of a pulse modulated signal, containing speech information, as is used in telephony.
Over standard telephone channels the frequency range of A.F. is from 300 Hz to 3400 Hz. For this
application the sampling rate taken is 8000 samples per second. This is an International standard. We can
observe that the pulse rate is more than twice the highest audio frequency used in this system. Hence the
sampling theorem is satisfied and the resulting signal is free from sampling error.
1.4 Circuit Diagram

1.5 Procedure
1. Connections are made as per the Circuit diagram.
2. Apply the input signal with a frequency of 500Hz (VP-P) using a function generator.
3. Sampling clock frequency which is variable of 3 KHz to 50KHz should be connected across the
terminals which is indicated.
4. Now observe the sampling output of the circuit at the o/p.
5. By using the capacitors provided on the trainer, reconstruct the signal and
Verify it with the given input.
6. Reconstructed signal voltage will be depends on capacitor value.
7. Vary the sampling frequency and study the change in reconstructed signal.
8. If the sampling clock frequency is below 20 KHz you will observe the distorted demodulated output.

1.6 Matlab Program

close all;
clear all
clc
t=-10:.01:10;
T=4;
fm=1/T;
x=cos(2*pi*fm*t); % input signal
subplot(2,2,1);
plot(t,x);
xlabel('time');
ylabel('x(t)');
title('continous time signal');
grid;
n1=-4:1:4;
fs1=1.6*fm;
fs2=2*fm;
fs3=8*fm;
%discrete time signal with fs<2fm
x1=cos(2*pi*fm/fs1*n1);
subplot(2,2,2);
stem(n1,x1);
xlabel('time');
ylabel('x(n)');
title('discrete time signal with fs<2fm');
hold on
subplot(2,2,2);
 plot(n1,x1)
grid;
%discrete time signal with fs=2fm
n2=-5:1:5;
x2=cos(2*pi*fm/fs2*n2);
subplot(2,2,3);
stem(n2,x2);
xlabel('time');
ylabel('x(n)');
title('discrete time signal with fs=2fm');
hold on
subplot(2,2,3);
plot(n2,x2)
%discrete time signal with fs>2fm
grid;
n3=-20:1:20;
x3=cos(2*pi*fm/fs3*n3);
subplot(2,2,4);
stem(n3,x3);
xlabel('time');
ylabel('x(n)');
title('discrete time signal with fs>2fm');
hold on
subplot(2,2,4);
plot(n3,x3)
grid;

1.7 Expected Waveforms

1.8 Precautions
1. Check the connections before giving the power supply
2. Observation should be done carefully
1.9 Expected Waveforms

1.10 Pre Lab Questions

1. Define Sampling Theorem.
2. What is aliasing effect?
3. Explain Need for Sampling?

1.11 Lab Assignment

1. Observe the Sampling output of Triangular wave.
2. Observe the reconstruction waveform for fs<2fm.

1.12 Post Lab Questions

1. Define Nyquist Rate.

2. Explain different methods of Sampling.
3. How Sampling affects the input signal.

Result:
Hence, sampling theorem is verified and the sampled waveform is reconstruct
 EXPERIMENT No: 2
PULSE AMPLITUDE
MODULATION AND DEMODULATION

2.1 Aim
To perform the operation pulse amplitude modulation and demodulation using Trainer Kits

2.2 Equipment / Components Required

S.No Equipment / Components Required Range Quantity

1 Pulse amplitude modulation trainer(PHY-60) -------- 1
2 Signal generator
3 C.R.O. (0-30)MHz 1
4 Connecting wires. ------- -

2.3 Theory
Pulse Amplitude Modulation (PAM) is the simplest and most basic form of analog pulse modulation, In
PAM, the amplitudes of regularly spaced pulses are varied in proportional to the corresponding sample
values of a continuous message signal; the pulses can be of a rectangular form or some other appropriate
shape.
2.4 Circuit diagram

2.5 Procedure
1. Switch on Physitech‟s pulse Amplitude modulation and demodulatioin trainer.
2. In clock generator section connect pin 6 of 555IC to the 33pfcapacitor terminal.
3. Check the clock generator (RF) output signal.
4. Connect RF output of clock generator to the RF input of modulator section.
5. Connect a 1 KHz; 2vp-p of sine wave from function generator to the AF input of modulator section.
6. Short the 10F terminal and 10k terminal of modulator.
7. Connect 10k terminal to pin 1 of IC 4016.
8. Connect the CRO to modulated output of modulator section.
 9. Adjust the 1k potentiometer to vary the amplitude of the modulatd signal.
10. Adjust the AF signal frequency from 1KHZ-10KHZ to get stable output waveform. While increases
the AF signal freqency decreses the output signal pulses.
11. During demodulation, connect the the modulated output to the PAM input of
Demodulator section.
12. Connect channel 1 of CRO to modulating signal and channel-2 to demodulated output. Observe the
two waveforms that they are 1800out of phase, since the transistor detector operates in CE
configuration.
2.6 Precautions
1. Check the connections before giving the power supply
2. Observation should be done carefully
2.7 Matlab Program
close all
clear all
clc
t = 0 : 1/1e3 : 4; % 1 kHz sample freq for 1 sec
d = 0 : 1/5 : 4;
x = sin(2*pi/4*2*t); %message signal
figure;
subplot(3,1,1)
plot(x);
title('message');
xlabel('time');
ylabel('amplitude');
y = pulstran(t,d,'rectpuls',0.1); %generation of pulse input
subplot(3,1,2)
plot(y);
title('Pulse Input ');
xlabel('time');
ylabel('amplitude');
z=x.*y; % PAM output
subplot(3,1,3)
plot(z);
title('PAM modulation ');
xlabel('time');
ylabel('amplitude');
2.8 Expected Waveforms:

2.9 Pre Lab Questions

1. Compare pulse modulation with continuous modulation
2. Classify pulse modulation Techniques
3. What are applications of pulse modulation techniques

2.11 Post Lab Questions

1. Explain PAM generation?
2. Write Merits and Demerits of PAM.
3. What is the BW of PAM?
4. Explain PAM demodulation

Result: Hence Pulse amplitude modulation and demodulation is Verified.

 EXPERIMENT No: 3
PULSE WIDTH
MODULATION & DEMODULATION

3.1 Aim
To perform Pulse Width Modulation and Demodulation using Trainer kit.
3.2 Equipment / Components Required
1. Physitech‟s Pulse width modulation and Demodulation Trainer.
2. CRO
3. BNC probes and Connecting Wires
3.3 Theory
The Pulse-width modulation of PTM is also called as Pulse-duration modulation (PDM), or pulse length
modulation (PLM). In this modulation, the pulses have constant amplitude and variable time duration. The
time duration (or width) of each pulse is proportional to the instantaneous amplitude of the modulating
signal. In this system, as shown in fig. below, we have fixed amplitude and starting time of each pulse, but
the width of each pulse is made proportional to the amplitude of the signal at that instant. In this case, the
narrowest pulse represents the most negative sample of the original signal and the widest pulse represents the
largest positive sample. When PDM is applied to radio transmission, the carrier frequency has constant
amplitude, and the transmitter on time is carefully controlled.

3.4 Procedure
1. Switch on pulse width modulation and Demodulation trainer kit
2. Connect the Clk O/P to the clk I/P terminal of PWM modulation.
3. Connect the AF O/P to AF I/P terminal of PWM modulation.
4. Observe the PWM O/P at pin 3 of 555 IC on CRO.
5. By varying frequency and amplitude of the modulating signal, observe the corresponding change in
the width of the output pulses.
6. During demodulation, connect the PWM O/P of PWM modulation to the PWM I/P of PWM
demodulation.
7. Observe the demodulated output at AF O/P of PWM demodulation on CRO.
3.5 Matlab Program
clc;
clear all;
close all;
f2=input('message frequency=');
f1=input('carrier sawtooth frequency=');
A=5;
t=0:0.001:1;
c=A.*sawtooth(2*pi*f1*t);
subplot(3,1,1);
plot(t,c);
xlabel('time');
ylabel('amplitude');
title('carrier sawtooth wave');
grid on;
m=0.75*A.*sin(2*pi*f2*t);
subplot(3,1,2);
plot(t,m);
xlabel('time');
ylabel('amplitude');
title('message signal');
grid on;
n=length(c);
for i=1:n
if(m(i)>=c(i))
pwm(i)=1;
else
pwm(i)=0;
end
end
subplot(3,1,3);
plot(t,pwm);
xlabel('time');
ylabel('amplitude');
title('plot of pwm');
axis([0 1 0 2]);
grid on;

3.6 Expected Waveforms

3.7 PI N DIAGRAM OF IC 555 TIMER

3.8 Expected waveforms (Hardware)

3.9 Pre Lab Questions

1. Compare pulse modulation with continuous modulation

2. Classify pulse modulation Techniques
3. What are applications of pulse modulation techniques?
3.10 Lab Assignment
1. Observe spectrum of PWM wave

3.11 Post Lab Questions

1. Explain PWM generation?
2. Write Merits and Demerits of PWM.
3. What is the BW of PWM?
4. Explain PWM demodulation

Result:
Hence Pulse width modulation and demodulation is demonstrated and verified.
 EXPERIMENT No: 4
PULSE POSITION
MODULATION & DEMODULATION

4.1 Aim
To perform the operation of pulse position modulation and demodulation using trainer kit.
4.2 Equipment/Components Required
1. Physitech‟s Pulse position modulation and demodulation trainer.
2. CRO
3. BNC probes and Connecting Wires
4.3 Theory
Pulse position modulation (PPM) is more efficient than PAM or PDM for radio transmission. In PPM all
pulses have the same constant amplitude and narrow pulse width. The position in time of the pulses is made
to vary in proportion to the amplitude of the modulating signal. The simplest modulation process for pulse
position modulation is a PDM system with the addition of a monostable multivibrator as shown in fig.
below. The monostable is arranged so that it is triggered by the trailing edges of the PDM pulses. Thus, the
monostable output is a series of constant-width, constant- amplitude pulses which vary in position according
to the original signal amplitude.
PPM uses less power than PDM and essentially has all the advantages of PDM. One disadvantage of PPM is
that the demodulation process, to recover the original signal is more difficult than with PDM.
4.4 Procedure
1. Switch on PPM modulator and demodulator trainer kit.
2. Connect the CLK O/P to the Pin 2 of 555 IC.
3. Connect the AF O/P to the pin 5 of 555 IC.
4. Observe the PPM O/P at pin 3 of second IC 555 on CRO.
5. Connect the PPM O/P to the PPM I/P of PPM demodulation.
6. Observe the demodulated O/P on CRO.

4.5 Circuit Diagram

4.6 MatLab Program
clc;
clear all;
close all;
fc=50;
fs=1000;
f1=100;f2=300;
t=0:1/fs:((2/f1)-(1/fs));
x1=0.4*cos(2*pi*f1*t)+0.5;
subplot(3,1,1);
plot(x1);
title('message signal');
grid;
subplot(3,1,2);
y=modulate(x1,fc,fs,'ppm');
plot(y);
title('ppm modulation');
grid;
z=demod(y,fc,fs,'ppm');
subplot(3,1,3);
plot(z);
title('demod output');

4.7 Expected Waveforms

4.8 EXPECTED WAVEFORMS (Hardware)

4.9 Pre Lab Questions

1. Compare pulse modulation with continuous modulation.

2. Classify pulse modulation Techniques.
3. What are applications of pulse modulation techniques?

4.10 Lab Assignment

1. Explain how PPM is converted from PWM

4.11 Post Lab Questions

1. Explain PPM generation?

2. Write Merits and Demerits of PPM.
3. What is the BW of PPM?
4. Explain PPM demodulation

Result:
Hence Pulse position modulation and demodulation is demonstrated and output waveforms are verified
 EXPERIMENT No: 5

PULSE CODE MODULATION AND DEMODULATION

AIM: To perform pulse code modulation and demodulation using trainer kit.
APPARATUS:
1. Physitech‟s Pulse Code Modulation &Demodulation
2. CRO
3. Connecting wires.
THEORY:
In pulse code modulation (PCM), a message signal is represented by a sequence of
coded pulses, which is accomplished by representing the signal in discrete from in both time
and amplitude. The basic elements of a PCM system are shown in fig. Below.

The basic operations performed in the transmitter of a PCM system are sampling,
quantizing and encoding. The Low pass filter prior to sampling is included to pre vent aliasing
of the message signal. The incoming message signal is sampled with a tra in of narrow
rectangular pulses so as to closely approximate the instantaneous sampling process. To ensure
perfect reconstruction of the message signal at the receiver, the sampling rate must be greater
than twice the highest frequency component W of the message signal in accordance with the
sampling theorem.

The quantizing and encoding operations are usually performed in the same circuit,
which is called an analog-to-digital converter. The same circuit, which is called an analog-to-
digital converter. The sampled version of the message signal is then quantized, thereby
providing a new representation of the signal that is discrete in both time and amplitude.

In combining the process of sampling and quantization, the specification of a

continuous message (baseband) signal becomes limited to a discrete set of values, but not in the
form best suited to transmission. To exploit the advantages of sampling and quantizing for the
purpose of making the transmitted signal more robust to noise, interference and other channel
impairments, we require the use of an encoding process to translate the discrete set of sample
values to a more appropriate form of signal.

(a) Transmission Path

 Regeneration Reconstruction
Decoder Filter Destination
Circuit

(b) Receiver

REGENERATION:

The most important feature of PCM systems lies in the ability to control the effects of
distortion and noise produced by transmitting a PCM signal through a channel. This capability is
accomplished by reconstructing the PCM signal by means of a chain of regenerative repeaters
located at sufficiently close spacing along the transmission route. As illustrated in fig. Below
three basic functions are performed by a regenerative repeater: equalization, timing and decision
making.

The equalizer shapes the received pulses so as to compensate for the effects of amplitude
and phase distortions produced by the non ideal transmission characteristics of the channel.

The timing circuitry provides a periodic pulse tra in, derived from the received pulses,
for sampling the equalized pulses at the instants of time where the signal-to-noise ratio is
maximum.

Each sample so extracted is compared to a pre determined threshold in the decision

making device. In each bit interval, a decision is then made whether the symbol is a 1 or 0 on the
basis of whether the threshold is exceeded or not. If the threshold is exceeded, a pulse
representing symbol „1‟ is transmitted. In the way, the accumulation of distortion &noise in a
repeater span is completely removed.

The basic operations in the receiver are regeneration of impaired signals, decoding and
reconstruction of the train of quantized samples. The first operation in the receiver is to
regenerate (i.e., reshape & clean up) the received pulses one last time. These clean pulses are then
regrouped into code words and decoded into a quantized PAM signal. The decoding process
involves generating a pulse, the amplitude of which is the linear sum of all the pulses in the
codeword. The final operation in the receiver is to recover the message signal by passing the
decoder output through a low -pass reconstruction filter whose cutoff frequency is equal to the
message bandwidth W. Assuming that the transmission path is error free, the recovered signal
includes no noise with the exception of the initial distortion introduced by the quantization
process.
CIRCUIT DIAGRAM:
CIRCUIT DESCRIPTION:

A variable sinusoidal frequency generator is provided with frequency from 0Hz to

200Hz. To see the actual bits that are transmitted through the communication channel, a variable
dc (-5V to 5V) source is provided on the panel.

The modulating signal is applied to the input of Analog to-Digital (A/D) converter
which performs the two functions of quantization and encoding, producing a 8-bit binary coded
number. The signal is to be transmitted i.e., modulating signal is sampled at regular intervals.
To transmit all the bits in one channel actually it is often sent as binary number back to front by
parallel to serial converter transmits the code bits in serial fashion.

--As the receiver, the received data will be in serial form. The serial data is converted
back to parallel form by serial to parallel converter and passes the bits to a Digital-to-Analog
converter for decoding which has in-built sample and hold amplifier which maintains the pulse
level for the duration of the sampling period, recreating the staircase waveform which is
approximation of modulating signal. A low pass filter may be used to reduce the quantization
noise and to yield the original modulating signal.

PROCEDURE:

1 .Switch on PHYSITECH‟s Pulse code modulation and demodulation.

2 . Connect the variable DC O/P to the Analog I/P of modulation section.

3 . Connect the clock O/P of bit clock generator to the clk I/P of modulation section.

4 .By varying the variable DC O/P observes the PCM O/P on CRO.

5 . Connect the AF output to Analog I/P of modulation section by re moving variable DC O/P

6 .Connect the PCM O/P to PCM I/P of demodulation section.

7 . Observe the DAC O/P at channel 1 of CRO and observe the demodulated O/P at channel 2 of
CRO.
 EXPECTED WAVEFORMS:

2
Modulating
2V D.C. I/P
0

Sampling Clock

Digital Data Digital Data

Equivalent to 2V Equivalent to 2V
D.C. D.C.

Serial Data
O/P

Demodulated
2V Output
Pre Lab Questions

1) What is sampling theorem?

2) What is quantization?
3) What is encoder

Lab Assignment

1) What is the difference between analog and digital communication?

2) What is pulse code modulation?

Post Lab Questions

1) What is the need of processing of analog to digital convertion?

2) What is sample and hold circuit?
3) What are the applications of PCM?

RESULT: Hence the Pulse Code Modulation and Demodulation has been studied and the
modulated and demodulated output wave forms were observed.
 EXPERIMENT No: 6
DIFFERENTIAL PULSE CODE MODULATION AND
DEMODULATION

AIM: To Study & understand the operation of the Differential Pulse Code Modulation.

APPARATUS:

1. DPCM Modulator and Demodulator Tra iner Kit

2. CRO
3. Connecting Wires

THEORY:

For the samples that are highly correlated, when encoded by PCM technique, leave redundant
information behind. To process this redundant information and to have a better output, it is a wise
decision to take a predicted sampled value, assumed from its previous output and summarize them
with the quantized values. Such a process is called as Differential PCM (DPCM) technique.
DPCM Transmitter
The DPCM Transmitter consists of Quantizer and Predictor with two summer circuits.
Following is the block diagram of DPCM transmitter.

DPCM Receiver
The block diagram of DPCM Receiver consists of a decoder, a predictor, and a summer
circuit. Following is the diagram of DPCM Receiver.
 The notation of the signals is the same as the previous ones. In the absence of noise, the
encoded receiver input will be the same as the encoded transmitter output.
As mentioned before, the predictor assumes a value, based on the previous outputs. The input
given to the decoder is processed and that output is summed up with the output of the predictor, to
obtain a better output.

CIRCUIT DIAGRAM:

PROCEDURE:

1. Study the theory of operation thoroughly.

2. Connect the tra iner (Modulator) to the mains a nd switch on the power supply.

3. Observe the output of the AF generator using CRO, it should be Sine wave of
 400 Hz frequency with 3V pp amplitude.

4. Verify the output of the DC source with multimeter/scope; output should

vary 0 to +290mV.

5. Observe the output of the Clock generator using CRO, they should be 64

KHz and 8 KHz fre quency of square with 5 Vp-p amplitude.

6. Connect the tra iner (De Modulator) to the mains and switch on the

power supply.

7. Observe the output of the Clock generator using CRO; it should be 64

KHz square wave with amplitude of 5 pp.

DPCM Operation (with DC input):

Modulation:

1. Keep CRO in dual mode. Connect one channel to 8 KHz signal (one which is connected to
the Shift register) and another channel to the DPCM output.
2. Observe the DPCM output with respect to t he 8 KHz signal and sketch the Waveforms.

Note: Form this waveform you can observe that the LSB bit enters the output First.

Demodulation

3. Connect DPCM signal to the demodulator (S-P register) from the DPCM modulator with
the help of coaxial cable (supplied with the trainer).
4. Connect clock signal (64 KHz) from the transmitter to the receiver using coaxial cable.

5. Connect transmitter clock to the timing circuit.

6. Observe and note down the S-P shift register output data and compare it with the
transmitted data (i.e. output A/D converter at transmitter) notice that the output of the S-P
shift register is following the A/D converter output in the modulator.

7. Observe D/A converter output (demodulated output) using multimeter/scope and compare
it with the original signal and can observe that there is no loss in information in process of
conversion and transmission.
DPCM Operation (with AC input):

Modulation:

8. Connect AC signal of 3VPP amplitude to positive terminal of the summer circuit.

9. The output of the summer is internally connected to the sample and hold circuit

10. Keep CRO in dual mode. Connect one channe l to the AF signal and another channel to
the Sample and Hold output. Observe and sketch the sample & hold output
11. Connect the Sample and Hold output to the A/D converter and observe the DPCM
output using oscilloscope.
12. Observe DPCM output by varying AF signal voltage.

Demodulation:

13. Connect DPCM signal to the demodulator input (S-P shift register) from the DPCM
modulator with the help of coaxial cable (supplied with trainer).
14. Connect clock signal (64 KHz) from the transmitter to the receiver using coaxial cable.
15. Connect transmitter clock to the timing circuit.

16. Keep CRO in dual mode. Connect one channel to the sample& hold output and another
channel to the D/A converter output.
17. Observe and sketch the D/A output

18. Connect D/A output to the LPF input and observe the output of the LPF.

19. Observe the wave form at the output of the summer circuit.

20. Disconnect clock from transmitter and connect to the local oscillator (i.e., clock
generator output from Demodulator) with remaining setup as it is.
Observe D/A output and compare it with the previous result. This signal is little bit
distorted in shape. This is because lack of synchronization between clock at transmitter and
clock at receiver.
 EXPECTED WAVEFORMS:

Input signal

Gnd

Clock 1 (64 KHz)

Clock 2 (8 KHz)

+ 5v

Gnd

1 1 1 1

0 0 0

Pre Lab Questions

1) Define modulation?
2) H o w, DPCM gives impr oved performance over PCM?
3) What is qu antization ?

Lab Assignment

1) Difference between PCM and DPCM?

 2) What are the advantages of DPCM?

Post Lab Questions

1) How many levels are reduced in DPCM over PCM?

2) How to applicable the DPCM in real time applications?
3) Why converting the parallel to serial conversion in the modulation?

RESULT: Hence the Differential Pulse Code Modulation and Demodulation has been studied
and the modulated and demodulated output wave forms were observed.
 EXPERIMENT No: 7
DELTA MODULATION AND DEMODULATION
AIM: To perform the Delta modulation process by comparing the present signal with the
previous signal of the given modulating signal.

APPARATUS:
1. PHYSITECH‟S Delta Modulation trainer kit
2. CRO
3. Connecting wires.

THEORY:
By the Delta Modulation technique, an analog signal can be encoded into bits. Hence, in one
sense a DM is also a PCM. Differential pulse code modulation (DPCM) and Delta modulation
(DM) are the two most commonly used versions of the PCM. DPCM systems use differential
quantizes and PCM encoders. Delta modulation schemes use a differe ntial quantizer with two
output levels Ìor -Ì; these two levels are encoded using a single binary digit before
transmission. Thus Delta modulation is a special case of DPCM.

In its basic form, DM provides a stair case approximation to the over sampled version of the
message signal, as illustrated in fig. below.

m(t)

Staircase
TS Approximation
m q(t)

t
Binaries sequence at modulator o/p 0 0 1 0 1 1 1 1 1 0 1 0 0 0 0 0 0

Illustration of Delta Modulation

The difference between the input and the approximation is quantized into only two
levels namely, +Ì, corresponding to positive and negative differences. Thus if the approximation
falls below the signal at any sampling epoch, it is increased by Ì. Or if the approximation lies
above the signal, it is diminished by ê. Provided that the signal does not change too rapidly from
sample to samples we find that the staircase approximation remains within +Ì of the input signal.
 at the sampling instant nTs, the accumulator increments the approximation by a step ê in
a positive or negative direction depending on the algebra IC sign of the error sample e(n).

If the input sample m(n) is greater than the most recent approximation mq(n), a positive
increment +Ì is applied to the approximation. If the input sample is smaller, a negative incre
ment –Ì is applied to the approximation.

In the Receiver shown in fig. below, the staircase approximation is reconstructed by

passing the sequence of positive and negative pulses, produced at the decoder output, through an
accumulator in a manner similar to that used in the transmitter. Low pass filter is used to re ject
the out- of- band quantization noise in the high frequency staircase waveform, with a bandwidth
equal to the original message bandwidth.

Sampled Decoder
+ Low Pass
Σ
channel + Filter Reconstructed
output message signal
Z-1
Accumulator

Receiver of Delta modulation

Delta modulation is subject to two types of quantization errors:

1. Slope overload distortion.

2. Granular Noise.

Slope overload
Distortion

Granular
m(t) Noise

Staircase TS
approximation
m q(t)

Two different forms of quantization errors in DM

The step size Ì is too small for the staircase approximation mq(t) to follow a steep
segment of the input waveform m(t), with result that mq(t) fa lls behind m(t), as illustrated in
fig. above. This condition is called slope overload and the resulting quantization error is called
slope – overload distortion.

Granular noise occurs when the step size ê is too large re lative to the local slope
characteristics of the input waveform m(t), there by causing the staircase approximation mq(t) to
Hunt around a relatively flat segment of the input waveform. Granular noise is analogous to
quantization noise in PCM system.

The limitations of Delta modulation can be alleviated by filtering the signal to limit the
maximum rate of change or by increasing the stepsize and/or the sampling rate. Filtering the
signal & increasing the stepsize will result in poor signal resolution, and increasing the sampling
rate will lead to larger bandwidth requirements.

To avoid these limitations, we need to make the Delta modulator “Adaptive”, in the
sense that the step size is made to vary in accordance with the input signal. Systems using signal
dependent step sizes are called Adaptive Delta modulation (ADM) systems.

ADM is also known as continuous variable slope Delta modulator (CVSDM).

CIRCUIT DIAGRAM:
CIRCUIT DESCRIPTION:

In modulator section, the comparator compares the input signal m(t) and reconstructed
signal r(t). If m(t)>r(t) a logic 1 is generated at the output of the comparator, otherwise logic 0 is
generated. The value of logic 1 or logic 0 turned as Ì(t) is held for the bit duration by the sample
and hold current to generate the Delta modulated output.

During demodulation, the delta modulated output is fed to the 8 bit binary up/ down
counter to control its count direction. A logic 1 at the mode control input increases the count
value by one and a logic 0 decrements the count value by one. All the 8 outputs of the counter are
given to DAC to reconstruct the original signal. In essence the counter and decoder forms the
Delta modulator in the feedback loop of the comparator. Thus, if the input signal is higher than
the reconstructed signal the counter increments at each step so as to enable the DAC output ot
reach to the input signal values. Similarly if the input signal m(t) is lower than the reconstructed
signal r(t), the counter decrements at each step, and the DAC output gets reduced to reach a
value to that of m(t).

PROCEDURE:
1. Switch on the experimental board

2. Connect the clock signal of Bit clock generator to the bit clock input of Delta modulator
circuit.

3. Connect modulating signal of the modulating signal generator to the modulating signal
input of the Delta modulator.

4. Observe the modulating signal on Channel 1 of CRO

5. Observe the Delta modulator output on channel 2 of CRO

6. Connect the DM o/p of modulator to the DM I/P of Demodulator circuit.

7. Connect the clock signal to the Bit clock I/P of Demodulator circuit.

8. Observe the demodulated o/p on channel 2 of CRO.

9. Connect the demodulated o/p to the filter input of demodulator circuit.

10. Observe the demodulated o/p w ith filter on CRO.

EXPECTED WAVEFORMS:

Modulating Signal I/P

Clock
I/P

Delta
Modulator O/P

D/A Output

Filtered Output
Post Lab Questions

1) What are two types of quantization errors?

2) What is the advantage of delta modulation over PCM?
3) What is slope overload distortion?

Lab Assignment

1) What is granular noise?

2) What happens to the output signal if the variation of the message signal is
(i) greater than the step size (ii) less than the step size

Pre Lab Questions

1) Compare DPCM, PCM& Delta modulation?

2) How to re duce the quantization noise that occurs in DM?
3) Mention the applications of DM?

RESULT: Hence the Delta Modulation and Demodulation has been studied and the modulated
and demodulated output wave forms were observed.
 EXPERIMENT No: 8
FREQUENCY SHIFT KEYING GENERATION AND
DETECTION
AIM: To perform frequency shift key (FSK) Modulator and Demodulator using trainer kit.
APPARATUS:
1 Physitech‟s FSK Modulator-FSK Demodulator.
2 Function Generator.
3 CRO.
4 BNC Probes.

THEORY :
Frequency Shift Keying (FSK) is the digital modulation technique in which the frequency of the carrier
signal varies according to the digital signal changes. FSK is a scheme of frequency modulation.
The output of a FSK modulated wave is high in frequency for a binary High input and is low in frequency
for a binary Low input. The binary 1s and 0s are called Mark and Space frequencies.
The following image is the diagrammatic representation of FSK modulated waveform along with its input.

To find the process of obtaining this FSK modulated wave, let us know about the working of a FSK
modulator.

FSK Modulator
The FSK modulator block diagram comprises of two oscillators with a clock and the input binary
sequence. Following is its block diagram.

The two oscillators, producing a higher and a lower frequency signals, are connected to a switch along
with an internal clock. To avoid the abrupt phase discontinuities of the output waveform during the
transmission of the message, a clock is applied to both the oscillators, internally. The binary input
sequence is applied to the transmitter so as to choose the frequencies according to the binary input.

FSK Demodulator

There are different methods for demodulating a FSK wave. The main methods of FSK detection
are asynchronous detector and synchronous detector. The synchronous detector is a coherent one, while
asynchronous detector is a non-coherent one.

Asynchronous FSK Detector

The block diagram of Asynchronous FSK detector consists of two band pass filters, two envelope
detectors, and a decision circuit. Following is the diagrammatic representation.

The FSK signal is passed through the two Band Pass Filters (BPFs), tuned to Space and Mark frequencies.
The output from these two BPFs look like ASK signal, which is given to the envelope detector. The signal
in each envelope detector is modulated asynchronously.

The decision circuit chooses which output is more likely and selects it from any one of the envelope
detectors. It also re-shapes the waveform to a rectangular one.
Synchronous FSK Detector

The block diagram of Synchronous FSK detector consists of two mixers with local oscillator circuits, two
band pass filters and a decision circuit. Following is the diagrammatic representation.

The FSK signal input is given to the two mixers with local oscillator circuits. These two are connected to
two band pass filters. These combinations act as demodulators and the decision circuit chooses which
output is more likely and selects it from any one of the detectors. The two signals have a minimum
frequency separation.
For both of the demodulators, the bandwidth of each of them depends on their bit rate. This synchronous
demodulator is a bit complex than asynchronous type demodulators.

CIRCUIT DESCRIPTION:

The FSK generator is formed by using a 555 as an astable multi vibrator whose fre
quency is controlled by the transistor of Q 1. The output frequency of the FSK generator depends
on the logic state of the digital data input. 150Hz is one of the standard frequencies at which the
data are commonly transmitted. When the input is logic 1, transistor Q 1 is off. Under these
conditions, the 555 works in its normal mode as an astable multi vibrator; that is capacitor C
charges through R and R to 2/3 V CC and discharges through R to 1/3VCC. Thus capacitor C
charges and discharges alternately between 2/3 VCC and 1/3 VCC as long as the input is at logic 1
state.
 When the input signal is logic 0, Q 1 is on (Saturated), which inturn connects the
resistance Rc across Ra. This action reduces the charging time of the capacitor and increases the
output frequency.

The output of the 555 FSK generator is then applied to the 565 FSK demodulator.
Capacitive coupling is used at the input to remove a dc level. As the signal appears at the input of
the 565, the loop locks to the input frequency and tracks it between the two frequencies with a
corresponding dc shift at the output. Resistor R 1 and capacitor C 1 determine the free-running
frequency of the VCO, while C2 is a loop filter capacitor that establishes the dynamic
characteristics of the demodulator. Here C2 must be choosen smaller than usual to eliminate
overshoot on the output pulse. A three stage RC ladder (Low-pass) filter is used to remove the
carrier component from the output. The high cutoff frequency (fh=1/2 RC) of the ladder filter is
chosen to be approximately half way between the maximum keying rate of 150Hz and twice the
input frequency.

The output signal of 150Hz can be made logic compatible by connecting a voltage
comparator between the output of the ladder filter and pin 6 of the PLL. The VCO frequency is
adjusted with R 1, So that a slightly positive voltage is obtained at the output.

PROCEDURE:

1 . Switch on Physitech‟s FSK modulator & demodulator Trainer K it .

2 . Connect 150Hz square wave from function generator to Input digital data terminal.

3 . Observe FSK O/P on channel 1 of CRO.

4 . Observe the demodulator output at output digital data terminal on channel 2 of CRO. To
get correct waveform adjust the potentiometer knobs.

Expected Waveforms:

Data I /P

FSK O /P

Demodulator O/P
Pre Lab Questions

1) Explain the concept of FSK?

2) Draw the waveforms of FSK?
3) What is the formula for Band Width required in FSK?

Lab Assignment

1) Explain the demodulation scheme of FSK?

2) What is the minimum B.W for an FSK signal transmitting at 2000bps(haifduplex),if
carriers are separated by 3KHz?

Post Lab Questions

1) Compare ASK, FSK & PSK?

2) Is FSK more susceptible to noise than ASK?
3) What are the limiting factors of FSK?

RESULT: Hence the FSK modulation and demodulation has been studied and the modulated
and demodulated wave forms were observed.
 EXPERIMENT No: 9

PHASE SHIFT KEYING

AIM: To study the various steps involved in generating the phase shift keyed signal at the
modulator end and recovering the binary signal from the received PSK signal.

APPARATUS:

1. Physitech‟s PSK Modulation & Demodulation

2. CRO
3. Connecting Wires

THEORY:

Phase Shift Keying (PSK) is the digital modulation technique in which the phase of the carrier signal is
changed by varying the sine and cosine inputs at a particular time. PSK technique is widely used for
wireless LANs, bio-metric, contactless operations, along with RFID and Bluetooth communications.

PSK is of two types, depending upon the phases the signal gets shifted. They are −

Binary Phase Shift Keying (BPSK)

This is also called as 2-phase PSK or Phase Reversal Keying. In this technique, the sine wave carrier takes
two phase reversals such as 0° and 180°.

BPSK is basically a Double Side Band Suppressed Carrier (DSBSC) modulation scheme, for message
being the digital information.

Quadrature Phase Shift Keying (QPSK)

This is the phase shift keying technique, in which the sine wave carrier takes four phase reversals such as
0°, 90°, 180°, and 270°.

If this kind of techniques is further extended, PSK can be done by eight or sixteen values also, depending
upon the requirement.

BPSK Modulator

The block diagram of Binary Phase Shift Keying consists of the balance modulator which has the carrier
sine wave as one input and the binary sequence as the other input. Following is the diagrammatic
representation.
The modulation of BPSK is done using a balance modulator, which multiplies the two signals applied at
the input. For a zero binary input, the phase will be 0° and for a high input, the phase reversal is of 180°.

Following is the diagrammatic representation of BPSK Modulated output wave along with its given input.

The output sine wave of the modulator will be the direct input carrier or the inverted (180° phase shifted)
input carrier, which is a function of the data signal.
BPSK Demodulator

The block diagram of BPSK demodulator consists of a mixer with local oscillator circuit, a bandpass
filter, a two-input detector circuit. The diagram is as follows.

By recovering the band-limited message signal, with the help of the mixer circuit and the band pass filter,
the first stage of demodulation gets completed. The base band signal which is band limited is obtained and
this signal is used to regenerate the binary message bit stream.

In the next stage of demodulation, the bit clock rate is needed at the detector circuit to produce the original
binary message signal. If the bit rate is a sub-multiple of the carrier frequency, then the bit clock
regeneration is simplified. To make the circuit easily understandable, a decision-making circuit may also
be inserted at the 2 nd stage of detection.

Procedure:
1. Switch on Physitech‟s PSK modulation and demodulation tra iner.
2. Connect the carrier O/P of carrier generator to the carrier I/P of modulator.
3. Connect the data O/P of Data generator to the Data I/P of Modulator.
4. Compare these two signals.
5. Connect the PSK O/P of modulator to the PSK I/P of demodulator.
6. Connect the carrier O/P of carrier generator to carrier I/P of demodulator.

7. Connect CH1 OF CRO to Data generator o/p and CH 2 tothe demodulator o/p.
PSK Expected wave forms

Carrier I/P
Channel: 1

Data I/P

PSK O/P

Demod O/P

Channel: 2

Data I/P

PSK O/P

Demod O/P
Pre Lab Questions

1) Explain the concept of PSK?

2) Draw the waveforms of PSK?
3) Is the maximum baud ate in PSK & ASK are same?

Lab Assignment

1) Explain the demodulation scheme of PSK?

2) What is the advantage of PSK over ASK, FSK?

Post Lab Questions

1) Compare ASK, FSK, PSK?

2) What is the minimum B.W require d in PSK?
3) Is the maximum bit rate in PSK is greater than ASK?

RESULT: Hence the PSK modulation and demodulation has been studied and the modulated
and demodulated wave forms were observed.
 EXPERIMENT No: 10
DPSK GENERATION AND DETECTION
AIM: To study the various steps involved in generating differential phase shift keyed signal at
the modulator end and recovering the binary signal from the DPSK signal.

APPARATUS:
1. PHYSITECH‟S Differential Phase shift keying Trainer.
2. CRO
3. Connecting Wires.

THEORY:
In Differential Phase Shift Keying (DPSK) the phase of the modulated signal is
shifted relative to the previous signal element. No reference signal is considered here. The
signal phase follows the high or low state of the previous element. This DPSK technique
doesn‟t need a reference oscillator.
The following figure represents the model waveform of DPSK.

It is seen from the above figure that, if the data bit is Low i.e., 0, then the phase of the
signal is not reversed, but continued as it was. If the data is a High i.e., 1, then the phase of the
signal is reversed, as with NRZI, invert on 1 (a form of differential encoding).
If we observe the above waveform, we can say that the High state represents an M in
the modulating signal and the Low state represents a W in the modulating signal.
DPSK Modulator
DPSK is a technique of BPSK, in which there is no reference phase signal. Here, the
transmitted signal itself can be used as a reference signal. Following is the diagram of DPSK
Modulator.
 DPSK encodes two distinct signals, i.e., the carrier and the modulating signal with 180°
phase shift each. The serial data input is given to the XNOR gate and the output is again fed
back to the other input through 1-bit delay. The output of the XNOR gate along with the carrier
signal is given to the balance modulator, to produce the DPSK modulated signal.
DPSK Demodulator
In DPSK demodulator, the phase of the reversed bit is compared with the phase of the
previous bit. Following is the block diagram of DPSK demodulator.

From the above figure, it is evident that the balance modulator is given the DPSK signal
along with 1-bit delay input. That signal is made to confine to lower frequencies with the help
of LPF. Then it is passed to a shaper circuit, which is a comparator or a Schmitt trigger circuit,
to recover the original binary data as the output.
DPSK may be viewed as the noncoherent version of PSK. It eliminates the need for a coherent reference
signal at the receiver by combining two basic operations at the transmitter:
1. Differential encoding of the input binary wave and
2. Phase-Shift Keying -hence, the name, differential phase shift keying (DPSK).
In effect to send symbol 0, we phase advance the current signal waveform by 180 degrees, and to send
symbol 1, we leave the phase of the current signal waveform unchanged. The receiver is equipped with a storage
capability, so that it can measure the relative phase difference between the waveforms received during two
successive bit intervals. Provided that the unknown phase θ contained in the received wave varies slowly, the phase
difference between waveforms received in two successive bit intervals will be independent of θ.

PROCEDURE:
1. Switch on Physitech‟s differential Phase shift Keying trainer.
2. Connect the carrier output of carrier generator to the 13th pin of CD4051(Analog mux) of modulator.
3. Connect the Bit clock output to the Bit clock input at pin 3 of 7474 (8-bit converter) of modulator.
4. Connect the data output of data generator to the input of modulator circuit.
5. Connect channel 1 of CRO to the data generator.
6. Observe the differential data output at pin 2 of 7474 IC on channel -1 of CRO.
7. Observe the DPSK modulated output on channel-2 of CRO.
8. During demodulation, connect the DPSK modulated output to the DPSK I/P of Demodulator.
9. Connect the Bit clock O/P to the Bit clock I/P of Demodulator and also connect the carrier O/P to the carrier
I/P of demodulator.
10. Observe the demodulated data O/P at demodulator.
11. The frequency of modulation data signal should be equal to the demodulated O/P.
EXPECTED WAVEFORMS:

Carrier I/P

Bit clock I/P

Channel: 1

Data I/P

Differential
data O/P

DPSK O/P

Demodulated O/P
Pre Lab Questions
1) How does DPSK differ from PSK?
2) What is the advantage of DPSK over PSK?
3) What are the applications of DPSK?

Lab Assignment
1) What are the disadvantages of DPSK?
2) Is the error rate of DPSK is greater than PSK?

Post Lab Questions

1) Explain theoretical modulation & demodulation of DPSK using arbitrary bit sequence and assuming initial
bit 0 and 1?
2) Why do we need 1 bit delay in DPSK modulator & demodulator?
3) What is the relation between carrier frequency & the bit interval T?

RESULT: Hence the Differential Phase Shift Keying Modulation and Demodulation has been studied and
the modulated and demodulated output wave forms were observed.
 EXPERIMENT No: 11
ASK GENERATION AND DETECTION

AIM: To study the various steps involved in generating amplitude phase shift keyed signal at
the modulator end and recovering the binary signal from the ASK signal.

APPARATUS:
1. Physitech‟s Amplitude shift keying Tra iner Kit
2. CRO
3. Connecting Wires.
THEORY
Amplitude Shift Keying (ASK) is a type of Amplitude Modulation which represents the binary data in the form of
variations in the amplitude of a signal.
Any modulated signal has a high frequency carrier. The binary signal when ASK modulated, gives a zero value
for Low input while it gives the carrier output for High input.
The following figure represents ASK modulated waveform along with its input.

To find the process of obtaining this ASK modulated wave, let us learn about the working of the ASK modulator.
ASK Modulator
The ASK modulator block diagram comprises of the carrier signal generator, the binary sequence from the message
signal and the band-limited filter. Following is the block diagram of the ASK Modulator.
The carrier generator, sends a continuous high-frequency carrier. The binary sequence from the message signal
makes the unipolar input to be either High or Low. The high signal closes the switch, allowing a carrier wave. Hence,
the output will be the carrier signal at high input. When there is low input, the switch opens, allowing no voltage to
appear. Hence, the output will be low.
The band-limiting filter, shapes the pulse depending upon the amplitude and phase characteristics of the band-
limiting filter or the pulse-shaping filter.
ASK Demodulator
There are two types of ASK Demodulation techniques. They are −
 Asynchronous ASK Demodulation/detection
 Synchronous ASK Demodulation/detection
The clock frequency at the transmitter when matches with the clock frequency at the receiver, it is known as
a Synchronous method, as the frequency gets synchronized. Otherwise, it is known as Asynchronous.
Asynchronous ASK Demodulator
The Asynchronous ASK detector consists of a half-wave rectifier, a low pass filter, and a comparator. Following is
the block diagram for the same.
The modulated ASK signal is given to the half-wave rectifier, which delivers a positive half output. The low pass
filter suppresses the higher frequencies and gives an envelope detected output from which the comparator delivers a
digital output.
Synchronous ASK Demodulator
Synchronous ASK detector consists of a Square law detector, low pass filter, a comparator, and a voltage limiter.
Following is the block diagram for the same.

The ASK modulated input signal is given to the Square law detector. A square law detector is one whose output
voltage is proportional to the square of the amplitude modulated input voltage. The low pass filter minimizes the
higher frequencies. The comparator and the voltage limiter help to get a clean digital output.
Circuit Diagram

Procedure:
1. Switch on Physitech‟s ASK shift Keying trainer.
2. Connect the carrier output of carrier generator to the modulator.
3. Connect the data output of data generator to the input of modulator circuit.
4. Connect channel 1 of CRO to the data generator.
5. Observe the ASK modulated output on channel-2 of CRO.
6. During demodulation, connect the ASK modulated output to the ASK I/P of Demodulator.
7. Observe the demodulated data O/P at demodulator.
Model Waveforms:
Pre Lab Questions
1) How does ASK differ from PSK, FSK?
2) What are the applications of ASK?
Lab Assignment
3) What is the disadvantages of ASK?
4) Is the error rate of ASK is greater than PSK?
Post Lab Questions
4) Explain theoretical modulation & demodulation of ASK using arbitrary bit sequence and assuming initial bit
0 and 1?
5) What is the relation between carrier frequency & the bit interval T?

RESULT: Hence the Amplitude Shift Keying Modulation and Demodulation has been studied and the
modulated and demodulated output wave forms were observed.
 EXPERIMENT No: 12
QUADRATURE PHASE SHIFT KEYING

AIM: Study of carrier modulation Techniques by Quadrature phase shift keying method.

APPARATUS:
1. CRO
2. Connecting Wires.
3. QPSK Trainer kit

Theory :
In this modulation called quadrature PSK (QPSK) or PSK the sine carrier takes 4 phase values,
separated of 90 deg, and determined by combinations of pair (Dibit) of the binary data signal. The
data are coded in to dibit by a circuit generating.

A data signal 1 (in phase consisting in voltage levels corresponding to the values of the first bit of
the considered pair, for duration equal to 2 bit intervals.

A data signal Q (in quadrature) consisting in voltage levels corresponding to the value of the second
bit of the considered pair, for duration equal to w bit intervals.

Four 500 KHz sine carriers, shifted between them of 90deg, are applied to modulator. The data
((signal I & Q) reach the modulator form the dibit generator. The instantaneous value of 1 and Q
data bit generates a symbol.

Since I and Q can take either 0 or 1 value, maximum four possible symbols can be generated (00,
01, 10,11). According to the symbol generated one of the four sine carrier will be selected. The
relation between the symbol generated and sine carrier is shown in table.
DIBIT PHASE SHIFT
00 180 deg.
01 90 deg.
10 270 deg.
11 0 deg.

A receiver for the QPSK signal is shown in fig. synchronous detection is required and hence its
necessary to locally regenerate the carriers. The scheme for regeneration is similar to that employed
in BPSK. In that earlier case we squared the incoming the signal, extracted the wave form a twice
the carrier frequency by filtering and recovered the carrier by frequency dividing by two. In the
present case, it is required that incoming signal be raised to the fourth power after which filtering
recovers a waveforms at four time the carrier.
The incoming signal also applied to the sampler followed by adder and envelope detectors.
Two adders of the sampled QPSK signal, sampled by the clock having different phases. At the
output of adder the signals consisting the envelope corresponds to I & Q bit. Envelope detector then
filters the high frequency components and recovers I & Q bit. These recovered I & Q having
exactly same phase & frequency compared to transmitter I & Q bit. These I & Q bits then applied to
data decoder logic to recover the original NRZ-L data pattern.
Circuit diagram:
PRODECURE:
Connect the AC supply to the kit.
Ensure that all faults are in normal position
Make connections as shown in above figure.
Select data pattern of simulated data using switch SW1 as „11000000‟
Observe the following waveforms on oscilloscope.
a) NRZ-DATA output (TP4)
b) CARRIER SIGNALS (SINE1 to SINE4) (TP15, TP16, TP17, TP18)
c) Dibit pair generated 1 Bit and Q BIT (TP10, TP9)
d) QPSK modulator MOD output(TP23)
e) SAMPLING CLOCK output (TP27, TP29, TP28, TP30)
f) ADDER output(TP31, TP32)
g) REC I and REC Q output (TP33, TP34)
h) Envelop detector output (TP42, TP44)
i) DATA DECODER output (TP45)

Compare above waveforms with given waveforms.

7. Repeat this above procedure for below data input and observes corresponding waveform.
 11001100
 10101010
 11110000

NOTE:
1) Demodulation on output may get out of phase with input for that time you can use inverter block.
2) After changing input first press RESET switch.
3) If you don‟t get proper output press PHASE SYNC switch.

EFFECT OF FAULT SWITCH:

 Put switch 4 of SW1 in OFF position. This will open carrier capacitor for filtering of SIN1. Thus amplitude
of SN1 and SIN3 gets disturbed.

 Put switch 3 of SW1 in OFF position. This will disable control signal C1 going to data modulator. Modulator
will not able to modulate the signal properly.

 Put switch 2 of SW1 in OFF position. This will open the input of EX-Or gate used in differential encoder1.
Due to this random data is generated at the output of differential encoder1.

 Put switch 1 of SW1 in OFF position. This will remove the clock signal (125 KHz-180deg) in the generation
of 1 bit data. This disable the generation of 1 bit data at the output of dibit conversion.

 Put switch 5 of SW1 in OFF position. This will remove pull up resistor from envelope detector of 1 BIT. 1
BIT generation gets disabled.

 Put switch 7 of SW1 in OFF position. This will remove one of the sampling clocks to sampler. Thus QPSK
signal doesn‟t get sampled properly and to this QPSK demodulated data also gents disturbed.

Put switch of 6 of SW1 in OFF position. This remove one of the sampling outputs of sample. So 1 BIT
cannot be observed and recovered data also gets disturbed.
Model Waveforms:

Result:

Hence QPSK modulation and demodulation is verified using Trainer kit.

 EXPERIMENT No: 13
QPSK AND DPSK USING MATLAB
AIM: To perform QPSK and DPSK using MATLAB and Simulink models.

APPARATUS:
1. MATLAB R2015 a

MATLAB CODE FOR QPSK

clc;
clear all;
close all;
bits=[0,0,1,0,0,1,1,1,0,1,1,1];
%Offset OPSK
P1=pi/4; % 45 degrees
P2=0.75*pi; % 135
P3=1.25*pi; % 225
P4=1.75*pi; % 315
%Definition of Frequencies and periods
f=1;
fs=100;
t=0:1/fs:1; % Period for the digital signal and carrier
t1=0:1/fs:2; % the period of QPSK
%Definition of variable to use
tiempo=[];
tiempo1=[];
Digital=[];
Portadora=[];
QPSK=[];
% Sequence of data
for i=1:1:length(bits)
if bits(i)==0
z=zeros(1,length(t));
Digital = [Digital z];
end

if bits(i)==1
o=ones(1,length(t));
Digital = [Digital o];
end
% Carrier
Portadora=[Portadora (sin(2*pi*f*t))];
tiempo=[tiempo t];
t= t+1;
end
%know QPSK
for ii=1:2: length(bits)

% Caso 1 = 00 Offset of 45
if bits(ii)==0 && bits(ii+1)==0
bits00= sin(2*pi*f*t1 + P1);
 QPSK=[QPSK (bits00)];
end
% Caso 2 = 01 Offset of 135
if bits(ii)==1 && bits(ii+1)==0
bits10= sin(2*pi*f*t1 +P2);
QPSK=[QPSK (bits10)];
end
% Caso 3 = 10 Offset of 225
if bits(ii)==1 && bits(ii+1)==1
bits11= sin(2*pi*f*t1 +P3);
QPSK=[QPSK (bits11)];
end
% Caso 4 = 11 Offset of 315
if bits(ii)==0 && bits(ii+1)==1
bits01= sin(2*pi*f*t1 +P4);
QPSK= [QPSK (bits01)];
end
tiempo1= [tiempo1 t1];
t1=t1+2;
end
% Representation of signals
Subplot(3,1,1);
plot(tiempo, Digital,'lineWidth',2.5);
title(' Digital');
axis([0 12 -0.5 1.5]);
grid on;
subplot(3,1,2);
plot(tiempo,Portadora,'lineWidth',2.5);
title('Carrier');
axis([0 12 -1.5 1.5]);
grid on;
subplot(3,1,3);
plot(tiempo1,QPSK,'lineWidth',2.5);
title('QPSK');
axis([0 12 -1.5 1.5]);
grid on;

Simulation Results
 QPSK TRANSMITTER MODEL

ev en_out
unipolar_ip bipolar out

unipol_to_bipol
I-phase Cosine Product 1

odd_out

qudrature Sine
unipolar_ip bipolar out

Product 2
Add
unipol_to_bipol1 Mod_op
data_ser

even odd data source

QPSK Transmitter using Simulink Model

Simulation Results of QPSK for even and odd sequence of bits.

 QPSK T RANSMIT T ER AND RECEIVER

Random QPSK
Integer QPSK

Random-Integer
QPSK
Generator2 QPSK
Modulator
Demodulator
Baseband
Baseband

I-phase Cosine

Re(u)
Product

Im(u)

Complex to Product1
Real-Imag
Scope

qudrature Sine

Discrete-T ime
Scatter Plot
Scope1

QPSK Tx and Rx using Simulink Model

Simulation Results of QPSK Tx and Rx

 QPSK Constellation Diagram

DPSK TRANSMITTER AND RECEIVER

Bernoulli
Binary XOR BPSK
Bernoulli Binary
Generator 1
BPSK BPSK
Logical
Modulator z
Operator
Baseband Unit Delay1 BPSK Scope
Unit Delay Product 3
Demodulator
1 Baseband

z I-phase Cosine

Re(u)
Product

Im(u)

Complex to Product1
Real-Imag

qudrature Sine

Simulink Model for DPSK Tx and Rx

Simulation Results of DPSK signal