ITI 1100/section B Winter 2012

DIGITAL SYSTEM I
Lectures:
Tuesday, 14:30 – 16:00 room: CBY-B205
Friday, 16: 00 –17:30 room: CBY-B205
TUTORIAL: Wednesday 11:30 - 13:00 LMX 360
LAB
LAB 1 Tuesday 19:00 - 22:00 CBY B302
LAB 2 Monday 11:30 - 14:30 CBY B302
Professor : Dr. A. Karmouch, office CBY A508
Mid-term exam date: Sunday March 4, 2012
(9:00-10:30)
 Chapter 2
Boolean Algebra and Logic Gates

Gate –Level Minimization

2
 Boolean expressions (functions)
• We can use the basic operations to form more
complex expressions:
f(x,y,z) = x y’+ z x’
• Some terminology and notation:
– f is the name of the function.
- Term is an implementation with a gate: in this example f
has two terms x y’ and z x
– ( x,y,z ) are the input variables, each representing 1 or 0.
– A literal is any occurrence of an input variable or its
complement. The function above has four literals: x, y’, z,
and x’.
3
Precedence for Evaluation of Boolean Expression

• Precedence are important.

– Parentheses first (if any) then

NOT has the highest precedence, followed by AND,
and then OR.
f(x,y,z) = (x + y’)z + x’
–Fully parenthesized, the function above would be kind of
messy:

f(x,y,z) = (((x +(y’))z) + x’)

4
 Truth Table
•A truth table shows all possible inputs and outputs of a
function. Each input variable represents either 1 or 0.
•A function with n variables has 2 power n possible
combinations of inputs.
•Inputs are listed in binary order-example, from 000 to 111.
f(x,y,z) = (x + y’)z + x’
x y z f(x,y,z)
0 0 0 1
f(0,0,0) = (0 + 1)0 + 1 =1 0 0 1 1
f(0,0,1) = (0 + 1)1 + 1 =1 0 1 0 1
f(0,1,0) = (0 + 0)0 + 1 =1 0 1 1 1
f(0,1,1) = (0 + 0)1 + 1 =1
1 0 0 0
f(1,0,0) = (1 + 1)0 + 0 =0
f(1,0,1) = (1 + 1)1 + 0 =1 1 0 1 1
f(1,1,0) = (1 + 0)0 + 0 =0 1 1 0 0
f(1,1,1) = (1 + 0)1 + 0 =1 1 1 1 1
5
 Boolean Expression and Logic Circuits
• A Boolean expression (function) can be converted into a circuit
by combining basic gates.
• Example:
- The diagram below shows the inputs and outputs of each
gate.
- The precedences are explicit in a circuit.

f(x,y,z) = (x + y’)z + x’

6
 Obtaining Boolean Expressions

•Expressions may be obtained from:

• English language description
• Truth table;
• Logic circuit.

7
 Obtaining Boolean Expressions
•• The Boolean expression (un-simplified) can be obtained
from the truth table:Consider the following arbitrary Truth Table
A B C F1
We can also write the function as:
0 0 0 0 F1 (A,B,C) = A’BC’+ A’BC+ AB’C’+
0 0 1 0 AB’C+ ABC’+ ABC
0 1 0 1 A’BC’
0 1 1 1
A’BC
1 0 0 1 AB’C’
1 0 1 1 AB’C
1 1 0 1 ABC’
1 1 1 1 ABC
8
 Obtaining Boolean Expressions

Using the false terms in the truth table

•Sometimes it is easier to work with the terms that

describe when the function is false.
•For example, if a function has four variables then
there are sixteen possible states.
If for instance thirteen out of sixteen were true,
then only three out of sixteen are false. Fewer terms
makes it easier
• In our example, two out of eight are false.
9
 Obtaining Boolean Expressions
• The Boolean expression (un-simplified) can be obtained
from the truth table using false terms
A B C F1
So we can also write the function NOT F1 as:
F1 (A,B,C) = A’B’C’ + A’B’C
0 0 0 0 A’B’C’
0 0 1 0 A’B’C
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1
10
 Obtaining The Truth Table - Example
Design a digital circuit that will be used to control an Alarm bell.
This Alarm bell is to be installed in a room to protect it from
unauthorized entry.
Sensor devices provide the following logic signals
C = 1 The control system is active
D = 1 The room door is closed
M = 1 There is a motion in the room
Q = 1 The room is open to the public
i) Obtain the truth table
ii) derive the Boolean expression using true terms

11
 Truth table
C D M Q Alarm
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0 Alarm= CD’M’Q’ + CD’MQ’ + CDMQ’
0 1 1 1 0
1 0 0 0 1 Door should not be open
1 0 0 1 0
1 0 1 0 1 room is closed to the public  door open + motion
1 0 1 1 0
1 1 0 0 0
1 1 0 1 0
1 1 1 0 1 room is closed to the public + door closed  motion
1 1 1 1 0
12
 Boolean Identities

• Boolean algebra is used in digital design to reduce

any logical function (expression) to its simplest
form
 the minimization of the number of literals
and the number of terms
 a circuit with less equipment
• It is a hard problem (no specific rules to follow)

13
 Boolean Identities
1. x+0=x
2. x·1=x
3. x+x =1
4. x·x =0
5. x+x=x Basic to Boolean algebra
6. x·x=x
7. x+1=1
8. x·0=0
9. (x ) = x
10. x+y=y+x Commutative
11. xy = yx Commutative
12. x + (y + z) = (x + y) + z Associative
13. x(yz) = (xy)z Associative
14. x(y + z) = xy + xz Distributive
15. x + yz = (x+y)(x+z) Associative
16. (x + y) = x y’ DeMorgan
17. (xy) = x + y DeMorgan
18. x + xy = x Absorption
19. x(x + y) = x Absorption 14
Verifying Boolean Identities-Examples

Theorem : x+x = x

x+x = (x+x) 1 x.1=x

= (x+x) (x+x') x+x’=1
= x+xx' x+yz =(x+y)(x+z)
= x+0 x.x’=0
=x x+0=x
Theorem : x x = x
xx = x x + 0
= xx + xx'
= x (x + x')
=x1
=x 15
Verifying Boolean Identities-Examples
• DeMorgan's Theorems
(x+y)’ = x' y‘
 (x y)' = x' + y'
• By means of truth table

x y x +y ( x + y) ‘ x ‘ y‘ x ‘ y’
0 0 0 1 1 1 1
0 1 1 0 1 0 0
1 0 1 0 0 1 0
1 1 1 0 0 0 0

16
 Verifying Boolean Identities-Examples

• Theorem x + xy = x

By means of truth table

x y xy x + xy
0 0 0 0
0 1 0 0
1 0 0 1
1 1 1 1

17
 Simplifying Boolean Expressions

 Use the Rules of Boolean Algebra

We can simply the function as:
F1 (A,B,C) = A’BC’+ A’BC+ AB’C’+ AB’C+ ABC’+ ABC
= A’B(C’+C) + AB’(C+C’) + AB(C’+C)
= A’B +AB’+AB
= A’B + A(B’+B)
= A+A’B

18
 Simplifying Boolean Expressions
Function with four variables
• Giving the following function:
F2a (A,B,C,D) = ( AB’ (C + BD) + A’B’ ) C
= ( AB’C + AB’BD + A’B’ ) C
= ( AB’C + A0D + A’B’ ) C
= (AB’C + 0 + A’B’ ) C
= (AB’C + A’B’ ) C
= AB’CC + A’B’C
= AB’C + A’B’C
= (A+A’)B’C
= B’C
F2b (A,B,C,D) = B’C

 the two expressions are equivalent!

 F2a requires more logic gates than F2b
19
 Basic and Other Logic gates
•Basic Logic gate

•AND
•OR These are called “fundamental logic gates” as all other
gates and digital Circuits can be created from these gates.
•NOT

• Other Logic gates

•NAND These are called “Universal logic gates” as any digital

•NOR circuit can be designed by just using these gates

•XOR
•XNOR
20
 The NAND & NOR Gates
• We can use a NAND and NOR gates to implement all three of
the basic operations (AND,OR,NOT).

 They are said to be functionally complete

 Both NAND and NOR gates are very valuable as any
design can be realized using either one.

•It is easier to build digital circuits using all NAND or

NOR gates than to combine AND,OR, and NOT gates.

•NAND/NOR gates are typically faster and cheaper to

produce.
21
 The NAND Gate
•The NAND gate is a combination of an AND gate
followed by an inverter (NOT gate).
•We can use a NAND gate to implement all three of
the basic operations (AND,OR,NOT).
•Such a gate is said to be functionally complete.

A A B F
F= A.B = A+B
B 0 0 1
0 1 1
1 0 1
1 1 0
22
 The NAND Gate
 a NAND gate with both of its inputs driven by the same signal is
equivalent to a NOT gate
A
F= A

NOT Gate
a NAND gate whose output is complemented is equivalent to an
AND gate ((AB)’(AB)’)’= (AB)’’+(AB)’’=
(AB)’ AB +AB = AB
A
B F=AB

AND Gate

23
 The NAND Gate

•a NAND gate with complemented inputs acts as an OR gate.

F= A+B
B

OR Gate

24
Universality of NAND

25
 The NOR Gate
•This is a NOR gate. It is a combination of an OR
gate followed by an inverter.
•like the NAND gate, the NOR gate is functionally
complete any logic function can be implemented
using just NOR gates.

A B F
0 0 1
A
F= A+B 0 1 0
B
1 0 0
1 1 0 26
 NOR Gate Equivalence

• NOR Symbol, Equivalent Circuit, Truth Table

27
NOR Gates-functionally complete
A
F= A

NOT Gate

A
B F= A+B

OR Gate
A
F= A.B
B
AND Gate
28
 Universality of NOR gate

• Equivalent representations of the AND, OR,

and NOT gates
(A+A)’ = A’A’ = A’

((A+B)’ + ( A + B)’)’ = (A+B)’’( A+B)’’ = (A’B’)’ (A’B’)’

= (A’’+B’’) (A’’+B’’) = (A+B) (A+B) = (A+B)

29
 The XOR Gate (Exclusive-OR)

• This is a XOR gate.

• XOR gates assert their output when exactly one
of the inputs is asserted, hence the name.
• The operator symbol for this operation is
1 1 = 0 and 1 0 = 1.
A B F
0 0 0
A
F= A B = AB + AB 0 1 1
B
1 0 1
1 1 0
30
 The XNOR Gate

• This functions as an exclusive-NOR gate, or

simply the complement of the XOR gate.
• The symbol for this operation is 
1  1 = 1 and 1  0 = 0. A B F
A 0 0 1
F
B
0 1 0
F=
Z A B AB A B AB A' B' 1 0 0
1 1 1

31
 Standard Forms

• We have seen how to interpret truth tables, obtain Boolean

expressions (functions) then build logic circuits.

• We have simplified Boolean expressions using Boolean

algebra.

There is a “standard” way of writing Boolean

expressions (Functions):

- The standard Sum of Products (SOP)

- The standard Product of Sums (POS)
32
The standard Sum of Product-Minterms
• A Minterm is one in which all variables appear (only) once.
• Each Minterm represents exactly one combination (row) in truth
table.
n
• n variables give 2 Minterms.
Truth Table
Decimal value A B C F Minterm
0 0 0 0 0 m0
1 0 0 1 0 m1
2 0 1 0 1 m2
3 0 1 1 1 m3
4 1 0 0 1 m4
5 1 0 1 1 m5
6 1 1 0 1 m6
7 1 1 1 1 m7

33
 The standard Sum of Products-Function
• SOP are expressions of the form:

F (A,B,C, …) = ( …) + ( … ) + ( … ) + …

• Brackets can contain single or multiple variables

• Such expressions can be implemented using:

F (A,B,C, …) = (AND’s) OR (AND’s) OR (AND’s) OR ...

34
 The standard Sum of Product-Function

• SOP form not unique, and doesn’t necessarily contain all

variables, for example:
F (A,B,C) = A’B’C’ + A’BC + C’A’B + C’AB’ + BAC + BAC

and F (A,B,C) = B + B’C’

are both valid SOP expressions.

35
The standard Sum of Product-Function
• We Can obtain SOP from truth table (below)
F(A,B,C) = A’BC’ + A’BC + AB’C’ + AB’C + ABC’ + ABC
A simpler notation is to write as
F (A,B,C) = m2 + m3 + m4 + m5 + m6 + m7
= mi (2, 3, 4, 5, 6, 7)
Decimal value A B C F Minterm
0 0 0 0 0 m
0
A’B’C’
1 0 0 1 0 m A’B’C
1
2 0 1 0 1 m A’BC’
2
3 0 1 1 1 m
3 A’BC
4 1 0 0 1 m AB’C’
4
5 1 0 1 1 m
5 AB’C
6 1 1 0 1 m ABC’
6
7 1 1 1 1 m ABC
7
36
 Product of Sums: Function
•From truth table we have F(A,B,C) = (A’B’C’ + A’B’C)
•Therefore we obtain F from F:
F (A,B,C) = [F(A,B,C)] = (A’B’C’ + A’B’C)
= (A’ + B’’ + C’’)  (A’’ + B’’ + C’) = (A + B + C)  (A + B + C’)
Form Compact F = M0  M1 = Mi (0, 1)

Truth Table
Decimal value A B C F Minterm Maxterm Mi = mi
0 0 0 0 0 m0 M0 A+B+C
1 0 0 1 0 m1 M1 A+B+C’
2 0 1 0 1 m2 M2 A+B’+C
3 0 1 1 1 m3 M3 A+B’+C’
4 1 0 0 1 m4 M4 A’+B+C
5 1 0 1 1 m5 M5 A’+B+C’
6 1 1 0 1 m6 M6 A’+B’+C
7 1 1 1 1 m7 M7 A’+B’+C’
37
 Obtain SOP and POS from a given expression

• Given an arbitrary Boolean expression

n
• Work out number of terms (2 ) for n inputs.
• Generate truth table and identify terms for which the
function is true - the Minterms.
n -1
• Write function as: F m i
i 0

• Alternatively, identify terms for which the function is

false and use a Maxterm description.
• Write function : n 1
F Mj j i
j 0
38
SOP & POS Implementation using AND and OR

• Two-level implementation

• Multi-level implementation

39
 Examples

1- Half Adder
2- Full Adder
3- Deriving SOP and POS from a truth table
4- Simplifying SOP & POS using Boolean
identities

40
 Half Adder
The half-adder accepts two binary digits on its inputs
and produces two binary digits on its outputs: a sum bit
and a carry bit.

Truth Table
A B C S A S
0 0 0 0 1/2 Adder
B C
0 1 0 1
1 0 0 1 1
1 1 1 0 1
10
C S
41
 Half-Adder
A S
1/2 Adder
B C
Truth Table
A B C S
0 0 0 0 Logic Function
0 1 0 1 S = A’B + AB’
1 0 0 1 S=A B
1 1 1 0 C = A.B
A S = A B
B
LOGIC CIRCUIT

C = A.B
42
 Full Adder

Truth Table  The Full-adder accepts two input

bits and an input carry and generates a
A B C CO S sum output and an output carry
0 0 0 0 0
 Basic difference between a full
0 0 1 0 1
0 1 0 0 1 and a half adder is that the full adder
0 1 1 1 0 accepts an input carry
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
A Full S
B Adder Co
C
43
 Full-Adder
Logic FUNCTION
Truth Table CO = A’BC + AB’C + ABC’+ ABC
A B C CO S = C[ A’B +AB’]+ AB [C’ + C]
0 0 0 0 0 = C[A B] + AB.1
0 0 1 0 1 = C(A B) +AB
0 1 0 0 1
0 1 1 1 0 S = A’B’C + A’BC’ + AB’C’+ ABC
1 0 0 0 1 = A’[B’C + BC’] + A[B’C’+ BC]
1 0 1 1 0 = A’[B C] + A[B C]’
1 1 0 1 0
[X] [X]’
1 1 1 1 1 = A’ X + A x’
= A X
= A B C 44
 Full Adder
S= A B C

Logic circuit

Cin = C
Cout = Co C0 = C(A B)+AB

A FULL S
B Adder Co
C 45
 Two bit parallel adder

1 Carry bit from right column

11
+ 01

1 0 0

Carry bit from second column

becomes a sum bit

46
 Two bit parallel adder

A2 B2 A1 B1 0

A B Cin A B Cin

Cout Sum Cout Sum

S3 S2 S1
A2A1
+ B2B1

S3 S2 S1
47
 Four bit parallel adder

A4 B4 A3 B3 A2 B2 A1 B1 C0

AB Cin AB Cin AB Cin AB Cin

Cout Cout S Cout S Cout S

C4 s4 C3 s3 C2 s2 C1 s1

48
Overflow Examples (review from chapter 1)

• In a 6-bit register
+ 17 = 010001
+ 16 = +010000
=100001  Overflow
• 100001 = 2’s : - (11111) = -(31)10 instead of + (33)10
• Same with a 7-bit register
+ 17 = 0 010001
+ 16 = +0 010000
= 0 100001
0100001 = + 33 No Overflow
49
 Four bit parallel adder
0 1 1 0

=0

0 1 1 0
0

50
 Four bit parallel adder
0 1 1 0

=1

1 0 0 1
1

51
 Four bit parallel adder: more examples
Sign bit 0 1 1 0
0 1 1 0
=0

0 0 1 1 1 1 0 0
0 1 1 0 0
1 1 0 0
0
1 1
Overflow

52
 Four bit parallel adder: more examples
Sign bit 0 1 1 0
0 1 1 0
=1

1 0 0 1 0 1 1 0
1 1 1 1 1

0 0 0 0
1
0 1
NO Overflow

53
 SOP & POS Standard Forms- Example
From an arbitrary Truth table (next slide)
• Part one
1- obtain SOP representation for F
2- obtain the two level implementation for F without simplification
3- simplify F using Boolean identities
4- obtain two level-implementation for F
5- compare the design obtained in question 4 with the one of
question 2
• Part two
Repeat part one using POS
54
 Deriving SOP and POS from a truth table
Consider the following arbitrary Truth Table

i) SOP i A B C F Minterms
ii) POS
0 0 0 0 0
1 0 0 1 0
2 0 1 0 1 m2 = A’BC’
3 0 1 1 1 m3 = A’BC
4 1 0 0 0
5 1 0 1 1 m5 = AB’C
6 1 1 0 0
7 1 1 1 1 m7 = ABC
55
 Deriving SOP from a truth table
1- Expression sum of products
a) F = m2 + m3 + m5 + m7
= A’BC’ + A’BC + AB’C + ABC
b) Implementation with logic gates (unsimplified )

A’
B
C'
A’
B F
C
A
B’
C
A
B
C

Two level-Implementation
56
Simplifying SOP using Boolean identities
c) Simplification
Using the Boolean identity absorption xy + xy’= x
We can simplify m2 with m3 and m5 with m7
m2 + m3 = (A’B) C’ + (A’B) C = A’B
m5 + m7 = (AC)B’ + (AC)B = AC
Therefore F = A’B + AC
A’ Two level-Implementation
B

F
A
C
Circuit with 3 gates instead of 5
57
 Deriving POS from a truth table
2- Expression Product of sums

i A B C F Maxterms
0 0 0 0 0 M0 = A+B+C
1 0 0 1 0 M1 = A+B+C’
2 0 1 0 1
3 0 1 1 1
4 1 0 0 0 M4 = A’+B+C
5 1 0 1 1
6 1 1 0 0 M6 = A’+B’+C
7 1 1 1 1
58
 Deriving SOP from a truth table
a) Function
F = M0 . M1 . M 4 . M6
= (A+B+C) (A+B+C’)(A’+B+C)(A’+B’+C)

Logic circuit
A
B
C
A
B F
C’
A’
B
C
A’
B’
C

Two level-Implementation
59
Simplifying POS using Boolean identities
b) Simplification
Using (X + Y) (X+Y’) = X Verification
X Y Y’ X + Y X + Y’ (X + Y) (X+Y’)
0 0 1 0 1 0
0 1 0 1 0 0
1 0 1 1 1 1
1 1 0 1 1 1

M0.M1 = [ (A+B) + C] [ (A+B) + C’]= A+B

M4.M6 = [ A’ + C) + B] [(A’+C) + B’] = A’+C
F = (A+B)(A’+C)

60
Simplifying POS using Boolean identities
C) Two level Implementation

A
B

F
A’
C

61