Design and Analysis of Low Power Universal Line Encoder & Decoder
Design and Analysis of Low Power Universal Line Encoder & Decoder
DOI: 10.5923/j.msse.20160501.02
Abstract Communication plays an important role in day to day life. The information or data is transmitted through
various techniques and line coding is one of the finest techniques for sending data. The selection of these techniques
depends on the bandwidth requirement, DC level, bit error rate performance and the inbuilt error detection property. In this
line coding techniques whose encoder and decoder have been designed and analyzed are Unipolar RZ, NRZ-I, NRZ-L,
Manchester, Differential Manchester, AMI, Pseudoternary, B8ZS, HDB3 coding. Any one of these techniques can be
access with the mode of selection. Switching activity is the one of the main factors that is responsible for the dynamic
power dissipation. Power consumption by the encoders and decoders is directly proportional to switching activity. To
optimize the power of the universal line encoder – decoder, Bus Shift (BS) coding scheme is applied that circularly shifts
the data to minimize the transition. Simulation results show the average saving margin of power in universal encoder is
22% while in universal decoder saving margin is 35%.
Keywords NRZ-I (Non Return To Zero Invert), NRZ-L (non return to zero level), AMI (alternate mark inversion),
Manchester formats, pseudo ternary encoded format, B8ZS (bipolar eight zero substitution) and HDB3 (high density
bipolar zero)
sequence in source information, there are four modules in HDB3 (High density bipolar three): In this encoded format
encoder. For the generator of “V” and generator of “B”, each string of four zeros are represented according to the odd
obeying the alternate mark inversion (AMI) rule. Simulated and even parities define in table 1 [12].
output of HDB3 encoder & decoder proved that results are
identical with theory analysis. 3.1. Encoding Algorithms
Balwinder singh et. al [13] In this paper read/write cycles The signed binary characters are used to implement the
are required for memory testing. The result shows the power design. By using that, zero voltage level represented by 00,
reduction of 30% and 74.8% in data bus and address buses while high (positive) voltage level represented by 01 and
encoding schemes. low voltage (negative) level is represented by 11. Therefore
+1 =00
-1 = 11
3. Line Coding Techniques 0 = 00
Line coding techniques can be widely divided into Table 2. Algorithms
following different classes:
OUTPUT(y0) OUTPUT(y1)
Unipolar RZ: In this encoded format binary 1 is S.NO. TECHNIQUE INPUT
(0 - t/2) (t/2 – t)
represented by 01 for first half interval and it return to 00 for 0 00 00
second half interval. Binary 0 is represented by 00 for both 1 Unipolar RZ
1 01 00
intervals. 0 11 01
Unipolar NRZ-I: In this encoded format binary 1 is 2 Manchester
1 01 11
represented by high level and for next bit position it
represented by low level. Binary 1 is alternating bit by bit. The algorithm for Manchester and Unipolar RZ encoding
Binary 0 represented by same level as binary 1. technique is given in table 2. The differential Manchester
Unipolar NRZ-L: In this encoded format binary 1 is algorithm is given in table 3. The truth table for AMI
represented by low level and for binary 0 is represented by encoding technique is shown in table 4, and for
high level. Pseudoternary encoding is shown in table 5.
Manchester Encoded: In this binary 1 is represented by 01
Table 3. Differential Manchester
(high positive level) for first half bit interval and 11 (low
negative level) for second half bit interval. Binary 0 is Present OUTPUT(y0) OUTPUT(y1) Next
INPUT
represented by 11 (low negative level) for first half bit state (0 - t/2) (t/2 - t) state
interval and 01 (high positive level) for second half bit 0 1 01 11 1
interval [3]. 0 0 11 01 0
Differential Manchester Encoded: In this binary 1 is 1 1 11 01 0
represented by 01 (high positive level) for first half and 11 1 0 01 11 1
(low negative level) for second half of bit interval. For next
bit 1 is represented by 11 (low negative level) first half and Table 4. AMI Truth table
01 (high positive level) second half. Binary 1 is alternating
PRESENT STATE INPUT OUTPUT NEXT STATE
bit by bit. Binary 0 is represented by same level as binary 1.
0 0 00 0
AMI (alternate mark inversion): In this encoded format bit
1 is represented by 01 and 11 alternatively for bit duration 0 1 01 1
while bit 0 is represented by 00 for whole bit interval. 1 0 00 1
Pseudo ternary Encoded: In this encoded format bit 1 is 1 1 11 0
represented by 00 for whole bit interval while bit 0 is
represented by 01 and 11 alternatively for bit duration. Table 5. Pseudoternary truth table
B8ZS (binary eight zero sequence): In this encoded format PRESENT STATE INPUT OUTPUT NEXT STATE
each string of eight zeros are represented by 000+-0+- if it 0 0 00 0
comes after positive pulse while 000-+0+- if it comes after 0 1 01 1
negative pulse.
1 0 11 1
Table 1. HDB3 pattern 1 1 00 0
Parity of -/+ bits since
Pattern Previous pulse Coded 3.2. Decoding Algorithm
previous V
+ 000+ The decoding rules for the line coding techniques are
ODD 000V
- 000- reverse from the encoding algorithms. The rules for
+ -00- decoding the line coded scheme differ for each technique
EVEN B00V defined below.
- +00+
Microelectronics and Solid State Electronics 2016, 5(1): 7-13 9
4. Bus Shift Encoding Technique In this universal line encoder & decoder by using the bus
In this shift the data word on a bus to get minimum shift coding technique power has been reduced. This
transition and also it reduce the power. For simplicity, we use technique based on the hamming distance between the
only right shift but in circular manner. Given presentdata or presentdata and nextdata. In the universal encoding method
nextdata, to determine how many bits of nextdata to shift, do least number of transitions is used to encode the data and
the following: transmit it over the bus. The universal decoder has ability to
coded back signal to bit format at receiver end by using least
1. For j = 1 to m, shift nextdata to right by j-bit and transitions. The optimized universal encoder & decoder has
determine the hamming distance between the low power, high speed, low complexity, and useful for all
presentdata and shifted word. coding techniques.
2. Let us assume HD(min) is the number of bits that result
in minimum hamming distance.
3. Shift the nextdata by HD(min) bits and send the shifted 6. Result and Discussion
word [1].
Example of bus shift ISIM simulator is used for the analysis of universal line
On a 10 bit bus, let us assume presentdata = 1011001001 Encoder & Decoder as shown in Figs 1-3. In this sel [3:0] pin
and the nextdata = 0011011001; here HD(min) between the is used to change line coding technique.
words is 3. The Bus shift will find that on the right shifted Figure 1 shows the results for universal line encoder when
nextdata by 7 bits to get 1011001001 results in zero the sel[3:0] = 0000, due to this value Unipolar RZ is enabled
hamming distance as compare to presentdata [1]. and get the results at the signal z[1:0].
After that power reduced on the bus, is calculated by In the Fig.2 values of signal sel[3:0] = 0110 change and
applying all the coding techniques [3]. To determine the get the output of Pseudoternary encoder block.
power dissipation is given by: Figure 3 shows the results of universal line decoder when
the sel[3:0] = 0001, due to this value NRZ-I is enabled and
Pd = α CL V2DD f (1) get the results at the output signal z[1:0]. Similarly by
α = Switching activity changing the values of the sel[3:0] signal, then the selected
VDD = Supply Voltage blocks also change the corresponding values on sel[3:0]
f = Frequency signal and get outputs at selected blocks on z[1:0] signal.
10 Anjali Taya et al.: Design and Analysis of Low Power Universal Line Encoder & Decoder
The power analysis of optimized Universal line encoder & saving margin of 22% in average cases of universal line
decoder by compared with the conventional Universal line encoder while the saving margin of 35% in average cases of
encoder & decoder. Performance analysis shows the power universal line decoder by using bus shift coding technique.
In the Figure 4 given below, this graph shows the power Table 7. Encoder Power analysis
comparison between the different line coding techniques of
Power
encoders and optimized encoders as given in Table 7. Encoder Optimal Encoder
Technique
Pseudoternary
AMI
HDB3
Mamchester
NRZ-L
Encoder
Power(mW) HDB3 440 430
Universal Encoder 6604 5114
7. Conclusions
3000
2500 In this research work, universal line encoder & decoder
2000 has been designed and analyzed by using the various line
1500 Decoder
1000 Power(mW) coding techniques. After that binary shift coding technique is
500 used to reduce dynamic power dissipation in data bus by
0 circularly shifts the bits to minimize the transition.
Optimal Optimized universal encoder & decoder were compared with
Decoder the conventional encoder & decoder, which shows the power
Power(mW) saving margin of 22% in case of encoder while 35% in case
of decoder. The design has low complexity, high speed, low
power and efficient for all the encoding and decoding
schemes.
Figure 5. Decoder Power (mw) graph
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