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Readme CCR

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0% found this document useful (0 votes)
501 views51 pages

Readme CCR

Uploaded by

Sesha Surya
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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You are on page 1/ 51

Readme for SPB Release version 17.

Copyright (c) 2017 Cadence Design Systems, Inc.


All rights reserved worldwide.

Fixed CCRs: SPB 17.2 HF025


08-25-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1258913 ADW ADWSERVER Copy project message: Unable to locate
tools.jar
1760866 ADW ADWSERVER Metrics dashboard in Allegro EDM
Configuration Manager does not show updated SPB 17.2 hotfix
1055946 ADW ADW_UPREV Set PTF_SUBTYPE SEARCHABLE to false and
default value to exclamation mark
1508163 ADW COMPONENT_BRO Manufacturers Part tab disappears on
clicking anything other than the part number in the left tree
1774164 ADW COMPONENT_BRO In release 17.2-2016 Hotfix 22, DE-HDL
crashes on using Generate View
1345018 ADW DBEDITOR Database Editor does not catch empty
mandatory properties if no changes are made to the part
1586858 ADW DBEDITOR 'Access Denied' Error while opening
Datasheet Model using Launch Viewer in Database Editor
1754185 ADW DBEDITOR Max Height value in DBEditor is different
from PCB Editor
1719260 ADW FLOW_MGR Configuration error on a fresh install of
EDM in release 17.2-2016 Hotfix 014
1743730 ADW LIBDISTRIBUTI .lis file error in install_model while
using MLR.
1757178 ADW LIBIMPORT back-end libimport failed, crash and
existing flashmodel not found
1648609 ADW SRM PCB Editor stops responding when launched
with -s option in release 16.6-2015 Hotfix 078
1731152 ADW TDA TDO coredumps after a new object has been
checked in as minor and deleted.
1766998 ADW TDA TDO-ASA: Cannot enable the project for
team design until a component is added to the new ASA/SCM design
1695240 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D View of a package symbol
not showing the correct mapped STEP file attached to the package symbol
1698148 ALLEGRO_EDITOR 3D_CANVAS Allegro 3D Viewer crashes on Windows 10
1738655 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D canvas crashes on Windows
10
1750001 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D Canvas crashes on selecting
in symbol view
1751796 ALLEGRO_EDITOR 3D_CANVAS 3D Canvas shows component placed at wrong
layer for Embedded components
1768775 ALLEGRO_EDITOR 3D_CANVAS Allegro 3D canvas closes when Update
Symbol is done and cannot be re-invoked
1695025 ALLEGRO_EDITOR ARTWORK Artwork film show shorts.
1708674 ALLEGRO_EDITOR COLOR Dehighlight all should disable the check
boxes in the color dialog/nets
1735522 ALLEGRO_EDITOR COLOR In release 17.2-2016, PCB Editor crashes
when not being able to write the CVSettings.xml file.
1764475 ALLEGRO_EDITOR COLOR Allegro PCB Editor hangs when selecting OK
on the Color Dialog form
1718438 ALLEGRO_EDITOR CROSS_SECTION User interface is inconsistent for the
Mask Layer Subclass site file editor.
1765387 ALLEGRO_EDITOR CROSS_SECTION Cross Section Editor does not retain or
remove layers added/removed from Setup-->Subclasses
1714910 ALLEGRO_EDITOR DATABASE PCB Editor crashes with blank allegro.jrl
file when a release 16.6 board is opened in release 17.2-2016 Hotfix 013
1769534 ALLEGRO_EDITOR DATABASE DBDoctor unable to delete invalid subclass
1775705 ALLEGRO_EDITOR DATABASE Updating stackup in PCB Editor does not
change backdrill status to 'Out-of-Date backdrills'
1778608 ALLEGRO_EDITOR DATABASE Rigid Flex design: Components with pads
defined on the TOP and BOTTOM layers are not placed on the correct layer
1778644 ALLEGRO_EDITOR DATABASE Allegro PCB Editor crashes while trying to
place dimensions
1698695 ALLEGRO_EDITOR DRC_CONSTR Line to Mech-Pin DRC not displayed
1705214 ALLEGRO_EDITOR DRC_CONSTR Shape to drill DRCs not getting void and
'cns_show' does not report constraint value
1722841 ALLEGRO_EDITOR DRC_CONSTR Inconsistent soldermask to soldermask DRCs
on vias as compared to board geometry/soldermask
1736116 ALLEGRO_EDITOR DRC_CONSTR Shape Voiding and DRC error on layer with
no hole or pad definition
1744248 ALLEGRO_EDITOR DRC_CONSTR Release 16.6 to 17.2-2016 DML Independent
Flow does not resolve differential pair pin pairs Correctly
1776848 ALLEGRO_EDITOR DRC_CONSTR Negative plane island DRC reported in
release 17.2-2016 Hotfix 23
1730806 ALLEGRO_EDITOR EDIT_ETCH Element 'vias_allowed' is not valid for
content model adding high speed via structures
1745332 ALLEGRO_EDITOR EDIT_ETCH In release 17.2-2016, PCB Editor crashes
when starting Add ZigZag Pattern
1765555 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes during contour routing
1644401 ALLEGRO_EDITOR INTERACTIV PCB Editor crashes on running the z-copy
command
1657621 ALLEGRO_EDITOR INTERACTIV Copy cline and via cause redundant vias
1688556 ALLEGRO_EDITOR INTERACTIV Limitations with editpad boundary
1704901 ALLEGRO_EDITOR INTERACTIV Changes cannot be done when 'Design
outline' is selected
1710731 ALLEGRO_EDITOR INTERACTIV The Edit > Change command does not select
or change the text on a block
1714855 ALLEGRO_EDITOR INTERACTIV Placing two objects on the Design_Outline
subclass causes PCB Editor to crash
1725736 ALLEGRO_EDITOR INTERACTIV Edit>Change cannot change silkscreen line
to a different class, but works in preselect mode
1728004 ALLEGRO_EDITOR INTERACTIV Text cannot be edited if the
Design_Outline subclass is in the selection box
1728794 ALLEGRO_EDITOR INTERACTIV The Oops command and the Esc key do not
work when moving components in the Temp Group mode
1738070 ALLEGRO_EDITOR INTERACTIV Copying shape after Shape Operations
results in error 'E- (SPMHDB-72): Current active shape must be filled first'
1750696 ALLEGRO_EDITOR INTERACTIV Add notch angle option fails to update if
changed while add notch command is active.
1755240 ALLEGRO_EDITOR INTERACTIV Copy via does not work
1777416 ALLEGRO_EDITOR INTERACTIV Running shape operations results in
database corruption
1715835 ALLEGRO_EDITOR INTERFACES When IDX is imported in PCB Editor, all
the shapes are created on package keepout on all subclasses
1744111 ALLEGRO_EDITOR INTERFACES Pads rotating 90 degree when exporting DXF
file from Allegro PCB Editor
1736045 ALLEGRO_EDITOR MENTOR Third-party import crashes PCB Editor with
error stating that .SAV file will be created
1751914 ALLEGRO_EDITOR MULTI_USER Find Filter options get disabled while
creating symbols
1770811 ALLEGRO_EDITOR MULTI_USER In release 17.2-2016, axlTriggerSet('exit
'routine) causes a crash while exiting
1736545 ALLEGRO_EDITOR OTHER Spelling mistake in description of
no_dynamic_zoom variable in user preferences Editor
1761610 ALLEGRO_EDITOR OTHER Dynamic shape is not voiding as expected.
1702535 ALLEGRO_EDITOR PAD_EDITOR After modifying a padstack in Pad_Editor,
the Update to Design function fails to update the dra file
1713461 ALLEGRO_EDITOR PAD_EDITOR Padstack editor default geometry not
working when cell is preselected
1715702 ALLEGRO_EDITOR PAD_EDITOR Donut shape is lost on cutting the pad
shape of the donut pad
1720300 ALLEGRO_EDITOR PAD_EDITOR Multi-drill staggered pattern: Different
hole placement for first and second rows for releases 16.6 and 17.2-2016
1724896 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor shows flash symbol for
regular pad on selecting 'Shape Symbol'
1714839 ALLEGRO_EDITOR PLACEMENT Selecting an alternate symbol (alt_symbol)
in a group, in the Placement Edit mode, removes the symbol from the group
1781502 ALLEGRO_EDITOR PLACEMENT Quickplace by room crashes Allegro PCB
Editor
1699690 ALLEGRO_EDITOR SCHEM_FTB 'view_pcb directive' no longer working as
expected
1758796 ALLEGRO_EDITOR SCHEM_FTB PCB Editor launched from Project Manager
does not read the relative paths specified in the view_pcb directive
1761101 ALLEGRO_EDITOR SCHEM_FTB On saving a board after import logic in
PCB Editor, the file is saved in the cpm location and not in the physical folder
1761394 ALLEGRO_EDITOR SCHEM_FTB Working directory for PCB Editor changes
after import logic
1714922 ALLEGRO_EDITOR SCRIPTS Running script in the non-graphic mode
runs the tool graphically
1726550 ALLEGRO_EDITOR SHAPE Shape failed to connect to pin
1754945 ALLEGRO_EDITOR SHAPE In release 17.2-2016, Delete islands
fails to add DYN_DELETED_ISLAND to voids on Windows 10 systems
1766280 ALLEGRO_EDITOR SHAPE SPMHGE-300 Polygon operation failed
because of an internal error
1768307 ALLEGRO_EDITOR TECHFILE Properties defined in the technology files
are not being imported in a new design
1771584 ALLEGRO_EDITOR TECHFILE The tech file import command does not
update user-defined property immediately
1730104 ALLEGRO_EDITOR UI_FORMS Change description of Title bar option
variables in User Preferences
1749272 ALLEGRO_EDITOR UI_FORMS etchlen_ignore_pinvia variable needs to be
updated
1649254 ALLEGRO_EDITOR UI_GENERAL Using wildcard to open padstack file
generates error SPMHA1-161 in Padstack Editor in release 17.2-2016
1685985 ALLEGRO_EDITOR UI_GENERAL Funckey not working for Display - Measure
1687073 ALLEGRO_EDITOR UI_GENERAL Show Measure command shifts focus to
Search field in result window after selecting first element
1699272 ALLEGRO_EDITOR UI_GENERAL File Viewer not displaying HTML files
correctly when 'allegro_html_qt' is enabled
1711321 ALLEGRO_EDITOR UI_GENERAL Database settings do not change on
changing color settings using the SKILL function axlDBDisplayControl()
1728468 ALLEGRO_EDITOR UI_GENERAL The Show Element window takes the focus
away from the PCB Editor window
1733690 ALLEGRO_EDITOR UI_GENERAL Performance issues in Visibility dialog if
called repeatedly in release 17.2-2016, Hotfix 017
1734176 ALLEGRO_EDITOR UI_GENERAL Unable to sort padstacks to open in the
padstack editor using wildcards
1735733 ALLEGRO_EDITOR UI_GENERAL RAVEL checks slower in release 17.2-2016,
Hotfix 017
1737545 ALLEGRO_EDITOR UI_GENERAL axlVisibleSet is slower in release 17.2-
2016
1744655 ALLEGRO_EDITOR UI_GENERAL SKILL code with axlVisibleSet slower in
release 17.2-2016 compared to 16.6
1759380 ALLEGRO_EDITOR UI_GENERAL axlLayerPriority API changes layer
visibility and colors
1775071 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, dialog boxes are not
displayed in the right order on using SKILL
1708554 APD GRAPHICS MCM shape lines are almost short and
different with DXF and Gerber files
1678824 APD SHAPE Updating dynamic shape fails to void all
elements on layer L2.
1742335 ASDA COMPONENT_BRO Libraries missing from new Component
Browser
1779777 ASDA CONNECTIVITY_ SDA: Net name and physical net name are
different
1721919 ASDA CROSSPROBE Cross-probing a net from the .brd file
highlights the entire bus in the schematic
1714313 ASDA EDIT_OPERATIO Filter does not work correctly in the
Change RefDes form
1730809 ASDA FORMAT_OBJECT Image transparency slider does not update
the number in the combo box correctly
1747397 ASDA GRAPHICS Pop-up DRC descriptions are too small and
cannot be read
1640061 ASDA HIERARCHY Incorrect message received when invalid
characters are specified for subdesign suffix
1723535 ASDA MISCELLANEOUS Clicking in the Command window should
place the cursor at the last line to avoid editing previously run commands
1699936 ASDA PAGE_MANAGEME Page gaps created while moving pages
1737180 ASDA VARIANT_MANAG Deleted variants are removed from the
variant.lst file but displayed in SDA
1763247 ASDA VARIANT_MANAG Changes in Variant Editor are not
reflected on the schematic page.
1733971 CAPTURE CONNECTIVITY Auto connect to bus not working in the
attached design
1236010 CAPTURE DATABASE Capture is very slow in processing
designs.
1518560 CAPTURE DATABASE Large schematics are slow to respond
1705592 CAPTURE DATABASE Capture hangs when switching between
schematics that contain nested netgroups
1770687 CAPTURE GENERAL In release 17.2-2016 Hotfix 021 and 022,
selecting Help - Learning PSpice throws Java Script error
1692435 CAPTURE HELP Version Info Window is empty
1767374 CAPTURE NETLIST_ALLEG Capture crashes on canceling the
netlisting process
1719613 CAPTURE OTHER Moving a wire in OrCAD Capture CIS or
Allegro Design Entry CIS results in design crash
1746663 CAPTURE OTHER Capture slows down significantly in
release 17.2-2016 Hotfix 017 and 018
1709179 CAPTURE PROPERTY_EDIT Unable to delete unwanted properties
associated with Ground and VCC nets.
1714121 CAPTURE SCHEMATIC_EDI Mirroring and moving a symbol resets the
position of a newly added pin property
1729861 CIS OTHER The 'Refresh Part Types' icon is
alternated with 'Refresh Symbols From Libs' icon
1333600 CONCEPT_HDL COMP_BROWSER Sort the sections numerically in Part
Information Manager
1758761 CONCEPT_HDL COMP_BROWSER Incorrect Version showing in Component
Browser in 17.2
1769591 CONCEPT_HDL COMP_BROWSER Modify Component / Project Information
Manager (PIM), parts take longer to load in EDM
1479711 CONCEPT_HDL CORE Mirroring symbols causes alignment issues
1696208 CONCEPT_HDL CORE Display issue with the grid visibility
after a save hierarchy
1698802 CONCEPT_HDL CORE Pin number overlap with the pin stub when
the component is mirrored.
1708917 CONCEPT_HDL CORE nconcepthdl crashes on a design with a
core dump
1744815 CONCEPT_HDL CORE Deleting a page crashes DE-HDL
1751863 CONCEPT_HDL CORE 'Move' does not move body but only
properties of selected part
1763556 CONCEPT_HDL CORE Component Alignment and other graphical
feature not working in Windows 10
1725121 CONSTRAINT_MGR CONCEPT_HDL Audit report of ECSets reflects some gaps
in certain columns
1758740 CONSTRAINT_MGR CONCEPT_HDL Extracted topology does not populate the
gather control used in the ECSet
1759580 CONSTRAINT_MGR CONCEPT_HDL Class to Class assignments are incorrectly
displayed in the 'CSet Assignment Matrix'
1759590 CONSTRAINT_MGR CONCEPT_HDL Unable to create bookmarks in Constraint
Manager
1764597 CONSTRAINT_MGR CONCEPT_HDL Copying constraints from a SKILL-defined
CSet copies the automation flag/attribute ('A' in UI), as well.
1771427 CONSTRAINT_MGR CONCEPT_HDL Decimal units specified in the precision
settings are not applied correctly
1700402 CONSTRAINT_MGR DATABASE Parallelism violation DRC not reported
until cline is moved
1700370 CONSTRAINT_MGR OTHER Constraint Manager: Expanded nodes
collapse on restart
1735636 CONSTRAINT_MGR OTHER Inductors are extracted as resistors in
the topology
1776917 CONSTRAINT_MGR OTHER Creating advanced formula causes the tool
to crash
1762979 CONSTRAINT_MGR TECHFILE Constraint Manager does not retain values
after importing tech file
1699275 CONSTRAINT_MGR UI_FORMS Constraint Manager: Dialog boxes opened
from the File – Import menu show files and folders in incorrect order
1699312 CONSTRAINT_MGR UI_FORMS Typing *.* in the File name field does not
display all the files in the Import Constraints dialog box
1742134 CONSTRAINT_MGR UI_FORMS Editing a cell from any of the constraint
set in Constraint manager is filling other cells that should not be selected
1755576 CONSTRAINT_MGR UI_FORMS Constraint Manager: Physical CSet filter
not working correctly
1775333 ECW DASHBOARD Activity Log is not accessible to
ECAD_Integrators if they are not part of the project team
1749220 ECW OTHER Remove 'Role' column from Users web parts
1716527 ECW TDO-SHAREPOIN Allegro Pulse: Mismatch between metrics
with components on schematic and components in layout
1724195 FSP SYMBOL_EDITOR Device pins are not correctly aligned
after being moved in Schematic Symbol Editor
1725479 INSTALLATION DOWNLOAD_MGR Download Manager error prompts user to
close downloadmanager.exe
1738952 PCB_LIBRARIAN SYMBOL_EDITOR Pin table must allow for Copy/Paste of
Rows
1638740 PSPICE FRONTENDPLUGI Set minimum height for the search field in
PSpice Part Search
1699822 PSPICE FRONTENDPLUGI Set minimum height for the search field in
PSpice Part Search
1652265 PSPICE MODELING_APPS Cannot place PWL source from PSpice
Modeling App
1685967 PSPICE MODELING_APPS Getting error when trying to place PWL
source from PSpice Modeling App
1716313 PSPICE MODELING_APPS PSpice PWL Sources not working correctly
in release 17.2-2016 Hotfix 014
1738747 PSPICE MODELING_APPS Inconsistent file type for PWL part in
modeling application and source library
1762202 PSPICE MODELING_APPS PSpice modelling app Tcl issues
1736605 PSPICE SIMMODELS BSIM4.6 model parameters incorrectly
handled by simulator
1442623 PSPICE SIMULATOR Bias points are nor correct in attached
circuit
1618815 PSPICE SIMULATOR Bias Point calculation appears incomplete
1723039 PSPICE SIMULATOR PSpice crashes when curly braces are
specified for the ETABLE parts
1782353 SIG_INTEGRITY SIGWAVE SigWave crashes when opening .sww file in
release 17.2-2016 Hotfix 023
1745940 SIP_LAYOUT DATABASE Cutting a part of a tapered cline does not
remove the connectivity on the dangling cline
1780072 SIP_LAYOUT DIE_ABSTRACT_ Export->Die Abstract File causes a crash
1736396 SIP_LAYOUT SYMB_EDIT_APP 'No such child' error message when
deleting pins in symed
1769728 TDA CORE Default policy file needs to be fixed
1735682 XTRACTIM GUI XtractIM translation is incorrect: adds
anti-pads

Fixed CCRs: SPB 17.2 HF024


07-28-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1762143 ADW COMPONENT_BRO Part placed using the 'Add' button does
not populate 'PART_NAME' property
1765790 ADW PART_BROWSER Fail to extract component part number and
footprint information
1757719 ADW TDA TDO and Windchilll Work Group Manager out
of sync at times
1760607 ALLEGRO_EDITOR DATABASE Value for number of decimal places changes
in Pad Designer in release 17.2-2016
1775160 ALLEGRO_EDITOR DFA Loading DFA spreadsheet crashes PCB Editor
in release 17.2-2016
1765984 ALLEGRO_EDITOR OTHER Cannot view System Info
1729350 ALLEGRO_EDITOR REPORTS Net loop is not listed in report
1725242 ALLEGRO_EDITOR SHAPE 'Same net shape to hole spacing' is only
detecting the DRC and not voiding the shape
1754402 ALLEGRO_EDITOR SHAPE Illegal arc radius error (SPMHA1-85)
1762888 ALLEGRO_EDITOR SHAPE Border line missing for some crosshatch
(xhatch) shape voids
1769188 ALLEGRO_EDITOR SHOW_ELEM 'Show Element' with the 'Groups' option
used on certain modules crashes PCB Editor
1767690 ALLEGRO_EDITOR TESTPREP PCB Editor crashes when running automatic
Testprep
1737337 ALLEGRO_EDITOR UI_FORMS Pinned Show Element window closes when
opening new design in release 17.2-2016
1736642 ALLEGRO_PROD_TOOLB INTEGRATION Cannot change accuracy to 4 for 'Change
Width' in Productivity Toolbox
1685216 ALTM_TRANSLATOR CAPTURE Third-party translator placing symbols off
grid
1738679 ALTM_TRANSLATOR CAPTURE Connectivity loss in imported schematic
1738705 ALTM_TRANSLATOR CAPTURE Connectivity loss in imported schematic
1748583 ALTM_TRANSLATOR CAPTURE Crash on importing design using third-
party translator
1679310 ALTM_TRANSLATOR PCB_EDITOR Third-party translator should fix off-
centered connections
1686845 ALTM_TRANSLATOR PCB_EDITOR Third-party translator does not place
parts after successful translation
1723141 ALTM_TRANSLATOR PCB_EDITOR Placement outlines are rotated in third-
party translator
1723164 ALTM_TRANSLATOR PCB_EDITOR Third-party translator creates board with
missing data: vias, traces, and so on
1723190 ALTM_TRANSLATOR PCB_EDITOR Third-party translator changes design
origin
1750496 ALTM_TRANSLATOR PCB_EDITOR Third-party board with arc tracks not
correctly converted to arc clines
1769624 APD DATABASE Attempted symbol delete crashes APD
1727206 APD SHAPE Merging two shapes results in an incorrect
shape
1707756 ASDA VARIANT_MANAG Scrolling in Create Variant closes tool
1753699 CM RELEASE installDebugger() does not work in release
17.2-2016 as SKILL kit is not installed
1741534 CONCEPT_HDL CORE DE-HDL freezes when selecting a net that
contains many connections
1752687 CONCEPT_HDL CORE The move command changes the connectivity
of the schematic
1763525 CONCEPT_HDL CORE Genview crashes when generating split
symbols
1766797 CONCEPT_HDL CORE Schematic not refreshed after using the
clear xnet overrides feature
1770852 F2B PACKAGERXL ERROR(SPCOPK-1138): A hard location was
found on instances of different physical part types
1754473 FSP DE-HDL_SCHEMA Provide an option to generate symbols with
custom attributes
1748106 FSP OTHER Create protocol from existing protocol
error message needs clarity
1724201 FSP SYMBOL_EDITOR Unable to change 'Pin Direction' in symbol
editor
1772429 ORBITIO ALLEGRO_SIP_I Import - OrbitIO: Translator cannot create
bundle in PCB Editor
1725759 SIG_INTEGRITY OTHER PCB shape/plane capacitance
1760924 SIP_LAYOUT DIE_STACK_EDI Package height of die .dra file reset to
110um when placed
1764385 SIP_LAYOUT MODULES Embedded components are unplaced in
created modules (.mdd)
1733679 SIP_LAYOUT OTHER 'metal density scan' does not use select
window
1763707 SIP_LAYOUT OTHER SiP Layout exits with error message in
release 17.2-2016
1763515 SIP_RF DIEEXPORT Virtuoso writes incorrect width for 45
degree path segments in XDA file
1772397 TDA DEHDL DE-HDL crashes if license is not available
for team design
Fixed CCRs: SPB 17.2 HF023
07-7-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1703281 ADW ADW_UPREV Design_init needs to support the -cb
command
1762238 ADW COMPONENT_BRO DEHDL crashes without reason
1759467 ADW DBEDITOR DBEditor does not recognize that 1.10 is a
higher version than 1.9
1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager
1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager
1757443 ADW LIBDISTRIBUTI Blank PHYS_DES_PREFIX in PTF file
1752126 ADW LRM cache not getting updated with std models
when moving from 16.6 to 17.2
1754444 ADW LRM Update Standard library in LRM causes an
error, "Cannot proceed with update as don't have permission to delete."
1715861 ADW SRM symbolrevchk.par has incorrect variable
name for SRM to ignore the tool version
1628403 ADW TDO-SHAREPOIN Objects remain checked-out after multiple
failed 'check in hierarchy' attempts
1759250 ALLEGRO_EDITOR DATABASE Flex-rigid placement does not move bottom
pads to nearest layer
1762782 ALLEGRO_EDITOR DATABASE PCB Editor crashes when creating artwork
1746665 ALLEGRO_EDITOR DFA Cannot scroll in DFA Constraints Dialog if
the DFA constraint file is read only
1750084 ALLEGRO_EDITOR DFA DFA spreadsheet disappears from the DFA
library if hyphen is present in the name
1697155 ALLEGRO_EDITOR GRAPHICS Position and size of Show Element and
Measurement windows not saved in PCB Editor
1734282 ALLEGRO_EDITOR GRAPHICS Placement of reports and pop-ups not
retained in PCB Editor
1740863 ALLEGRO_EDITOR GRAPHICS Show Element and Measure windows do not
retain position
1749687 ALLEGRO_EDITOR GRAPHICS Position and size of Show Element and
Measure windows are not saved in PCB Editor in release 17.2-2016
1764124 ALLEGRO_EDITOR SCRIPTS Replaying recorded script file crashes PCB
Editor
1762888 ALLEGRO_EDITOR SHAPE Border line missing for some crosshatch
(xhatch) shape voids
1763619 ALLEGRO_EDITOR SKILL Incorrect text block name when extracting
text parameters using SKILL
1685826 ALLEGRO_EDITOR UI_GENERAL Reports when opened from Status Form
disappear behind PCB Editor canvas when clicking on canvas
1733552 ALLEGRO_EDITOR UI_GENERAL Although F1 is defined as an alias for
another command, pressing F1 opens help
1735098 ALLEGRO_EDITOR UI_GENERAL axlUIYesNo displays garbled text when
customized for Chinese in release 17.2-2016
1753430 ALLEGRO_EDITOR UI_GENERAL 'Tools - Quick Reports' opens only one
report at a time
1754283 ALLEGRO_EDITOR UI_GENERAL Call multiple reports from a function key
1742822 APD STREAM_IF Component pins are not mirrored properly
when mirror geometry option is checked and component is mirrored at 90/270
1762284 ASDA COPY_PASTE Copying testpoint crashes tool and
eventually the operating system
1655057 CONCEPT_HDL COMP_BROWSER ADW Part Manager and Component Modify
hangs
1689740 CONCEPT_HDL COMP_BROWSER Bad response time using Dehdl component
browser
1735332 CONCEPT_HDL COMP_BROWSER Sort in mathematical order Symbol list in
Component Browser
1739197 CONCEPT_HDL COMP_BROWSER Part Information Manager can`t sorted
symbol version
1764605 CONCEPT_HDL CORE Signal added from the console should be
'Left Aligned' instead of 'Center Aligned'
1761706 CONSTRAINT_MGR CONCEPT_HDL cmDiffUtility has a typo in the usage
statement
1758426 ECW DASHBOARD Behavior of 'Apply Label' for Dynamic and
Status labels should be same in TDO and DE Webpart
1764096 ECW PROJECT_MANAG Renaming project using the ETD window
randomly hangs the edit window, refreshing bring backs the page
1764070 ECW TDO-SHAREPOIN Join Project: Multiple entries shown for
workspace/project with multi-hierarchical structure
1754473 FSP DE-HDL_SCHEMA Provide an option to generate symbols with
custom attributes
1724124 FSP DESIGN_EXPLOR Provide Tcl command to filter data in
Design Connectivity Window
1726548 FSP OTHER Unable to open FPGA system planner if
username/log file path has Cyrillic letters
1719133 SCM SCHGEN Voltage symbol not getting placed for some
of the voltage nets
1680989 SIP_LAYOUT ARTWORK Artwork film set-up: Match Display
including invisible layer
1732218 SIP_LAYOUT DEGASSING Shape will not degas as needed - not all
voids degassed
1763280 SIP_LAYOUT DIE_ABSTRACT_ SiP Layout does not recognize width of
segment when importing .xda
1762992 SIP_LAYOUT OTHER Saving a design after adding a solder mask
layer in the cross-section crashes tool

Fixed CCRs: SPB 17.2 HF022


06-16-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to
create archive'
1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager
1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager
1744081 ADW FLOW_MGR Error regarding configuration file when
trying to open Workflow Manager
1756727 ADW LIBIMPORT EDM Library Import fails with java
exceptions when merging classifications
1743763 ADW SRM Find filter is grayed out when Allegro PCB
Editor is opened from EDM Flow Manager
1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible
for certain clines in PCB Editor
1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey'
command jumps to (0,0) position when the 'move' command is used on it
1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped
after drawing is reopened
1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor
1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering
to constraints
1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled
shapes with gaps
1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at
cursor position
1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location
not working while in user created form.
1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations
using mouse button not working when axlShellPost() is run
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or
crashes PCB Editor
1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate
a third-party schematic to OrCAD Capture
1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD
Capture schematic translated from a third-party tool
1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to
translate the schematic
1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to
translate all the pages of a schematic
1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic
translation fails
1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work
in release 17.2-2016
1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic
into DE-HDL using Import menu in PCB Editor
1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing
clines and vias
1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported
in release 17.2-2016
1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored
incorrectly
1756040 APD IMPORT_DATA The 'die text in' command ignores values
after the decimal point
1727206 APD SHAPE Merging two shapes results in an incorrect
shape
1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while
cross probing DE-HDL
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part
on schematic
1747559 CONCEPT_HDL CORE Copying a logic symbol without a part
table entry results in ERROR(SPCODD-53)
1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align
components' is not working on Windows 8 and DE-HDL crashes
1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify
part data when using schematic pick option
1743572 FLOWS PROJMGR Project Manager displays incorrect values
in Project Setting
1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design
connectivity window
1719105 FSP GUI Tabular sorting not working in FPGA System
Planner
1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N
pins in PDV Symbol Editor
1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing
part information stored in a .csv file
1758856 SIP_LAYOUT 3D_VIEWER Correct the spelling error in the 3D
Viewer Design Configuration window
1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber
files
1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-
redundant padstacks in the Redundant Padstacks check

Fixed CCRs: SPB 17.2 HF021


06-3-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1401318 ADW DBEDITOR Bulk Edit - Previously modified cells do
not turn blue when selected
1621446 ADW DBEDITOR Bulk Edit - sorting highlights incorrect
cells to mark them as changed
1743997 ADW LIB_FLOW Match file for standard models is
incorrect
1746052 ALLEGRO_EDITOR DATABASE PCB Editor crashes when applying no drc
property
1736067 ALLEGRO_EDITOR DRC_CONSTR Interlayer checks not reporting DRCs
between cline and mask layer
1738587 ALLEGRO_EDITOR EDIT_ETCH Line width changing on slide for ETCH -
Conductor (Not on a NET)
1745277 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes on using the slide
command
1747942 ALLEGRO_EDITOR EXTRACT Fabmaster Out does not export arc in
pad_shape
1737202 ALLEGRO_EDITOR GRAPHICS Setting the variable display_raster_ops
1744042 ALLEGRO_EDITOR GRAPHICS Unused pad suppression is not working on
few nets
1703848 ALLEGRO_EDITOR INTERFACES IPC 2581 fails with error 'E- (SPMHGE-
268)' and the log file is empty
1743899 ALLEGRO_EDITOR MANUFACT Glossing dangling vias crashes PCB Editor
1744467 ALLEGRO_EDITOR OTHER The 'logical_op_new' variable is not
displayed in User Preferences Editor
1748520 ALLEGRO_EDITOR OTHER TDP fails to load on an empty database
1748581 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor crashes when changing
default pad geometry
1751469 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor crashes/freezes when
browsing for a shape symbol
1725948 ALLEGRO_EDITOR SHAPE Shape differences after conversion from
release 16.6 to release 17.2-2016
1729306 ALLEGRO_EDITOR SHAPE Seting shape_rki_autoclip variable causes
no void to be generated
1698876 ALLEGRO_EDITOR UI_GENERAL Tabs are large and text is compressed in
release 17.2-2016
1698883 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, enlarging icons
makes selection boxes/text unreadable on 4K monitors
1707933 ALLEGRO_EDITOR UI_GENERAL axlUIMenuFind not locating menu as per
x_location
1741460 ALLEGRO_EDITOR UI_GENERAL Right-click, context menu options grayed
in some cases after choosing Edit - Copy
1747588 ALLEGRO_EDITOR UI_GENERAL Interacting with PCB Editor by sending
messages is not working
1747488 APD EDIT_ETCH Route connect is improperly affecting
existing routes in locked high speed via structures
1750182 APD STREAM_IF The stream out settings are not saved
1752067 ASI_SI GUI Links to differential waveforms do not
work in Sigrity SI report
1752131 CONCEPT_HDL COMP_BROWSER Symbol view in part manager doesn't match
the symbol version
1754116 CONCEPT_HDL COMP_BROWSER Default Symbol selected is n°2 instead of
n°1 in component Browser
1754949 CONCEPT_HDL COMP_BROWSER Part Information Manager displays preview
window with the wrong symbol and missing footprint
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part
on schematic
1750916 CONCEPT_HDL CORE DE-HDL crashes when trying to uprev a
project in release 17.2-2016
1711487 CONCEPT_HDL INFRA Restrict opening of release 16.6 designs
from a release 17.2-2016 design using File - View Design
1746915 CONSTRAINT_MGR CONCEPT_HDL Unable to copy a Physical and Spacing CSet
generated from the Constraint Automation flow
1743523 CONSTRAINT_MGR DATABASE Suppress warning pop-ups from the
constraint automation script
1746941 CONSTRAINT_MGR UI_FORMS 'Go to Source' from DRC tab is not working
in release 17.2-2016
1753010 ECW METRICS Metrics not getting collected due to old
license in use
1713052 FSP GUI Pin/Port Name and Group Name are not
aligned properly in FPGA Port and Use Pin Mapping for DeviceInstance
1719099 FSP GUI Net naming wrong after building block
1719105 FSP GUI Tabular sorting not working in FPGA System
Planner
1720479 PSPICE ENVIRONMENT Probe window does not open consistently on
Windows 10 systems
1723411 PSPICE ENVIRONMENT Probe window does not open consistently on
Windows 10 systems
1746628 PSPICE ENVIRONMENT PSpice Simulation Manager displays same
message for all simulations in release 17.2-2016, Hotfix 016
1745976 SIG_INTEGRITY GEOMETRY_EXTR Arcs with coplanar waveguides are
extracted with incorrect spacing
1690820 SIP_LAYOUT PLATING_BAR Cannot add fillets to pads with plating
bars in release 17.2-2016
1725042 SIP_LAYOUT PLATING_BAR Creating a plating bar removes dynamic
fillets
1747534 SIP_LAYOUT SHAPE Moving fiducial crashes SiP Layout

Fixed CCRs: SPB 17.2 HF020


05-21-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1737443 ADW DBEDITOR Revising the schematic model
classification for one category causes all parts in the library to be revised
1734123 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D canvas crashes Allegro PCB
Designer in 17.2 S016
1742084 ALLEGRO_EDITOR DATABASE Running DB Doctor on DRA files with custom
pad shapes resets some of the custom padstack shapes in release 17.2
1739397 ALLEGRO_EDITOR INTERACTIV In release 17.2, running the SKILL
function axlImportXmlDBRecords causes Allegro PCB Editor to crash
1724588 ALLEGRO_EDITOR MANUFACT Backdrill Route keepout suppressing
existing Route Keepouts
1740036 ALLEGRO_EDITOR MANUFACT Generating the cross-section chart does
not provide information about the overall board thickness
1743726 ALLEGRO_EDITOR OTHER IDF file export: In release 17.2, only one
design outline is exported as against multiple board outlines in release 16.6
1744467 ALLEGRO_EDITOR OTHER The 'logical_op_new' variable is not
displayed in User Preferences Editor
1729350 ALLEGRO_EDITOR REPORTS Net loop report is not working.
1713014 ALLEGRO_EDITOR SHAPE Incorrect behavior of donut shaped pads at
certain rotations
1739870 ALLEGRO_EDITOR SHAPE The artwork is different from the PCB in
release 17.2 Hotfix 17
1698869 ALLEGRO_EDITOR SKILL PCB Editor crashes when trying to open
another .brd file after running SRM on first .brd file
1739307 ALLEGRO_EDITOR SKILL axlCNSDFAExport fails after first run
1743385 ALLEGRO_EDITOR SKILL SKILL APIs for STEP model mapping are not
available in release 17.2 Hotfix 17 or 18
1685826 ALLEGRO_EDITOR UI_GENERAL Reports when opened from Status Form
disappear behind PCB Editor canvas when clicking on canvas
1687797 ALLEGRO_EDITOR UI_GENERAL Cannot open two HTML windows, one after
the other, while using SKILL function
1696229 ALLEGRO_EDITOR UI_GENERAL Setting the 'allegro_html' environment
variable in User Preferences Editor overwrites existing popup text windows
1708636 ALLEGRO_EDITOR UI_GENERAL In SPB 17.2 release, keyboard focus
automatically shifts to the newly opened dialog box
1711367 ALLEGRO_EDITOR UI_GENERAL Launching two report windows using SKILL
is not working in 17.2
1742856 ALLEGRO_EDITOR UI_GENERAL Allegro PCB Editor crashes if Project
Manager is open for a design in release 17.2 Hotfix 18
1729519 APD SHAPE shape degassing does not generate all
voids to cover entire shape
1711375 CONCEPT_HDL CORE Copy-paste of schematic between two
instances of DE-HDL is not working as expected
1737230 CONCEPT_HDL CORE On the Linux platform, copying of
schematic objects does not work between designs of releases 16.6 and 17.2
1741375 CONCEPT_HDL CORE Inconsistent behavior of the Move command
when moving a symbol
1743992 CONCEPT_HDL CORE Inconsistent behavior of the Move command
when moving a symbol
1736093 CONSTRAINT_MGR CONCEPT_HDL Incorrect topology extraction and mapping
errors related to MUX parts
1743518 CONSTRAINT_MGR CONCEPT_HDL Lag observed in expanding and collapsing
the net classes in Constraint Manager
1730159 FSP ALLEGRO_INTEG FSP diff engine does not read PF Thevenin
connections in FSP
1664070 ORBITIO ALLEGRO_SIP_I Display pads of SMD components on correct
layer
1709319 ORBITIO USABILITY OrbitIO issues an error about Device
template while importing brd with Bundles
1741150 PSPICE ENVIRONMENT Need a way to prevent the
'pspSimSetting.js' file from being overwritten by a hotfix installation in 17.2
1735354 PSPICE SIMULATOR Access to custom nom.lib is not working as
expected
1716523 SIP_LAYOUT COLOR Tool crashes on using the PageUp,
PageDown, and Tab keys in the Color dialog box.

Fixed CCRs: SPB 17.2 HF019


05-6-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1701785 ADW ADWSERVER Getting 'Unable to locate tools.jar' error
while using 'Copy Projects'
1706782 ADW ADW_UPREV Design uprev failed with error 'ERROR (FM-
107): Failed to run adw_uprev'
1508159 ADW FLOW_MGR Flow Manager 'Open Last Project' option
points to a deleted project
1690903 ADW FLOW_MGR Flow Manager library project list empty
after 'Remove From List'
1705224 ADW LIBDISTRIBUTI Cannot migrate Library Footprint Models
having subdirectory to release 17.2-2016
1672037 ALLEGRO_EDITOR EDIT_ETCH Add ZigZag Pattern crashes PCB Editor
1695711 ALLEGRO_EDITOR EDIT_ETCH In release 17.2-2016, Fiber Weave Effect -
Add ZigZag Pattern crashes in Windows 10
1706522 ALLEGRO_EDITOR INTERFACES DFX import displays error message '*Error*
eval: undefined function - cloneID' but imports outline
1716336 ALLEGRO_EDITOR INTERFACES DXF file is not correctly imported into
PCB Editor
1720290 ALLEGRO_EDITOR INTERFACES Incorrect rotation of padstack after dxf
import
1724683 ALLEGRO_EDITOR INTERFACES DXF OUT: incorrect Rounded/Chamfered
rectangle pad rotation
1732587 ALLEGRO_EDITOR INTERFACES Format/content of ipc356 files exported in
release 17.2-2016 different from release 16.6
1737516 ALLEGRO_EDITOR INTERFACES IDX Import works differently for placed
and unplaced parts
1715152 ALLEGRO_EDITOR SCRIPTS Clicking Layout in Project Manager fails
to load PCB Editor and gives message 'Word too long'
940699 ALLEGRO_EDITOR SHAPE Update shape to smooth fails to void a few
clines.
1706581 ALLEGRO_EDITOR SHAPE Dynamic shape void clearance errors with
vias
1638300 ALLEGRO_EDITOR UI_GENERAL Version information set in $cdsversion
truncated on title bar for some tools
1697732 CONCEPT_HDL CORE Pasting a signal name results in warning
(SPCOCN-922) if the wire is too close to the edge of the page border
1729510 CONCEPT_HDL CORE Changing the name of a split block adds
pages that are part of the page gaps
1721065 CONSTRAINT_MGR CONCEPT_HDL Physical import errors on changing plane
to conductor in stack-up
1734875 CONSTRAINT_MGR OTHER 'Create Spacing CSet' crashes tool from
existing CSet context and grayed out in design context
1473104 ECW PART_LIST_MAN Pulse does not filter capacitor values
correctly
1736580 PCB_LIBRARIAN SYMBOL_EDITOR Grids are not displayed correctly in
Symbol Editor
1738955 PCB_LIBRARIAN SYMBOL_EDITOR Need ability to edit Symbol Properties
1735215 PSPICE FRONTENDPLUGI PSpice part search customization
CDN_PSPICE_ODBC_SRC environment variable is not working
1733198 PSPICE PROBE Probe crashes when exporting trace
expressions with multiple plots to CSV files
1737060 SIG_INTEGRITY SIGNOISE signoise fails for the
AllegroSigrity_HS_Base_Suite option in release 17.2-2016 and release 16.6-2015
1707443 SIP_LAYOUT WIREBOND Moving bondfingers violates spacing
constraint

Fixed CCRs: SPB 17.2 HF018


04-23-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1721773 ADW ADW_UPREV adw_uprev updates all versions in history
log to the new version. Should only insert note about uprev.
1684346 ADW LIBDISTRIBUTI lib_dist_client fails for new release
17.2-2016 design server
1696632 ADW LIBDISTRIBUTI lib_dist_client fails on release 17.2
Designer Server having release 16.6 Master Server
1705224 ADW LIBDISTRIBUTI Cannot migrate Library Footprint Models
having subdirectory to release 17.2-2016
1721017 ADW LIBDISTRIBUTI adwserver -install fails intermittently
during Master Library Server or MLR distribution
1711373 ALLEGRO_EDITOR COLOR Cannot interact with Allegro PCB Editor
when Color dialog is open
1710772 ALLEGRO_EDITOR DATABASE Mirror command not working on zones
1725621 ALLEGRO_EDITOR DATABASE PCB Editor crashes when moving a group of
components or clines
1699796 ALLEGRO_EDITOR EDIT_ETCH AiDT fails and reports there are no timing
constraints even when propagation delay is set
1726483 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashing when converting
corners to arcs
1726678 ALLEGRO_EDITOR INTERFACES IDX copper layer export does not export
all pin pads
1691036 ALLEGRO_EDITOR MANUFACT Fillet not centered on trace
1732304 ALLEGRO_EDITOR MANUFACT Countersink does not have drill figure on
NCCOUNTERDRILL-1 subclass
1719564 ALLEGRO_EDITOR OTHER Cannot open PDF published in release 17.2-
2016 in third-party software
1723065 ALLEGRO_EDITOR OTHER PDF out does not print the outline
correctly
1729247 ALLEGRO_EDITOR OTHER Cannot delete shape on Route Keepout layer
1722747 ALLEGRO_EDITOR PAD_EDITOR Option to enable 'Connect by Touch' in Pad
Editor
1731643 ALLEGRO_EDITOR PAD_EDITOR Changes to secondary drill are not saved
on padstack update
1727303 ALLEGRO_EDITOR REPORTS The 'Shape Dynamic State' report has
changed to 'Shape Dynamic Status' in release 17.2-2016
1695879 ALLEGRO_EDITOR SHAPE Dynamic shape priority error creates
shorts.
1713014 ALLEGRO_EDITOR SHAPE Incorrect behavior of donut shaped pads at
certain rotations
1588769 ALLEGRO_EDITOR UI_GENERAL Alt+key shortcuts are not available in
release 17.2
1602563 ALLEGRO_EDITOR UI_GENERAL Shortcuts to menu items not working in
release 17.2
1603776 ALLEGRO_EDITOR UI_GENERAL Alt key not working with menu commands
1611516 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts have no response
1647271 ALLEGRO_EDITOR UI_GENERAL Preselection is not working for docked
Find window
1650044 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts are not working
properly in release 17.2
1651912 ALLEGRO_EDITOR UI_GENERAL Inconsistent response when using the Alt
key
1679964 ALLEGRO_EDITOR UI_GENERAL Many dialog boxes are blurred in Allegro
PCB Editor
1692416 ALLEGRO_EDITOR UI_GENERAL Underscores in menu commands denoting
shortcuts are missing in release 17.2
1693055 ALLEGRO_EDITOR UI_GENERAL Reports with html links end with an extra
> at the end
1693968 ALLEGRO_EDITOR UI_GENERAL Batch process that uses SKILL is taking
too long to process files and generate reports
1698840 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016 Waive DRC report,
selected coordinates of a Waived DRC remain blue
1703065 ALLEGRO_EDITOR UI_GENERAL Menu shortcuts do not work as expected
1707547 ALLEGRO_EDITOR UI_GENERAL Release 17.2: The Alt key function is not
working in PCB Editor
1709280 ALLEGRO_EDITOR UI_GENERAL Alt+Function key not working in release
17.2.
1711203 ALLEGRO_EDITOR UI_GENERAL Color does not change for selected
coordinates in reports and Show Element
1711724 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, custom interactive
menus stop responding when invoking another custom command
1715613 ALLEGRO_EDITOR UI_GENERAL With undocked Options window there is a
mix up of entered text and funckey
1719301 ALLEGRO_EDITOR UI_GENERAL Selected coordinates do not change color
in reports and Show Element
1724197 ALLEGRO_EDITOR UI_GENERAL Short cuts and hot keys not working in PCB
Editor in release 17.2-2016
1728724 ALLEGRO_EDITOR UI_GENERAL Funckey is not working in release 17.2-
2016
1673703 ALLEGRO_PROD_TOOLB OTHERS Design compare not reporting the Top and
Bottom layer differences
1704474 ALLEGRO_PROD_TOOLB OTHERS When using Productivity Toolkit - PCB
Design Compare, 'Override undefined width' is incorrectly applied
1571035 ALTM_TRANSLATOR CAPTURE Circles in third-party schematics not
getting translated into Capture
1588911 ALTM_TRANSLATOR CAPTURE Capture crashes when translating, project
and libraries are empty
1589394 ALTM_TRANSLATOR CAPTURE Schematic getting shifted off the page
after translation
1631294 ALTM_TRANSLATOR CAPTURE Errors while translating third-party
design when original design is in metric units
1663176 ALTM_TRANSLATOR CAPTURE Only first sheet of design getting
translated from third-party schematic into Capture
1694363 ALTM_TRANSLATOR CAPTURE Capture is unable to translate third-party
designs
1539739 ALTM_TRANSLATOR CORE Capture crashes on importing a third-party
project
1542860 ALTM_TRANSLATOR CORE Capture crashes on clicking Translate
after selecting a third-party design
1551642 ALTM_TRANSLATOR CORE Unable to import third-party schematics
into Capture
1572929 ALTM_TRANSLATOR CORE Footprint names getting altered during
translation
1568436 ALTM_TRANSLATOR PCB_EDITOR Unable to translate third-party layout
data into PCB Editor
1629256 ALTM_TRANSLATOR PCB_EDITOR Getting empty symbol and devices folders
when importing into PCB Editor
1664120 ALTM_TRANSLATOR PCB_EDITOR Import from third-party to PCB Editor is
not translating data correctly
1701537 ALTM_TRANSLATOR PCB_EDITOR Import does not complete and reports
errors
1698706 APD DIE_GENERATOR When using Compose Symbol from Geometry,
circle from DXF cannot generate to pin
1714528 APD DIE_GENERATOR Getting 'illegal pad pointer' warning when
creating die from geometry
1714532 APD DIE_GENERATOR Compose Die from Geometry creates
incorrect pad shapes
1734310 APD MULTI_USER Symphony server mode malfunctions when die
layer present.
1725506 APD SHAPE In release 17.2-2016 Hotfix 015, void is
not generated in Artwork for BC7 layer causing short
1724395 APD WIREBOND Running axlBondWireDelete returns error
message
1726609 ASDA CANVAS_EDIT Paste should not be allowed in the Current
Refdes column of the Change Refdes form
1719754 CONCEPT_HDL ARCHIVER Path stored in the compressed file starts
from /home instead of the current working directory
1726570 CONCEPT_HDL CHECKPLUS Checkplus crashes on Windows 10
1697977 CONCEPT_HDL CONSTRAINT_MG Differential pair disappears when it is
packaged
1679575 CONCEPT_HDL CORE Page numbers are duplicated in Hierarchy
Viewer when editing page names
1697732 CONCEPT_HDL CORE Pasting a signal name results in warning
(SPCOCN-922) if the wire is too close to the edge of the page border
1711564 CONCEPT_HDL CREFER CRefer crashes while processing a
hierarchical design containing subdesigns
1730736 CONCEPT_HDL OTHER Crash on generating BOM from design
1608350 CONSTRAINT_MGR CONCEPT_HDL Name of buffer model is not passed from
Constraint Manager of DE-HDL to SigXplorer
1715803 CONSTRAINT_MGR CONCEPT_HDL Extract a net from constraint manager to
SigXplorer, the models assigned are not displayed in SigXplorer
1718073 CONSTRAINT_MGR CONCEPT_HDL ECSet mapping errors on an upreved design
in release 17.2: Pins in XNet and CSet do not match
1720886 CONSTRAINT_MGR CONCEPT_HDL SigXplorer does not extract assigned model
from the schematic
1718514 CONSTRAINT_MGR ECS_APPLY Extracted topology does not use the PINUSE
overrides specified on the canvas
1722306 GRE CORE Boards with Total Etch Length constraint
only should not include z-axis when budgeting pin pairs
1710049 PSPICE SIMULATOR Functions are not taking parameters in
correct order
1693021 SIG_INTEGRITY OTHER PINUSE is not updated correctly at model
assignment with specific steps
1730854 SIP_LAYOUT SYMB_EDIT_APP Cannot delete all the die pin from a
symbol using the Symbol Edit application mode

Fixed CCRs: SPB 17.2 HF017


04-13-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1732877 ALLEGRO_EDITOR SKILL The 'axlXSectionGet' function fails in
release 17.2 Hotfix 016

Fixed CCRs: SPB 17.2 HF016


04-6-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1673128 ADW COMPONENT_BRO Directive is saved in project CPM
1673510 ADW COMPONENT_BRO Lifecycle status color column is not
sorted correctly in Component Browser search results
1604734 ADW DATABASE Parts displaying non-key properties and
values in the Component Browser in ADW
1142957 ADW DSN_FLOW No Help available for schematic design
verification
1609186 ADW DSN_MIGRATION ADW Design Migration utility should handle
ADW board reference projects and manage atdm.ini
1591757 ADW GENERIC_UI Running 'Create Test Schematic' in ADW
Flow Manager results in Error SPCOCN-1736
1588111 ADW LIBIMPORT Library Import fails with Java errors
while processing .csv files
1642367 ALLEGRO_EDITOR 3D_CANVAS Component height is not correct in new 3D
Viewer
1642668 ALLEGRO_EDITOR 3D_CANVAS The new 3D canvas does not show STEP model
of the drawing (.dra)
1653247 ALLEGRO_EDITOR 3D_CANVAS New interactive 3D Viewer shows wrong
placement
1658275 ALLEGRO_EDITOR 3D_CANVAS Components on the bottom side are shifted
in the new 3D view
1639244 ALLEGRO_EDITOR ARTWORK When importing an artwork, a sub-folder is
created with the value of the ads_sdart environment variable
1658173 ALLEGRO_EDITOR ARTWORK ARTWORK: Value of Scale factor for output.
1661760 ALLEGRO_EDITOR ARTWORK Import artwork to Design Outline layer
does not give error in Allegro prompt.
1667778 ALLEGRO_EDITOR COLOR Add option to set FORM mini
dehl_retain_color to NO
1669462 ALLEGRO_EDITOR COLOR Changes made to the Visibility tab are not
reflected in the Color Dialog window
1641265 ALLEGRO_EDITOR CROSS_SECTION The differential impedance value for a
layer is not getting updated
1648149 ALLEGRO_EDITOR CROSS_SECTION Getting warning when calculating impedance
in mixed stackup
1671441 ALLEGRO_EDITOR CROSS_SECTION Enhancement request for cross section
dialog box
1673320 ALLEGRO_EDITOR CROSS_SECTION Diff impedance calculation fails
1690021 ALLEGRO_EDITOR CROSS_SECTION How to keep settings of
expanded/compressed columns in the Xsection
1703831 ALLEGRO_EDITOR CROSS_SECTION Calculation of Diff Z0 fails in flex
designs
1711484 ALLEGRO_EDITOR CROSS_SECTION ShowAll Column does not retain its status
1672841 ALLEGRO_EDITOR DATABASE ERROR(SPMHDB-153): Table corrupt;
current/maximum mismatch
1673613 ALLEGRO_EDITOR DATABASE COVERLAY_TOP not present in the Non-
conductor section of Color Dialog window
1688123 ALLEGRO_EDITOR DATABASE Drill Plating Issue
1701995 ALLEGRO_EDITOR DATABASE When upreving a 16.6 brd to release 17.2,
lines drawn on OUTLINE are translated to CUTOUT and not DESIGN_OUTLINE
1710772 ALLEGRO_EDITOR DATABASE Mirror command not working on zones
1713335 ALLEGRO_EDITOR DATABASE Defining Adjacent_layer_keepout_above
and/or Adjacent_layer_keepout_below and then saving the .dra file giving error
1693289 ALLEGRO_EDITOR DFA File - Save As script does not save the
DFA file
1644004 ALLEGRO_EDITOR DRC_CONSTR Unreported DRCs from dynamic copper to
line and dynamic copper to SMT pin
1651425 ALLEGRO_EDITOR DRC_CONSTR The .brd file crashes when moving text
controlled with minimum metal to metal constraints
1663494 ALLEGRO_EDITOR DRC_CONSTR Reported Mechanical Pin to conductor
spacing DRC constraint value is incorrect leading to false DRCs
1687049 ALLEGRO_EDITOR EDIT_ETCH Create a Via Structure disconnects nets
1704296 ALLEGRO_EDITOR EDIT_ETCH Asymmetrical fanout created for BGA
Quadrant style
1686873 ALLEGRO_EDITOR EDIT_SHAPE Merge static shapes deletes both the
shapes selected.
1629925 ALLEGRO_EDITOR GRAPHICS Errors reported and no layout data drawn
in PCB Editor in release 17.2 Hotfix 003 on Ubuntu 14.04
1628895 ALLEGRO_EDITOR INTERACTIV Shape Edit mode: An error message is
required when attempting to edit a Shape with the FIXED property
1666379 ALLEGRO_EDITOR INTERACTIV Place replicate is not working on the
attached test case
1668282 ALLEGRO_EDITOR INTERACTIV Grid display incorrect for repeated grids
1675531 ALLEGRO_EDITOR INTERACTIV Design Entry CIS: Cross Probing with PCB
Editor and Constraint Manager is not working
1694470 ALLEGRO_EDITOR INTERACTIV Update description of variable
padstack_nowarning_display
1696855 ALLEGRO_EDITOR INTERACTIV Mixed grid setting is not displayed
correctly on Define Grid screen.
1698192 ALLEGRO_EDITOR INTERACTIV Deleting and replacing a component causing
database corruption in Hotfix 009
1703671 ALLEGRO_EDITOR INTERACTIV An error occurs when defining grids with
zero increment value
1703812 ALLEGRO_EDITOR INTERACTIV Crash during move when using the 'snap
pick to' option set to symbol origin
1719276 ALLEGRO_EDITOR INTERACTIV Setting variable grid for 'All Etch'
displays an error in the Define Grid form
1663422 ALLEGRO_EDITOR INTERFACES Shape loses group membership after
importing through sub-drawing
1637959 ALLEGRO_EDITOR MANUFACT Thieving uses different clearance values
around the route keepin.
1716431 ALLEGRO_EDITOR MANUFACT Test points generation stops due to an
error
1641994 ALLEGRO_EDITOR OTHER DB Doctor: Incorrect spelling of
'eliminated' in the log file messages
1660496 ALLEGRO_EDITOR OTHER SiP Layout crashes when trying to generate
abstract level view by using export chips and connectivity
1685464 ALLEGRO_EDITOR OTHER The 'alias ~S save' command is not
recognized when set in the local env file
1696486 ALLEGRO_EDITOR OTHER STEP export results vary between releases
16.6 and 17.2
1706623 ALLEGRO_EDITOR OTHER axlBackdrillGet crashes for invalid
argument
1586957 ALLEGRO_EDITOR PAD_EDITOR In Pad Editor, selecting a pad geometry is
not showing up in the Design Layers tab
1610984 ALLEGRO_EDITOR PAD_EDITOR Geometry set in tabs not read, only
initial value set in Start page is used
1614015 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor in release 17.2 does not
auto fill geometry in design layers
1636012 ALLEGRO_EDITOR PAD_EDITOR Keepout should not be allowed if antipad
is not defined for outer layers
1641973 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor: Path to the previously
opened .pad file is not seeded in the File - Open dialog on a fresh launch
1642789 ALLEGRO_EDITOR PAD_EDITOR In release 17.2, 'Units' and 'Decimal
Places' in Padstack Editor are not updated as per the .pad file
1646914 ALLEGRO_EDITOR PAD_EDITOR The 'Save' button is grayed out in
Padstack Editor
1657553 ALLEGRO_EDITOR PAD_EDITOR No possibility to specify Padstack Editor
default library path at invocation
1657609 ALLEGRO_EDITOR PAD_EDITOR Changing Tolerance field in Padstack
Editor does not activate the Save button
1662225 ALLEGRO_EDITOR PAD_EDITOR Padstack editor dialog message doesn't
match available options
1667062 ALLEGRO_EDITOR PAD_EDITOR Padstack editor does not retain the
decimal places from the previous session
1672774 ALLEGRO_EDITOR PAD_EDITOR Pad Editor graphics appear to show offset
incorrectly
1674157 ALLEGRO_EDITOR PAD_EDITOR Update Symbols does not update Pad Type
Information
1675438 ALLEGRO_EDITOR PAD_EDITOR Drill hole size warning for the SMD pad
1684376 ALLEGRO_EDITOR PAD_EDITOR Pad Editor issues with settings, such as
decimal places, layers, and so on
1690376 ALLEGRO_EDITOR PAD_EDITOR Variable padstack_nowarning_display fails
to suppress warnings
1694649 ALLEGRO_EDITOR PAD_EDITOR Change Cancel button to No in warning
generated when updating padstacks in design layout
939242 ALLEGRO_EDITOR PLACEMENT Cross probing between Capture and PCB
Editor is inconsistent
1103945 ALLEGRO_EDITOR PLACEMENT Place Replicate Create does not include
the etch connected to pin
1233019 ALLEGRO_EDITOR PLACEMENT Allow cross probe object selection apart
from highlighting during place replicate
1643078 ALLEGRO_EDITOR PLACEMENT PCB Editor flags an error message when a
module is placed at a specific angle
1696932 ALLEGRO_EDITOR PLACEMENT Inconsistency with Snap pick to when
selecting Segment Midpoint
1654500 ALLEGRO_EDITOR REPORTS In release 17.2 Hotfix 006, display of
Netin (back anno.) report fails when variable ads_sdreport is set
1643992 ALLEGRO_EDITOR SCHEM_FTB Export Physical fails with the 'netrev.exe
has stopped working' error
1653400 ALLEGRO_EDITOR SHAPE Dynamic shape does not void a via.
1668262 ALLEGRO_EDITOR SHAPE dynamic shape does not void custom route
keepout with arc
1682569 ALLEGRO_EDITOR SHAPE Variable 'dv_squarecorners' not working
correctly.
1696240 ALLEGRO_EDITOR SHAPE SKILL error when merging polygons
1709968 ALLEGRO_EDITOR SHAPE In release 17.2, DB Doctor reports error
in shape when no error was reported in release 16.6 for the same shape
1632505 ALLEGRO_EDITOR SKILL In release 17.2 Hotfix 004, PCB Editor
crashes after SRM update and save
1651701 ALLEGRO_EDITOR SKILL Cannot set the etch factor value in the
cross-section using the axlXSectionModify() skill command
1658419 ALLEGRO_EDITOR SKILL PCB Editor crashes after running SRM
1658948 ALLEGRO_EDITOR SKILL axlIsLayerNegative() is not working in
release 17.2
1670956 ALLEGRO_EDITOR SKILL axlIsLayerNegative() always returns nil
1687239 ALLEGRO_EDITOR SKILL Problem with skill function
axlCNSGetPhysical - incorrect parse string
1692345 ALLEGRO_EDITOR SKILL The axlGetParm documentation example for
deleting an artwork record is incorrect.
1707878 ALLEGRO_EDITOR SKILL Object rat_t does not work with
axlDBPinPairLength.
1598061 ALLEGRO_EDITOR UI_GENERAL Adjust menus to allow side by side view
1599901 ALLEGRO_EDITOR UI_GENERAL Color Dialog box is not updating according
to visibility tab.
1602563 ALLEGRO_EDITOR UI_GENERAL Shortcuts to menu items not working in
release 17.2
1603776 ALLEGRO_EDITOR UI_GENERAL Alt key not working with menu commands
1611516 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts have no response
1614763 ALLEGRO_EDITOR UI_GENERAL Cannot scroll to the bottom of an undocked
command window in PCB Editor
1619873 ALLEGRO_EDITOR UI_GENERAL Command Window scrollbar does not reach
its end
1624617 ALLEGRO_EDITOR UI_GENERAL Dialog box title under Setup > Outlines >
Design Outline... Design is misspelled as "Desgin"
1631646 ALLEGRO_EDITOR UI_GENERAL Visibility pane not retaining the correct
layer view
1637062 ALLEGRO_EDITOR UI_GENERAL The last line of the floating command
window in release 17.2 is hidden behind the command window frame
1642645 ALLEGRO_EDITOR UI_GENERAL Cannot scroll to the bottom of an undocked
command window in PCB Editor
1645335 ALLEGRO_EDITOR UI_GENERAL PCB Editor crashes in Hotfixes 004 and 005
if ODE and Allegro Manufacturing options are installed
1647520 ALLEGRO_EDITOR UI_GENERAL PCB Editor crashes after installing
release 17.2 Hotfix 005
1647541 ALLEGRO_EDITOR UI_GENERAL Release 17.2 Hotfix 005: PCB Editor
crashes immediately after launch
1650044 ALLEGRO_EDITOR UI_GENERAL Keyboard shortcuts are not working
properly in release 17.2
1651912 ALLEGRO_EDITOR UI_GENERAL Inconsistent response when using the Alt
key
1652423 ALLEGRO_EDITOR UI_GENERAL Using the F1 key does not display the help
document
1654600 ALLEGRO_EDITOR UI_GENERAL Spelling Mistake in "Design Outline"
dialog box, Setup->Outlines->Design Outline, misspelled as "Desgin"
1654777 ALLEGRO_EDITOR UI_GENERAL Reports UI does not work properly when
writing a report file.
1655500 ALLEGRO_EDITOR UI_GENERAL Visibility selection ignored after color
change
1655514 ALLEGRO_EDITOR UI_GENERAL Artwork Film is available in the View
section only after you restart PCB Editor
1663819 ALLEGRO_EDITOR UI_GENERAL In release 17.2, SKILL function,
axlOpenDesign(), does not work as expected
1671334 ALLEGRO_EDITOR UI_GENERAL Design outline is not shown in 'World
View' window
1672148 ALLEGRO_EDITOR UI_GENERAL Add option in release 17.2 to change the
placement of the Find, Visibility, and Options tabs similar to earlier release
1679418 ALLEGRO_EDITOR UI_GENERAL On choosing Edit - Move, the 'Symbol pin
#' box is obfuscated
1679761 ALLEGRO_EDITOR UI_GENERAL Choosing Edit - Spin hides 'Symbol pin #'
partially
1686887 ALLEGRO_EDITOR UI_GENERAL Hyper Text no longer selects coordinates
for easy copy
1687286 ALLEGRO_EDITOR UI_GENERAL In 17.2 Hotfix 009, the Static Phase meter
shows up in the middle of the screen instead of the lower-right corner
1692416 ALLEGRO_EDITOR UI_GENERAL Underscores in menu commands denoting
shortcuts are missing in release 17.2
1693968 ALLEGRO_EDITOR UI_GENERAL Batch process that uses SKILL is taking
too long to process files and generate reports
1702420 ALLEGRO_EDITOR UI_GENERAL Unable to maximize reports viewer in 17.2
1703065 ALLEGRO_EDITOR UI_GENERAL Menu shortcuts do not work as expected
1703107 ALLEGRO_EDITOR UI_GENERAL Scripting using regional settings for
decimal separator
1707547 ALLEGRO_EDITOR UI_GENERAL Release 17.2: The Alt key function is not
working in PCB Editor
1709280 ALLEGRO_EDITOR UI_GENERAL Alt+Function key not working in release
17.2.
1639896 ALLEGRO_PROD_TOOLB CORE MFG collector does not move files to
subdirectories
1608804 ALTM_TRANSLATOR DE_HDL Translation issues in symbols with
multiple physical pins mapping to a single logical function
1658525 ALTM_TRANSLATOR DE_HDL Invalid characters in pin names
1658536 ALTM_TRANSLATOR DE_HDL All cell names should be generated in
lowercase letters
1609962 ALTM_TRANSLATOR PCB_EDITOR Errors reported during design translation
1661562 APD DRC_CONSTRAIN The wrong space calculation on finger to
trace
1682398 APD SHAPE Deleting islands causes out of date shapes
1638112 ASDA CANVAS_EDIT Unable to rename multiple selected buses
using the 'Assign Name' command
1645571 ASDA CANVAS_EDIT Various routing inconsistencies with
synonym bodies on the canvas
1656336 ASDA CANVAS_EDIT Presence of illegal characters in the net
name removes the entire net name
1667176 ASDA CANVAS_EDIT Unable to add the port symbol in a
specific scenario
1641473 ASDA CONSTRAINT_MA Importing a tech file into SDA makes the
tool unresponsive
1661350 ASDA CONSTRAINT_MA Unable to create physical & spacing class
from the docked CM
1645557 ASDA IMPORT_DEHDL_ Importing a DE-HDL design into SDA adds
the COMMENT_BODY attribute to nets
1652753 ASDA MISCELLANEOUS Tcl command window should display correct
casing for autocompleted command
1654973 ASDA MISCELLANEOUS If there is a casing mismatch in the Tcl
command name, correct command is not picked from the list
1652718 ASDA PAGE_MANAGEME Page numbering on the page border does not
update correctly when pages are moved, added, deleted
1699454 ASDA TABLE In the table object, cursor skips a cell
on the first use of the TAB key
1702702 ASDA TABLE Copy-pasting table objects to a new page
fills the headers and rows in black
1668877 CAPTURE ANNOTATE Using Ctrl+drag does not preserve the
reference designator value
1665454 CAPTURE NETGROUPS Incremental copy for alias does not work
anymore.
1634598 CAPTURE OTHER The ‘OrCAD_Capture_CIS_option’ license not
released even after selecting another product option
1636090 CAPTURE OTHER Capture crashes after switching from
release 17.2 Hotfix 003 to 004 due to some Tcl files
1650029 CAPTURE OTHER Crash while archiving a newly created
PSpice project without adding simulation profile
1659602 CAPTURE OTHER Saving CIS BOM via TCL command window
1678715 CAPTURE OTHER Capture.ini [WebResourcesMenu] is not
working in release 17.2
1619449 CAPTURE PROJECT_MANAG Search not working in a PSpice project
1670133 CAPTURE PROJECT_MANAG Start Page showing wrong Software Version
1670766 CAPTURE PROJECT_MANAG autoreference does not work properly
1676095 CAPTURE PROJECT_MANAG (SID:22758) OrCAD Capture Start Page
reporting wrong hotfix installed
1658315 CAPTURE TCL_INTERFACE Inserting text with double quotes is not
working as expected in PDF created from Capture
1642601 CIS OTHER Design Entry CIS: SQL server password is
required each time the tool is launched
1712279 CONCEPT_HDL CONSTRAINT_MG Differential pairs are dropped from Net
Classes when upreved to release 17.2-2016
1665449 CONCEPT_HDL COPY_PROJECT Copy project fails with error COPYPROJ-77
1661778 CONCEPT_HDL CORE Advanced Find will not find pins with the
SIG_NAME property attached
1666084 CONCEPT_HDL CORE All user-defined properties are not listed
in the Customize columns in Variant Editor
1667043 CONCEPT_HDL CORE Incorrect information in cpm.log file
1670659 CONCEPT_HDL CORE SIGNAME text off grid when pasting copy
using ctrl+v.
1697732 CONCEPT_HDL CORE Warning (SPCOCN-922): The object is being
placed towards the left edge of the schematic. Ensure that the objects are pla
1697955 CONCEPT_HDL CORE Rename Signal places sig_name at an
incorrect position for an unnamed net
1711635 CONCEPT_HDL CORE The arrow keys do not work as expected in
Windows mode
1713091 CONCEPT_HDL CORE Difference in the behavior of 'Add Signal
Name' in DE-HDL between releases 16.6 and 17.2
1708820 CONCEPT_HDL OTHER In a board cache flow, component bodies
are missing when importing another board cached flow project.
1639928 CONSTRAINT_MGR CONCEPT_HDL The '-filterFile' argument is not
recognized when cmDiffUtility is run as a command line operation
1657048 CONSTRAINT_MGR CONCEPT_HDL Unable to navigate through the search
results in the CM Reports
1718073 CONSTRAINT_MGR CONCEPT_HDL ECSet mapping errors on an upreved design
in release 17.2: Pins in XNet and CSet do not match
1717336 CONSTRAINT_MGR DATABASE Netclass members change during logic
import; it's a toggle switch
1718514 CONSTRAINT_MGR ECS_APPLY Extracted topology does not use the PINUSE
overrides specified on the canvas
1682885 CONSTRAINT_MGR INTERACTIV Constraint Manager worksheet switching
does not work correctly in Linux
1669523 CONSTRAINT_MGR OTHER Select is disabled in Constraint Manager
when a command is active in PCB Editor
1670802 CONSTRAINT_MGR OTHER Selecting a list of nets using the shift
key does not work in Spacing and Physical domain
1670922 CONSTRAINT_MGR OTHER Title of the Layer Remove window is
Constraint Manager
1678235 CONSTRAINT_MGR OTHER Select option grayed out in Constraint
Manager if a command is active in PCB Editor
1680917 CONSTRAINT_MGR OTHER In release 17.2, nets cannot be selected
in Constraint Manager when a PCB Editor command is active
1691125 CONSTRAINT_MGR OTHER Highlight command no longer selects the
net in CM
1703791 CONSTRAINT_MGR OTHER Cross highlighting and assigning color to
nets between PCB Editor and CM does not work
1649603 CONSTRAINT_MGR UI_FORMS Expand and Collapse commands do not work
when multiple objects are selected
1654931 CONSTRAINT_MGR UI_FORMS Expand, collapse only works on one of the
multiple selected objects.
1668794 CONSTRAINT_MGR UI_FORMS Incorrect via name shown when filtering
via list
1678305 CONSTRAINT_MGR UI_FORMS Unable to use the CM worksheet
customization (wcfx) from the CDS_SITE area
1679909 CONSTRAINT_MGR UI_FORMS Incorrect layer order getting saved when
defining BB vias in Constraint Manager PCSet
1691906 CONSTRAINT_MGR UI_FORMS Display Issue: When you use the filters,
the horizontal scroll bars are duplicated
1677893 ECW INTEGRATION Integrations list update is not working as
per scheduled time
1652707 ECW METRICS Incorrect date and time displayed in
mouseover tooltip on the Metric Trend chart
1654512 ECW METRICS Incorrect date and time displayed in
mouseover tooltip on the Metric Trend chart
1668953 ECW METRICS IE11 Swedish only: Incorrect date and time
displayed in mouseover tooltip on the Metric Trend chart
1677443 ECW METRICS Queued up metric packets on Pulse server
are not processed if there are any packets related to a deleted project
1663676 F2B PACKAGERXL Physical net name (PNN) errors in the log
file
1669583 GRE DETAIL AiDT always fails push when there is a
connect shape attached to the cline being tuned
1686350 INSTALLATION SPB InstallDiagnose fails to repair some
errors
1672369 PCB_LIBRARIAN EXPLORER Cannot create a New library build in
Library Explorer.
1631034 PSPICE ENVIRONMENT When simulating the design in release
17.2, Capture crashes but works with release 16.6
1648284 PSPICE ENVIRONMENT PSpice project crashes when a design is
opened in release 17.2
1663336 PSPICE MODELEDITOR Ibis translation not supporting paths with
spaces
1679376 SIG_EXPLORER OTHER Topology created in OrCAD PCB SI license
cannot be reopened with the same license
1666484 SIP_LAYOUT CROSS_SECTION On converting a design from release 16.6
to release 17.2, a Dielectric thickness of ‘0.2032’ is added to another layer.
1687988 SIP_LAYOUT DIE_GENERATOR 'compose die from geometry' does not
retain the user-defined padstack name
1715016 SIP_LAYOUT DIE_GENERATOR Using Die Text-In wizard to replace a die
reconnects wire bonds to the wrong die in stack-up
1620601 SIP_LAYOUT MANUFACTURING Need the ability to create LINES with
round end caps in the same way as the LINES appear in the database
1705963 SIP_LAYOUT PADSTACK_EDIT Pad Designer: "None" changing
spontaneously into "Circle 0.000" in a pad stack definition and unable to save
1713767 SIP_LAYOUT REPORTS Reports in release 17.2 for the Verilog
Port Name are adding incorrect data that was not found in release 16.6
1696218 SIP_LAYOUT SKILL SiP Layout crashes on reassigning nets
1695885 SIP_LAYOUT UI_GENERAL Visibility Tab check box: unchecked "All"
disables access to "Shp" check box
1639838 SIP_RF DIEEXPORT Enhance the error message, SIP-1507, to
include that overlapping pins within tolerance are included during die export
1653894 SIP_RF DIEEXPORT Redundant error message for die export,
when view name is other than "layout"
1681332 SIP_RF OTHER Running die export causes Virtuoso to
crash
1679336 SPECCTRA LICENSING Min/Max Propagation Delay cannot be routed
by PCB Router using OrCAD PCB Designer Professional

Fixed CCRs: SPB 17.2 HF015


03-16-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1653366 ALLEGRO_EDITOR INTERFACES Unable to attach step model to symbol
1671760 ALLEGRO_EDITOR INTERFACES Step package mapping window unable to
display step model
1706879 ALLEGRO_EDITOR MANUFACT Trace gets moved to dielectric layer after
using the Gloss function
1708685 ALLEGRO_EDITOR MANUFACT Incomplete ncdrill holes data in drl file
1712057 ALLEGRO_EDITOR PAD_EDITOR Changing text size and restarting Padstack
Editor results in incorrectly scaled forms
1709335 ALLEGRO_EDITOR SCHEM_FTB Cannot import netlist from attached design
1687329 ALLEGRO_EDITOR SHAPE Shape is not voiding uniformly when
component is rotated in 30 degrees
1698539 ALLEGRO_EDITOR SHAPE A thin shape is left when
dv_fixfullcontact is enabled.
1620210 ALLEGRO_EDITOR UI_GENERAL Need to run PCB Editor from both 17.2-2016
and 16.6 releases simultaneously
1687819 ALLEGRO_EDITOR UI_GENERAL Change in Region and Language settings of
Windows impacts decimal character in Padstack Editor
1699326 ALLEGRO_EDITOR UI_GENERAL Padstack Editor follows the geographical
area rules set in the Control Panel while PCB Editor does not
1711341 ALLEGRO_EDITOR UI_GENERAL Incorrect pad size in Padstack Editor when
the German regional settings are used
1712496 ALLEGRO_EDITOR UI_GENERAL Padstack Editor shows incorrect values
when using comma and 3 decimal places
1714744 ALLEGRO_EDITOR UI_GENERAL Using comma instead of dot as integer
separator results in incorrect diameter value
1715714 ALLEGRO_EDITOR UI_GENERAL If the 'Decimal places' field is set to 3,
values in PAD Designer change automatically
1713292 APD WIREBOND Allegro Package Designer crashes when
adding wire to a die pad
1710973 ASDA PACKAGER Unable to export Allegro SDA project to
PCB Layout
1698697 CONCEPT_HDL COPY_PROJECT Copy project corrupts the .dcf file
1705401 CONCEPT_HDL CORE Alignment issues while pasting signal
names in 16.6 Hotfix 084
1707116 CONCEPT_HDL CORE SIG_NAME is placed on non-grid position
1710486 CONCEPT_HDL CORE Rename Signal places sig_name at an
incorrect position for an unnamed net
1667786 CONSTRAINT_MGR XNET_DIFFPAIR Parts with NO_XNET_CONNECTION getting
extracted into SigXplorer
1709508 SIG_INTEGRITY REPORTS Allegro Sigrity SI crashes when running a
reflection simulation
1710097 SIP_LAYOUT DIE_STACK_EDI The IY option of the 'move and stretch
wire' command moves the die to incorrect coordinates
1712964 SIP_LAYOUT SYMBOL SiP Layout crashes when using Renumber
Pins in Symbol Edit application mode

Fixed CCRs: SPB 17.2 HF014


03-4-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1691828 ADW COMPONENT_BRO Part Information Manager displays
incorrect data related to attributes on relationships
1700963 ALLEGRO_EDITOR DATABASE Running the 'slide' command results in the
cline segment losing connectivity
1685502 ALLEGRO_EDITOR INTERFACES The Export - PDF command fails to export
the TOP etch subclass with error code SPMHGE-268
1644643 ALLEGRO_EDITOR MANUFACT The NC drill legend does not match the
drill customization data
1700557 ALLEGRO_EDITOR MANUFACT DXF output does not contain drill figure
data
1660252 ALLEGRO_EDITOR NC NC Drill file generated with errors
1677775 ALLEGRO_EDITOR NC Merging of drills not retained in
database.
1701554 ALLEGRO_EDITOR SHAPE Shape spacing clearance is not updated
unless the shape vertex is deleted
1704669 ALLEGRO_EDITOR SHAPE Route Keepin is not getting created at a
specific location
1685995 ALLEGRO_EDITOR SKILL All film sequence numbers are returned as
0 when using the SKILL function axlGetParam
1621336 ALLEGRO_EDITOR UI_GENERAL Changing the color visibility does not
refresh the screen color immediately
1668817 ALLEGRO_EDITOR UI_GENERAL Changing the visibility or the color on
the canvas in release 17.2-2016 takes longer than release 16.6
1671268 ALLEGRO_EDITOR UI_GENERAL Visibility Window: There is a noticeable
lag when enabling etch, via, and pin on a specific layer one by one
1690691 ALLEGRO_EDITOR UI_GENERAL Reports not generating if the
'allegro_html_qt' environment variable is disabled
1709903 ALLEGRO_EDITOR UI_GENERAL Toggling layer visibility does not change
the display until the mouse pointer is moved
1647596 APD EXPORT_DATA Allegro Package Designer crashes when
trying to export board-level components
1688035 APD OTHER Significant difference seen in the
percentage of metal between the Metal Usage reports of positive and negative layers
1690777 CONCEPT_HDL CHECKPLUS Rules Checker returns an error when the
value of the PACK_TYPE property is in lowercase
1695987 CONCEPT_HDL CORE $PN placement in DE-HDL during part
development is not following mouse placement
1700873 CONCEPT_HDL CORE With duplicate part table files, running
the Assign Power Pins command crashes DE-HDL without any message
1702703 CONCEPT_HDL CORE Location of $PN in DE-HDL Symbol Editor is
not as precise as it was in 17.2 Hotfix 011
1705999 CONCEPT_HDL CORE Signal naming is not working correctly in
SPB 17.2
1677489 CONCEPT_HDL CREFER CRefer points to incorrect page numbers
when there are page mismatches in the logical and physical page numbers
1698259 CONSTRAINT_MGR CONCEPT_HDL Unstable $LOCATION property in release
17.2-2016
1702537 CONSTRAINT_MGR CONCEPT_HDL ECSet mapping errors reported after
removing the signal models on an upreved design
1703981 CONSTRAINT_MGR TECHFILE Importing a technology file (.tcf) results
in packaging errors
1673115 ECW INTEGRATION Import from external data sources
(Integrations) truncates input values to 128 characters
1699395 FSP FPGA_SUPPORT Selecting a QSF part name in the FPGA
Properties window crashes FSP
1704353 INSTALLATION DOWNLOAD_MGR Selecting 'View' in Download Manager
results in error, 'Object Reference not set to an instance of an object'
1705265 INSTALLATION DOWNLOAD_MGR Problem installing OrCAD Library Builder
from Download Manager
1646635 PDN_ANALYSIS PCB_PI PCB Editor uses 'powerdc.exe' to launch
PowerDC instead of the 'powerdc' script

Fixed CCRs: SPB 17.2 HF013


02-17-2017
===================================================================================
=====================================================================
CCRID Product ProductLevel2 Title
===================================================================================
=====================================================================
1567741 ADW COMPONENT_BRO The PPL_list never gets read when using a
saveconf.ctr located in the global site.cpm
1697109 ALLEGRO_EDITOR ARTWORK Artwork not showing padstacks for the
soldermask layer
1682297 ALLEGRO_EDITOR DATABASE Derived padstack and associated padshapes
not updated when design is upreved for compatibility with the current version
1697309 ALLEGRO_EDITOR DATABASE PCB Editor 17.2 uprev changes NC pins from
non-plated to plated
1698624 ALLEGRO_EDITOR DATABASE Opening 16.6 board in 17.2 converts non-
plated holes to plated
1697092 ALLEGRO_EDITOR OTHER axlDBViaStack crashes PCB Editor session
and corrupts the board
1687819 ALLEGRO_EDITOR UI_GENERAL Change in Region and Language settings of
Windows impacts decimal character in Padstack Editor
1696637 ALLEGRO_EDITOR UI_GENERAL Padstack Editor uses Region and Language
settings for the decimal symbol
1699326 ALLEGRO_EDITOR UI_GENERAL Padstack Editor follows the geographical
area rules set in the Control Panel while PCB Editor does not
1616138 ALTM_TRANSLATOR PCB_EDITOR Board file imported from third-party tool
to PCB Editor has the shapes but not the components
1666020 ALTM_TRANSLATOR PCB_EDITOR Board converted from a third-party tool to
PCB Editor has missing components
1690448 CAPTURE CORRUPT_DESIG Corrupt design: nets in this design are
not displayed when running Edit - Browse - Nets
1690455 CAPTURE CORRUPT_DESIG Corrupt design: all the nets in this
design are not displayed when running Edit - Browse - Nets
1684180 CONCEPT_HDL CORE Message should indicate that the user
needs to reload the design after setting SET STICKY_OFF
1695987 CONCEPT_HDL CORE $PN placement in DE-HDL during part
development is not following mouse placement
1688287 CONSTRAINT_MGR DATABASE PCB Editor crashing while adding a net to
a net group.
1675013 ORBITIO ALLEGRO_SIP_I Failed to import brd file
1698968 SIP_LAYOUT 3D_VIEWER 3D viewer shows keepin and not design
outline.
1699884 SIP_LAYOUT ASSY_RULE_CHE SiP Layout crashes on using Assembly Rules
Checker
1689969 SIP_LAYOUT DIE_EDITOR SiP Layout crashes when moving dies using
relative coordinates
1696239 SIP_LAYOUT DIE_EDITOR When using the Die-stack Editor to move
and stretch wires, SiP Layout crashes
1695372 SIP_LAYOUT REPORTS Running the Metal Usage reports fails on
the Primary side.

Fixed CCRs: SPB 17.2 HF012


02-3-2017
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1659641 ADW FLOW_MGR Documentation Editor does not invoke when a
.brd file is opened from EDM Flow Manager
1661632 CONCEPT_HDL OTHER Page skipped in DE-HDL when navigating
using the Page Up and Page Down keys
1668325 ALLEGRO_EDITOR SHAPE Updating shapes to smooth creates erratic
voids.
1670082 CONSTRAINT_MGR ANALYSIS Inconsistency in Constraint Analysis Modes
- Electrical in OrCAD PCB Designer Professional 17.2
1674231 ECW METRICS Re-upload for local metric packets that
failed on first attempt is not working when Pulse server name contains dots
1674338 APD SHAPE Shape is not clearing slivers that are
smaller than the 'Minimum aperture for gap width' of '18 um'
1675677 ADW DBEDITOR DBeditor Issue-Searching by using the
Properties method
1677489 CONCEPT_HDL CREFER CRefer points to incorrect page numbers
when there are page mismatches in the logical and physical page numbers
1679351 ALLEGRO_EDITOR REPORTS Missing Fillets Report is not showing
missing fillets on the bottom layer
1681002 ALLEGRO_EDITOR OTHER 17.2 STEP output fails to produce an output
similar to 16.6
1682287 ALLEGRO_EDITOR EDIT_ETCH Auto-interactive Delay tune (AiDT) rips
lines that have been routed
1682900 ALLEGRO_EDITOR PLACEMENT Moving a symbol by snapping to segment
vertex with 17.2 Hotfix 009 crashes PCB Editor
1684117 CONCEPT_HDL CONSTRAINT_MGR Property deleted from Constraint Manager is
not getting updated in the DE-HDL canvas
1686803 ALLEGRO_EDITOR INTERFACES PCB Editor crashes if the
'ipc2581_group_drills' variable is set.
1687816 ALLEGRO_EDITOR PLOTTING Export PDF Vector text option does not work
1688287 CONSTRAINT_MGR DATABASE PCB Editor crashing while adding a net to a
net group.
1689881 ALLEGRO_EDITOR DFA Record and replay script for loading DFA
spreadsheet not working
1690958 ALLEGRO_EDITOR SKILL SKILL command axlDBDelLock is not working
as explained in the documentation
1692166 APD DATABASE DB Doctor returns 'ERROR(SPMHDB-252): A
corrupt database pointer was detected' for a specific design
1693431 ALLEGRO_EDITOR SKILL Running axlXSectionModify and
axlXSectionSet results in warnings and corrupts multi-zone cross-section
1693719 ALLEGRO_EDITOR MANUFACT Incorrect suppressed holes information in
the drill file created
1693846 ALLEGRO_EDITOR MANUFACT PCB Editor crashes when running the gloss
command
1694151 CONCEPT_HDL CORE Rename Signal for unnamed net added the
sig_name at the incorrect position with small text size.
1694867 ALLEGRO_EDITOR SHAPE Void is deleted by the shape merge command
1695131 ALLEGRO_EDITOR SKILL PCB Editor crashes when using the
axlSpreadsheetDefineCell SKILL function

Fixed CCRs: SPB 17.2 HF011


01-20-2017
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1618986 CONCEPT_HDL CORE Information required about the
DONT_FORCE_ORIGIN_ONGRID directive
1629696 PSPICE PROBE After successfully exporting traces to csv,
PSpice crashes on a subsequent attempt to export traces
1667213 CAPTURE NETLIST_ALLEGRO Tools - Create Netlist stops responding on
Windows10
1667599 APD OTHER Wire Bond operations taking longer than
expected to complete
1667678 MODEL_EDITOR PARSE Signal model assignment creates ESpice
models that do not pass Model Integrity checks
1670120 ALLEGRO_EDITOR UI_GENERAL In 17.2, the Static Phase meter shows up in
the middle of the screen instead of the lower right corner
1670927 ALLEGRO_EDITOR DRAFTING Using zcopy to create a Route Keepin
results in database errors
1675359 ALLEGRO_EDITOR ARTWORK Subclass ETCH/WIRE is added to artwork
definition though the visibility of 'ALL Layers' is turned off
1675619 ALLEGRO_EDITOR MANUFACT Differences observed in IPC-D-356A between
releases 16.6 and 17.2
1676161 ADW FLOW_MGR Opening a project in SPB 17.2 flags the
'Operation load JNI code failed' error
1677405 CONCEPT_HDL OTHER When moving a wire with a dot, the dot is
not removed directly
1678061 PSPICE SLPS Simulating an SLPS co-simulation with a
Fixed-step solver with a value smaller than 1E-4 results in a crash
1679347 PSPICE SLPS SLPS crashes when co-simulating without
opening OrCAD Capture or PSpice
1680113 ALLEGRO_EDITOR SHAPE Irregular void created on dynamic shapes
1680802 ALLEGRO_EDITOR DATABASE A 16.3 database locked with disabled export
of design data should be view only in 16.6
1681129 ALLEGRO_EDITOR DATABASE Match Groups in the DE-HDL design are not
getting transferred to the board file
1681514 ALLEGRO_EDITOR UI_GENERAL Opening the Dynamic Shapes State report
hangs PCB Editor in 17.2 Hotfix 009
1681727 CAPTURE NETGROUPS In 17.2, Capture crashes when closing a
design that has assigned Netgroups
1682297 ALLEGRO_EDITOR DATABASE Derived padstack and associated padshapes
not updated when design is upreved for compatibility with the current version
1682447 CONSTRAINT_MGR CONCEPT_HDL Extraction issue on differential pairs in
the given design
1682454 CONSTRAINT_MGR CONCEPT_HDL Design with NO_XNET_CONNECTION property on
parts is exported to PCB Editor; many other components get the property
1682469 CONSTRAINT_MGR CONCEPT_HDL Creating a CSet from an existing CSet leads
to invalid CSet names in Constraint Manager connected to DE-HDL
1683919 ECW TDO-SHAREPOINT Site Minder integration for login from TDA
not working after SSL certificate update
1684111 ALLEGRO_EDITOR SHAPE Dynamic Shape not voiding overlapped static
shape
1684508 ALLEGRO_EDITOR AUTOVOID Allegro PCB Editor stops responding when
deleting a via
1685540 ALLEGRO_EDITOR OTHER If text is attached to an object, the
object is also printed in the PDF
1685810 ALLEGRO_EDITOR PAD_EDITOR In 17.2, Padstack Editor does not save
adjacent layer information for BOTTOM pads
1685986 ALLEGRO_EDITOR PADS_IN PADS Translator-generated output shows
incorrect unit for the soldermask oversize option
1686127 ALLEGRO_EDITOR SHAPE The void of shape missed in artwork.
1686791 ALLEGRO_EDITOR OTHER Searchable property unavailable on bottom
layer pins in the generated PDF

Fixed CCRs: SPB 17.2 HF010


01-6-2017
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1524700 F2B DESIGNVARI Variant file cannot be loaded
1597787 CONCEPT_HDL MARKERS Save As in Marker dialog causes DE-HDL to
crash
1599843 CONCEPT_HDL INTERFACE_DESIGN Moving NG causes extra elements added to it
to move
1620017 F2B PACKAGERXL Packager Fails with ERROR(SPCOPK-1053) when
$PART_NUMBER property for components has a value
1632977 CONCEPT_HDL INTERFACE_DESIGN Connectivity error when moving NG members
1635941 ALLEGRO_EDITOR INTERFACES Shape created by IPC 2581 for negative film
is not same as the shape on board
1656357 CONCEPT_HDL CORE Pasting a signal name across pages causes
the name to overlap with the wire segment
1657346 CONCEPT_HDL PDF Wire Pattern set to two-dot chain line in a
schematic appears as a solid line in the PDF output
1658048 ALLEGRO_EDITOR COLOR color_lastgroup is not working in SPB 17.2
1658874 CONCEPT_HDL CORE 'Insert (n) Pages' command does not work
when the CONFIRM_WRITE directive is ON
1659030 RF_PCB LIBRARY Offset is not calculated from the center if
using negative values for input pins when placing MSOP symbols
1659097 CONCEPT_HDL CORE Mouse stroke fails to be enabled on startup
with left mouse button (LMB)
1659532 CONCEPT_HDL CORE About Import Design command with the
CONFIRM_WRITE directive
1659929 CONSTRAINT_MGR UI_FORMS Using wildcards in filename for Import
Constraints does not work in 17.2
1660200 ALLEGRO_EDITOR UI_GENERAL Move by Sym Pin # edit box is obfuscated
1662821 ALLEGRO_EDITOR OTHER Cross section chart does not show stack
vias in 17.2
1663641 CONCEPT_HDL COPY_PROJECT File - Copy Project in Project Manager
creates two designs if there are dashes in the design name
1665652 ALLEGRO_EDITOR SHAPE Critical fillet and shape issues in 17.2
1665918 CONCEPT_HDL CHECKPLUS Error (100) Program Internal Error
'Create_flat_node' with checkplus run
1667056 ASI_PI GUI Power Feasibility Editor does not list
capacitors connected to selected nets/parts
1668137 ALLEGRO_EDITOR SCRIPTS PCB Editor crashing when running Script
Replay
1669651 CONCEPT_HDL CREFER CreferHDL values are invisible
1669707 CONCEPT_HDL CORE Pin numbers not visible on the canvas after
replacing a part with the same symbol but a different part property
1670339 ALLEGRO_EDITOR OTHER Small shapes defined on the mechanical
symbol Board Geometry - Outline are not converted to the Cutout subclass.
1670564 ALLEGRO_EDITOR MANUFACT Exported Gerber file cannot be imported in
brd
1670687 ALLEGRO_EDITOR NC nclegend.log reports missing columns which
are present in the NC Legend
1670811 PSPICE AA_MC AA MC Plot settings options
1671428 ALLEGRO_EDITOR UI_FORMS Display origin checkbox position changes in
Step Mapping dialog
1671728 CONCEPT_HDL CORE Option requested to reload
preferred_projects.txt without re-opening DE-HDL
1671901 ALLEGRO_EDITOR UI_GENERAL Toolbar and menus are locked or greyed out
1672477 ALLEGRO_EDITOR DRC_CONSTR DRC generated by Dynamic fillets
1673499 ALLEGRO_EDITOR DATABASE Drill table title issues of backdrill
designs in 17.2
1673681 ALLEGRO_EDITOR UI_GENERAL F1 for Help not working in PCB Editor 17.2
1675499 ALLEGRO_EDITOR DATABASE Running the Gloss command causes PCB Editor
to crash...
1676480 ALLEGRO_EDITOR MANUFACT Creating Variant Assy_Bot Drawing showing
Variant Assy Top Drawing
1677431 ALLEGRO_EDITOR DATABASE Get ERROR(SPMHA1-141): Invalid sector row.
Contact cadence customer support when opening DRA File
1677651 CONSTRAINT_MGR CONCEPT_HDL DE-HDL crash on design after successful
packaging
1677672 CONCEPT_HDL CORE Whitespaces in URL links are not resolved
correctly on Linux with Firefox
1680837 ALLEGRO_EDITOR SHAPE Updating the shape makes the shape
disconnect from Thru pins of same net
1681059 ALLEGRO_EDITOR SHAPE Shape Voiding using DV_SQUARECORNERS
environmental variable does not always produce voids with square corners.
1682312 SIG_INTEGRITY LICENSING Allegro Sigrity SI/PI Product Choices
window is blank after installing 17.2-s009 hotfix

Fixed CCRs: SPB 17.2 HF009


12-8-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1212577 PSPICE MODELEDITOR IBIS translation fails without any
information in log file
1311687 PSPICE MODELEDITOR Timeout error while translating IBIS model
1327174 PSPICE MODELEDITOR Log file should list error details during
IBIS Translation
1499665 ALLEGRO_EDITOR INTERACTIV Offset Move depends on move setting.
1516093 ALLEGRO_EDITOR PADS_IN Pads library translator does not translate
slot orientation
1565795 ALLEGRO_EDITOR UI_GENERAL Search does not work in the Defined
Variables window
1568817 ALLEGRO_EDITOR UI_GENERAL Padstack editor not accepting comma as
decimal separator with system locale set as LANG ru_RU.UTF-8
1569272 ALLEGRO_EDITOR PLACEMENT Get the error message 'E- (SPMHDB-394):
Placement cannot be completed ... 'after creating Place Replicate circuit
1577379 CONCEPT_HDL CORE Packager-XL gives different results when
run from DE-HDL and ADW Flow Manager
1578523 ALLEGRO_EDITOR PAD_EDITOR Library Padstack Browser does not refresh
preview
1578533 ALLEGRO_EDITOR PAD_EDITOR New Padstack Editor does not automatically
update the geometry
1581129 CONSTRAINT_MGR UI_FORMS Unable to dock the Electrical worksheet in
Constraint Manager
1582103 ALLEGRO_EDITOR PADS_IN PADS Library Import creates additional
filled shape not present in source data
1591027 ADW LIBDISTRIBUTION Library Distribution redistributes
previously distributed models
1592026 CIS VIEW_DATABASE_PA View database part does not work from
schematic pages of an externally referenced design
1593389 CAPTURE GEN_BOM Include files in Tools - BOM not working
1593404 SIP_LAYOUT EDIT_ETCH Slide command moves via toward the object
1595872 CIS PART_MANAGER Capture CIS Part Manager PCB Footprint
update case-sensitivity issue
1596955 ALLEGRO_EDITOR EDIT_ETCH Scribble mode is not working as per
expectation.
1600936 ALLEGRO_EDITOR INTERACTIV Pin DataTips differ between 16.6 and 17.2
1605961 ALLEGRO_EDITOR COLOR Wildcards not working in the Filter Nets
field of the Color Dialog window
1606392 ALLEGRO_EDITOR PLACEMENT Filmmask not shown when component is
attached to cursor
1607016 ADW TDA TDO crashes after LRM update during check-
in hierarchy
1608059 CONCEPT_HDL CREFER Removing crefs from top-level design also
removes .csb files from lower-level blocks
1608278 CAPTURE OTHER Crystal Reports: User is prompted for ODBC
password to create a BOM report
1610377 CAPTURE PROPERTY_EDITOR Discrepancies between the NET_SPACING_TYPE
property (or any other property) text and the actual property
1610456 ALLEGRO_EDITOR DATABASE Strip design and selecting user defined
subclasses results in database corruption.
1612793 CONCEPT_HDL OTHER Pattern-based auto-distribution of split
symbols not working if there are spaces before commas
1613442 CONCEPT_HDL CORE Signal names are not horizontally centered
when the wires are added using different methods
1613559 ASDA IMPORT_DEHDL_SHE custom variables from the BOM Tables are
not getting imported
1614093 CONCEPT_HDL CORE Import Design window has artificial 64 char
limit for path - prevents access to some locations
1614372 CONCEPT_HDL EDIF300 OFFPAGE symbol is exported as PageBorder in
EDIF300 schematic
1615075 APD LOGIC Netlist-In wizard fails to import the net
names, but gives a successful completion Info message
1616131 ALLEGRO_EDITOR PLACEMENT While placing a module, the Mirror command
in the right-click pop-up menu is not working
1617377 ALLEGRO_EDITOR UI_GENERAL Visibility pane does not retain the correct
layer view
1617404 ALLEGRO_EDITOR UI_GENERAL axlUIMenuChange does not work as expected
in 17.2
1619412 ALLEGRO_EDITOR INTERACTIV Script to create new padstacks from
existing padstack is putting in wrong values for a regular pad
1621842 ALLEGRO_EDITOR PLACEMENT mechanical symbol without placebound will
not place in QuickPlace
1621874 ASDA PRINT Print - Save as PDF uses the default
printer options only
1621887 ALLEGRO_EDITOR INTERACTIV Getting a 'Could not satisfy the snap
condition' message when using the Snap pick to option
1622680 ALLEGRO_EDITOR PADS_IN Import PADS fails with the 'ERROR: *NET*
section found. Translation of netlist is not allowed.' message
1623832 ADW COMPONENT_BROWSE Incorrect part placement on schematic in
Design Entry HDL 16.6-S073
1624813 CAPTURE GENERAL The Value property is always left aligned
when placing a symbol on the schematic
1624953 ALLEGRO_EDITOR UI_GENERAL Custom views in 17.2 do not return to
original
1625000 ASDA CANVAS_EDIT File - Save Project does not provide any
indication of saving or progress bar
1625163 CONSTRAINT_MGR OTHER There is no status for the analyze command
in the Constraint Manager in 17.2
1626647 PSPICE ENVIRONMENT Capture crashes when loading a design with
two hyphens in sim profile name
1628357 CONSTRAINT_MGR OTHER Constraint Manager shows differences if
exporting and importing constraints on the same board.
1628409 ALLEGRO_EDITOR PAD_EDITOR Pad Stack Editor does not remember last
used directory
1631443 CONCEPT_HDL ERCDX ERC reports warning due to lower-case value
of some properties in chips.prt
1632195 SCM OTHER 'No known page border found' error in
cref.log
1632365 CONSTRAINT_MGR OTHER Select command is disabled in the right-
click pop-up menu from Constraint Manager in SPB 17.2
1632462 ALLEGRO_EDITOR 3D_CANVAS 3D View (new) and PCB Editor crash when
checking collisions
1632590 ALLEGRO_EDITOR 3D_CANVAS PCB Editor crashes when 3D View is open and
more 16.6 boards are opened
1633433 CONSTRAINT_MGR UI_FORMS Expand - Collapse feature for multiple
objects not working correctly
1633454 ADW TDA TDO crashes if DAO throws an exception
1633526 PSPICE AA_PPLOT Spaces in Simulation Profile cause error in
Parametric Plotter
1633608 ALLEGRO_EDITOR COLOR 'Retain objects custom color' should not
enabled as default.
1636216 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D canvas (Unsupported
prototype) is not mapping step model when assigned to device
1636899 ALLEGRO_EDITOR 3D_CANVAS The new 3D Viewer is not taking the Package
Height set on the PLACE_BOUND layer into account when displaying it.
1638185 CAPTURE DATABASE Opening CIS database locks all part
libraries none of which are open
1639409 ASDA CANVAS_EDIT Handling of MAKE_BASE property from DE-HDL
designs imported into SDA
1639541 CONSTRAINT_MGR OTHER PCB Editor 17.2 crashes when making changes
in Constraint Manager
1639613 APD STREAM_IF The stream out command has created sharp
angles in the GDSII output file
1640061 ASDA HIERARCHY Incorrect message received when invalid
characters are specified for subdesign suffix
1641118 F2B DESIGNVARI Some DNI parts are not identified in the
variant view due to the BLOCK
1641410 ASDA CONSTRAINT_MANAG No errors or issues reported when incorrect
topology is applied to a net or an Xnet
1642891 CONSTRAINT_MGR CONCEPT_HDL DE-HDL crashes randomly while working on
Constraint Manager
1643003 CAPTURE PROJECT_MANAGER Start page shows latest as S004 after
installing S005
1643532 ALLEGRO_EDITOR OTHER Strip design command fails to delete symbol
text in the attached design
1645529 ASDA CONSTRAINT_MANAG Unable to delete the diff pair from the
nets
1645639 CONSTRAINT_MGR CONCEPT_HDL DE-HDL crashes when the XNET_PINS property
value has a trailing comma character
1646354 CONSTRAINT_MGR CONCEPT_HDL Cannot select Design Instance/Block Filter
from the View menu in Constraint Manager
1646612 PCB_LIBRARIAN CORE Generate Symbol option crashes Part
Developer
1646932 ALLEGRO_EDITOR MANUFACT Manufacture - Auto Rename Refdes keeps
defaulting to Use Default Grid even if another is chosen
1647190 APD REPORTS 'Sorted by Bond Finger' report shows
incorrect wire bond connection
1647673 ASDA EXPORT_PCB Two Physical folders are seen after
installation of QIR
1647729 ALLEGRO_EDITOR SKILL axlFillet returns t when fillet is not
added.
1647779 CONSTRAINT_MGR OTHER 'Software Version' in the cmDiffUtility
viewer does not show the correct version
1647843 ALLEGRO_EDITOR ARTWORK Misleading information in command window
when artwork import fails
1648575 CAPTURE OTHER Suppress warning setting must be written in
capture.ini file
1649060 CONSTRAINT_MGR CONCEPT_HDL Rename dcfx to dcf process results in error
in log file and dcf not updated
1650106 ALLEGRO_EDITOR 3D_CANVAS 3D canvas rotates mirrored components in
unmirrored angle
1650238 SIP_LAYOUT WIREBOND When performing 'Adjust Min DRC', the
reference bond finger should not move.
1650734 APD SHAPE Shape on L1 does not flood properly
1650793 CONSTRAINT_MGR CONCEPT_HDL Conflict of XNET_PINS definition between
the chips and the SIGNAL_MODEL is not handled correctly
1650801 ALLEGRO_EDITOR SCHEM_FTB Running Export Physical with Update PCB
enabled in Project Manager crashes netrev.exe
1651011 ALLEGRO_EDITOR 3D_CANVAS Interactive 3D viewer shows mechanical
symbol mirrored
1651063 ALLEGRO_EDITOR CROSS_SECTION Cross-section preview is incorrect
1651066 ALLEGRO_EDITOR DATABASE Pins not connecting even after running the
Tools - Derive Connectivity command
1651700 ALLEGRO_EDITOR SKILL Running axlXSectionModify() on a layer
removes the value of the material
1651925 ALLEGRO_EDITOR ARTWORK Searching for a macro in the artwork data
file: Count for the macro does not match the actual count in the output
1652230 CONCEPT_HDL CORE The master.tag and vlog004u.sir files are
not created in the entity directory on saving symbols
1653080 CONCEPT_HDL ERCDX Difference in results from SPB16.6 in
'erc.rpt' when logic_data is renamed as worklib in SPB17.2 on RHEL6.5
1653422 ADW LIBIMPORT Classifications not linked to a Part Number
or Cell Model are removed during Library Import
1653526 ALLEGRO_EDITOR DATABASE Via padstack keepout is not displayed on
the canvas when pads suppression is enabled.
1653951 ALLEGRO_EDITOR CROSS_SECTION Cross Section Editor changes lost despite
selecting No to the 'All changes will be lost ...' message
1656224 ADW FLOW_MGR Copy Project wizard no longer allows dashes
in the 'Name of new project folder' field
1656581 ALLEGRO_EDITOR OTHER PDF generated for layer with shape shows
undesired voids if film is mirrored and Filled Shape is not selected
1656608 APD REPORTS Incorrect calculation in the metal usage
report
1656726 CONCEPT_HDL CORE Interface command always disabled in the
Wire menu
1656841 CONSTRAINT_MGR UI_FORMS Incorrect layer information is displayed in
the Edit Via List dialog when a filter is applied
1657220 ALLEGRO_EDITOR SKILL axlXSectionGet() returns Primary list of
layers and not All stackups
1657257 SIP_LAYOUT EXTRACT When using extracta, custom layer names not
getting retained
1658440 ALLEGRO_EDITOR PAD_EDITOR The location of a drill in the .pad file is
different from the .dra file
1658445 CONSTRAINT_MGR CONCEPT_HDL When DCF file is converted to ASCII, no
further updates are allowed.
1659473 SIP_LAYOUT WIREBOND When moving wirebonds they are jumping
instead of sliding
1659498 ALLEGRO_EDITOR INTERACTIV Unable to turn off line on Etch Wire for
Jumpers
1659644 CONCEPT_HDL OTHER Predefined nets are not listed if 16.6
design is being opened in 17.2
1660475 CONSTRAINT_MGR UI_FORMS The CTRL+V shortcut is not working in the
Export Constraints window in Constraint Manager 17.2
1660492 ALLEGRO_EDITOR UI_GENERAL PCB Editor crashes when using multiple
desktops on Windows 10
1661133 CONSTRAINT_MGR ANALYSIS PCB Editor crashes if comma is used in the
Value field for Analysis Mode
1661307 CONSTRAINT_MGR CONCEPT_HDL Prevent creation of diff pairs on VOLTAGE
nets
1661357 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes when using Route -
Connect
1661874 ASDA DESIGN_CORRUPTIO Unable to delete the ZERO part from the
schematic page
1662799 ADW SRM Mechanical symbols are not being displayed
in the Mechanical tab of Symbol Rollback Manager
1664797 SIG_INTEGRITY GUI Unnecessary coupled interconnect models
were generated during View Waveform.
1664858 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes during Auto Interactive
trunk route.
1664911 ALLEGRO_EDITOR OTHER PCB Editor freezes after DRC Update is
performed
1666329 CONSTRAINT_MGR OTHER SCM Import Physical process crashes
cmfeedback
1666551 ALLEGRO_EDITOR ARTWORK Import Artwork, Mirror option separates
imported artwork to different XY locations
1666723 ECW TDO-SHAREPOINT TDO login is not working with Site Minder
because of incorrect characters in the Site Minder login form HTML
1667068 ALLEGRO_EDITOR SHAPE Update shape removing the shape voiding
1669828 F2B DESIGNVARI Variant Editor crashes on Windows 10 T540 P
laptops but works fine on Windows 10 desktops
1670221 ALLEGRO_EDITOR DATABASE Non-recoverable corruption error is
reported when saving the board after adding a layer
1672134 ALLEGRO_EDITOR ZONES TDP needs FIXED component override

Fixed CCRs: SPB 17.2 HF008


10-29-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1644406 ALLEGRO_EDITOR SHAPE Alternate symbol placement results in
illegal parent identifier error
1647098 SIP_LAYOUT OTHER SiP crashes on symbol copy and rotate
1647154 APD OTHER Disconnected Clines not working
1648817 GRE IFP_INTERACTIVE Allegro PCB Editor stops responding on
adding netgroups to a nested netgroup
1649829 CONCEPT_HDL CORE A delay is observed before the sub menus
of the File and Tools menus appear
1652930 ALLEGRO_EDITOR OTHER Command-line version of switchversion not
working
1653109 ASDA DESIGN_CORRUPTIO SDA not pulling latest library information
for part
1655377 FLOWS PROJMGR Project Manager crashes on Windows 10

Fixed CCRs: SPB 17.2 HF007


10-20-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1582276 CONCEPT_HDL CORE Need the ability to delete an image placed
on the DE-HDL canvas
1594101 CONCEPT_HDL CORE No error or warning issued on specifying an
incorrect unit for voltage
1611293 ALLEGRO_EDITOR UI_GENERAL If the Command window is floating, it cuts
off text from the bottom half of the last line.
1611652 ALLEGRO_EDITOR UI_GENERAL New artwork film not appearing in the drop-
down list for Visibility Tab
1618205 ALLEGRO_EDITOR UI_GENERAL New Artwork film added is not updated in
Visibility - View
1631114 CONSTRAINT_MGR OTHER SKILL functions axlCnsPurgeAll and
axlCNSDelete delete spacing constraint sets but not deleting names
1633726 ALLEGRO_EDITOR UI_GENERAL Visibility tab not dynamically updating the
view list when artwork film changes
1636404 CONSTRAINT_MGR CONCEPT_HDL In 17.2 QIR1, DE-HDL Constraint Manager
allows users to enter invalid voltage units
1636864 ALLEGRO_EDITOR UI_GENERAL Domain Selection for Visibility does not
work with Hotfix 004 unless you save and reopen the board file
1638251 ALLEGRO_EDITOR DATABASE Unplated hole changed to plated hole after
uprev from 16.6 to 17.2 version
1639483 ALLEGRO_EDITOR EDIT_ETCH Manually routing discrete components with
incorrect constraints causes PCB Editor to crash
1641435 SIP_LAYOUT IMPORT_DATA Need SiP Stream mapping layer count to
match Virtuoso stream layer mapping count
1641483 SIP_LAYOUT WIREBOND SiP Layout - Modify the wirebond report
generation for Start and End height when using a DISCRETE class footprint
1644131 F2B PACKAGERXL Option needed to package a DE-HDL design
with ptf errors into a board file
1644807 CONSTRAINT_MGR ANALYSIS Unable to set electrical constraints modes
with the OrCAD PCB Designer Professional licenses
1646228 ALLEGRO_EDITOR UI_GENERAL Running the axlUIMenuInsert command to add
a submenu after running the axlUIMenuFind command crashes the tool
1647402 PSPICE PROBE Unable to print on Windows 10 as no plots
are displayed in the Probe window
1648183 ALLEGRO_EDITOR INTERFACES Allegro STEP Export: Using the
'step_3D_copper' variable, pads not exported in the same plane as traces and shapes
1649222 APD ASSY_RULE_CHECK Allegro Package Designer stops responding
on running the Acute Angle Metal DRC

Fixed CCRs: SPB 17.2 HF006


10-7-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1585203 ADW DBEDITOR Optimize check-in of footprints with
multiple padstacks
1607954 ALLEGRO_EDITOR SHAPE Dynamic Shape not updating correctly
1618173 ADW SRM SRM does not automatically run when a .brd
file is opened from EDM Flow Manager in 17.2 Hotfix 003
1618832 ADW SRM SRM marks parts as updated even when they
are not updated
1623823 SIP_LAYOUT WIREBOND NO_WIREBOND property is ignored by Add/Edit
Non-Standard
1626001 ALLEGRO_EDITOR SHAPE Shape to route keepout DRCs reported for
dynamic shapes in the attached design
1626546 SIG_INTEGRITY FIELD_SOLVERS Extra RL elements in via spice circuit
model generated by Via Model Generator
1631792 SCM OTHER The NC net has re-attached itself to
another net, RIGHT_LEFT_N, in the design
1632223 ADW LRM Checking in a hierarchy causes a crash
1632844 F2B DESIGNVARI Part is simultaneously defined as Pref and
DNI in Variant Editor with no error
1633647 ALLEGRO_EDITOR MANUFACT Variant issue: Create Assembly Drawing
command not creating filled shapes for keying pegs in attached design
1633707 ALLEGRO_EDITOR DATABASE Cannot remove Route_Keepout associated with
a pin
1634392 PCB_LIBRARIAN OTHER Launching Library Explorer without -proj
option crashes the tool
1635049 CONSTRAINT_MGR CONCEPT_HDL DE-HDL crashes when trying to create layer
set from Constraint Manager
1635593 ORBITIO ALLEGRO_SIP_IF Importing .sip file reports undefined
argument error while processing shapes
1635858 ALLEGRO_EDITOR ARTWORK Get 'WARNING: Null REGULAR-PAD specified
for padstack' messages in log file when generating artwork for all layers
1636097 ALLEGRO_EDITOR ZONES Technology Dependent Packaging footprints
not updating in the design
1636185 ALLEGRO_EDITOR ZONES Import Placement not placing TDP footprints
in zone
1636867 CONSTRAINT_MGR OTHER Millimeters shown as mils in the Analysis
Modes dialog box
1638094 SIP_LAYOUT OTHER Cross Section Editor not seeing updated
information
1639845 ALLEGRO_EDITOR INTERFACES Step file not generated when board is
exported to a folder with special characters in name
1640611 APD SKILL Launching XtractIM from SiP Layout with the
attached design crashes both SiP Layout and XtractIM
1641339 ALLEGRO_EDITOR INTERFACES DXF_IN does not show all the subclasses
available in the design
1641879 XTRACTIM GUI XtractIM crashes on extracting a SiP design
if 'SI Ignore' is selected for a die stack layer in Cross Section Editor
1642012 CONCEPT_HDL CONSTRAINT_MGR Schematic-defined net groups without any
members cannot be deleted in Constraint Manager
1642015 CONCEPT_HDL CORE Pin exists on block but no corresponding
port exists in the underlying schematic
1642597 ALLEGRO_EDITOR OTHER Importing .tdp file: Footprints not
included in the .tdp file are updated in the design
1643557 SIP_LAYOUT DIE_GENERATOR Die Text files will not update the design
1646086 ASDA IMPORT_BLOCK Importing a DE-HDL design into SDA results
in error 'IMPSHT-42 Alias cannot be created'
1647580 ASDA IMPORT_PCB SDA-File Import from PCB Editor has
duplicated RefDes on schematic.

Fixed CCRs: SPB 17.2 HF005


09-10-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1496199 ALLEGRO_EDITOR SHAPE Overlapping route keepouts result in a
broken shape
1519972 ALLEGRO_EDITOR DRC_CONSTR Dynamic phase DRC at incorrect location
1521940 ALLEGRO_EDITOR DRC_CONSTR PCB Editor not recognizing the correct pin
pairs of the differential pair
1536713 ALLEGRO_EDITOR INTERFACES File - Viewlog still checks for brd2odb.log
file
1568912 RF_PCB BE_IFF_IMPORT Route keepouts can only be imported once
1586846 RF_PCB PLACEMENT Get an error while manually placing
RFCOMPIB part
1588769 ALLEGRO_EDITOR UI_GENERAL ALT+key shortcuts are not available in 17.2
1589396 ALLEGRO_EDITOR UI_GENERAL Need option in 17.2 to change the placement
of the Find, Visibility, and Options tabs
1593258 ALLEGRO_EDITOR OTHER Adding German letters to database diary
deletes all the entries
1597413 SIG_EXPLORER SIMULATION SigXplorer crashes when simulating with a
via that was added to the canvas
1599680 ALLEGRO_MFG_OP ALLEGRO_INTEG Documentation Editor crashes on opening a
specific database
1606682 ECW ADMINISTRATION ECWBackup and ECWRestore fail when data is
1GB or more
1607250 ALLEGRO_EDITOR DATABASE A board file created in release 16.5
crashes when opened in 16.6 Hotfix 69
1607565 ALLEGRO_EDITOR SYMBOL Default values are not consistently
converted when adding pins after changing units.
1607956 ALLEGRO_EDITOR OTHER Unable to generate the model index file
from the command line using mkdeviceindex
1609794 ALLEGRO_EDITOR UI_GENERAL PCB Editor: Shortcut keys to menus are not
available in 17.2
1609817 CONSTRAINT_MGR CONCEPT_HDL DE-HDL crashes on opening project
1611446 ALLEGRO_EDITOR SHAPE Inconsistent break in shape when creating
voids in a design in 16.6 Hotfix 69
1613512 ORBITIO ALLEGRO_SIP_IF Unable to read the OrbitIO database file
(.oio) in SiP Layout
1619610 ORBITIO ALLEGRO_SIP_IF Some mechanical pins appear rotated by 90
degrees when imported
1620814 ALLEGRO_EDITOR PARTITION Etch and Via are not imported with the
partition
1621390 GRE CORE Design Crashes during the Spatial Planning
phase
1623112 ALLEGRO_EDITOR OTHER SPB17.2 switch release is unable to
identify 16.6 release when 16.6 is installed in All-Users mode
1623113 ASI_SI GUI Aggressor waveforms are not displayed in
waveform viewer after crosstalk simulation
1623231 CONCEPT_HDL CORE Unable to make the Attributes form part of
the standard display in DE-HDL
1623666 APD OTHER Incorrect vector pin syntax appears in the
chips file written using 'RF Module - Export chips & connectivity'
1623888 CONSTRAINT_MGR CONCEPT_HDL Ambiguous and inaccurate mapping errors
reported when an ECSet is applied to a differential pair object
1623904 ALLEGRO_EDITOR SCHEM_FTB Logic import fails, but no error mentioned
in the netrev.lst file
1623935 ALLEGRO_EDITOR SKILL On running the SKILL function,
axlSectionModify, Shield and Etch Factor are not updated
1625610 ALLEGRO_EDITOR SHAPE Modifying a shape boundary leads to other
shapes losing their voids
1626716 ALLEGRO_EDITOR UI_FORMS Z-Copy menu is not available with OrCAD PCB
designer Professional license
1628403 ADW TDO-SHAREPOINT Objects remain checked out after multiple
failed 'check-in hierarchy' attempts
1630458 ORBITIO ALLEGRO_SIP_IF Import OrbitIO Database file (.oio) in SiP:
Bill of Materials report does not include standard dies
1632504 CONCEPT_HDL CORE DE-HDL core dumps during Save Hierarchy on
Linux
1633581 ALLEGRO_EDITOR PLACEMENT On mirroring a part, the cursor moves to
the origin of the board
1633601 ALLEGRO_EDITOR PLACEMENT Place - Via Arrays - Boundary command: Via
arrangement pattern deteriorated in Hotfix 004

Fixed CCRs: SPB 17.2 HF004


08-14-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
908816 CAPTURE SCHEMATIC_EDITOR Few graphical operations are active even
when a page has been locked
1213923 ADW LIBIMPORT Cannot delete parts in the Library Import
project (XML)
1250476 PCB_LIBRARIAN LIBUTIL con2con does not check for PACK_TYPE value
set to question mark
1306441 APD OTHER The Minimum Shape Area option in Layer
Compare uses an unspecified value
1322242 ALLEGRO_EDITOR INTERFACE_DESIGN Using Add Connect with the Replace Etch
option causes PCB Editor to slow down for certain constraint nets
1326716 ADW DOCUMENTATION Dataexchange documentation correction
needed
1356948 APD DEGASSING When using the Degassing tool on shapes the
size of the file becomes very large
1376510 ADW DBEDITOR DX output ERROR after Property Display
Ordering of Part Classification.
1408218 ALLEGRO_EDITOR MANUFACT Specifying the Offset value results in
unexpected value of the NC Route coordinates in the .rou file
1410485 CAPTURE SCHEMATIC_EDITOR The 'Autowire - Connect to Bus' menu
command and the 'W' keyboard shortcut are enabled on a locked design
1413248 CONCEPT_HDL CORE Import from another TDO project makes the
block read-only
1413287 ADW LIBIMPORT Library Import converts all Attributes to
uppercase when reading CSV
1417429 ALLEGRO_EDITOR INTERACTIV Pick box only accepts 1 set of values. You
need to close the box and reopen it to draw a rectangle
1417442 ALLEGRO_EDITOR INTERACTIV Spin via stack and only part of the stack
spins
1430251 ALLEGRO_EDITOR PLACEMENT Quickplace placing symbols outside of a
polygon shaped room
1440509 ALLEGRO_EDITOR PLOTTING Ratsnest does not follow the RefDes
position when plotting the BOTTOM layer with the Mirror option
1441086 PCB_LIBRARIAN OTHER Changes made to a package with sizable pins
generated from the 'sym1' view are not saved
1443339 PCB_LIBRARIAN PTF_EDITOR ALT_SYMBOLS syntax in PTF file not checked
1444144 ALLEGRO_EDITOR DRC_CONSTR The 'add taper' command generates line to
line spacing DRC
1451766 CONCEPT_HDL COMP_BROWSER License error message should indicate which
license is required
1451977 CONCEPT_HDL PDF Origin of PDF mediabox not starting at
(0,0) when PDF page_height and page_width are set
1457138 CONCEPT_HDL CONSTRAINT_MGR devices.dml: difference in content
generated by _automodel add command and Constraint Manager launch
1458439 F2B PACKAGERXL The Packager pstprop.dat file reports false
conflicts in net properties
1464865 CONSTRAINT_MGR ANALYSIS For identical nets, topology in DE-HDL CM
is different from the topology in PCB Editor CM
1464948 PCB_LIBRARIAN VERIFICATION The errors/warnings do not match between
the various tools
1467826 CONCEPT_HDL PDF PublishPDF from console window creates a
long PDF filename
1470106 ALLEGRO_EDITOR MANUFACT silkscreen program cuts auto-silkscreen
lines excessively
1471287 CONCEPT_HDL CONSTRAINT_MGR Pages imported from other designs with
different units should inherit the source constraint units
1472046 ALLEGRO_EDITOR OTHER Gloss routine, 'Via Eliminate' - 'Eliminate
Unused Stacked Vias' is not removing unused microvias from the stack
1472414 ALLEGRO_EDITOR SCHEM_FTB netrev changes pin-shape spacing rule in
constraint region
1472444 ADW ADWSERVER Multiple errors in adwserver.out after
SPB054/ADW47
1473056 ALLEGRO_EDITOR ARTWORK Gerber export has additional phantom data
not on design
1473900 CONCEPT_HDL CORE DE-HDL stops responding when a hierarchical
block with variants defined inside the reuse block is enabled
1474020 ADW DBEDITOR Unable to modify schematic classification
when a part is checked out previously by another librarian
1474066 ADW DBEDITOR Bulk edit performance lags when parts
included have a large number of properties
1474764 ALLEGRO_EDITOR PLACEMENT In Hotfix 56, the 'place replicate create'
command does not produce desired results if a fanout is marked
1474894 ALLEGRO_EDITOR PLACEMENT Place replicate fails to include vias when
the module is applied to other circuits.
1475650 ALLEGRO_EDITOR OTHER Using Outlines - Room Outline gives WARNING
(axlRemoveNet): No match for subclass name - 'BOARD GEOMETRY/__EPB_SCRATCH_'
1476528 ORBITIO ALLEGRO_SIP_IF While translating a .mcm to OrbitIO, the
error 'allegro2orbit.exe has stopped working' is thrown
1476920 CONCEPT_HDL OTHER Genview consistently fails in some
indeterminant manner.
1477369 CONCEPT_HDL INTERFACE_DESIGN A significant number of problems are
reported when running genview with port groups
1478111 F2B DESIGNVARI Hierarchical block variant not shown in
testcase with S57 although it was working with 2015 release
1478200 GRE IFP_INTERACTIVE PCB Editor displays the 'Low on Available
Memory' error when updating shapes and then crashes
1478680 CONCEPT_HDL CORE Unable to move components in a schematic
using the arrow keys
1479135 F2B PACKAGERXL Hierarchical design reports conflicts when
signal names change through the hierarchy
1479153 CONCEPT_HDL CORE File - Save Hierarchy flags an error and
does not update subdesign xcon
1479227 CONCEPT_HDL CHECKPLUS Custom DE-HDL Rules Checker rule flagging
invalid voltage in hierarchy
1479454 CONCEPT_HDL OTHER DE-HDL issue: locked DIFF_PAIR property is
editable
1479569 PCB_LIBRARIAN OTHER hlibftb fails with error SPCOPK-1053
1479785 ORBITIO ALLEGRO_SIP_IF BRD file is not loaded in OrbitIO
1480005 ADW DBEDITOR The DBEditor or DBAdmin GUIs do not allow
the same characters in Property as LibImport CSV Files
1480367 SIG_INTEGRITY OTHER Differential pair extraction SKILL error
1480499 ALLEGRO_EDITOR PARTITION Cannot delete partition
1482544 ADW DBADMIN Hierarchical Preferred Parts List (PPL) is
not functioning correctly
1483136 ADW COMPONENT_BROWSE Error flagged when searching a property
value with parenthesis or comma in Component Browser in the ADW mode
1483617 ALLEGRO_EDITOR DATABASE Delete islands command crashes database
with filled rectangles
1484100 SIP_LAYOUT INTERACTIVE SiP crashes when copying and rotating a
symbol
1484781 CONCEPT_HDL CORE Three different Hierarchical Viewer issues
1485059 PCB_LIBRARIAN CORE Part Developer pin attributes are randomly
marked as read-only
1485931 ALLEGRO_EDITOR INTERFACES Errors generated when importing IDF in an
existing board file
1485960 CONCEPT_HDL CHECKPLUS Custom DE-HDL Rules Checker rule is
crashing the project
1486086 ALLEGRO_EDITOR ARTWORK Cannot generate artwork.
1486378 ALLEGRO_EDITOR PARTITION Unable to delete orphan partition as it is
not listed in workflow manager.
1487085 CONCEPT_HDL CONSTRAINT_MGR Import Physical with the Constraints only
option reports problems
1487125 ADW COMPONENT_BROWSE Results not displayed in Component Browser
for parts with no associated manufacturer parts
1487265 CONCEPT_HDL CORE Replace command in Windows mode shows
incorrect behavior
1487496 ADW DATAEXCHANGE DX changes checkout ownership when override
action is set to remove existing relationships
1487656 ADW LIBIMPORT Pre-analyzing a project reports false
warnings
1487733 CONSTRAINT_MGR OTHER Export Physical takes more than two hours
to update PCB Editor board
1488753 CONCEPT_HDL CORE Import sheets in a design with no change in
models: CM_VALIDATION_ON_SAVE variable is triggered
1488758 CONCEPT_HDL CONSTRAINT_MGR Disable Constraint Manager launch if
CM_VALIDATION_ON_SAVE is set and the database goes out of sync
1490299 SCM OTHER Allegro System Architect does not update
revision properly
1490744 ALLEGRO_EDITOR SKILL axlChangeLine2Cline changes line to cline
and places it on the TOP layer
1490924 F2B PACKAGERXL Save Design/Export Physical is resetting
Via constraints
1491351 ALLEGRO_EDITOR OTHER Create Detail for bond fingers on a custom
layer not working
1492013 CONCEPT_HDL CORE Stale PNN properties not cleared from
schematic on packaging design (backannotation)
1492595 ALLEGRO_EDITOR MANUFACT Dimension character substitution help is
wrong
1492703 CONCEPT_HDL OTHER 'Global Property Display' not working for
symbol edit
1492777 ORBITIO ALLEGRO_SIP_IF OrbitIO crashes on importing MCM
1492901 CONCEPT_HDL CORE Cannot instantiate a multi-sections symbol
(> 10 versions) in Design Entry HDL
1494194 CONCEPT_HDL CORE Random display of the 'PHYS_NET_NAME'
property in hierarchical designs
1497597 ALLEGRO_EDITOR DATABASE Show Element on pin shows wrong drill size
1497956 CONCEPT_HDL CORE ADW Library Flow test schematic generation
crashes DE-HDL while saving the design when using customer adw_conf_root
1498234 ALLEGRO_EDITOR ARTWORK PCB Editor fails to create artwork and no
error is listed in the log file
1499363 CONCEPT_HDL CORE Custom attributes under variant management
stopped working in Hotfix60
1500422 ALLEGRO_EDITOR SKILL SKILL function, axlTriggerSet, results in
PCB Editor crashing at launch
1500725 CONSTRAINT_MGR CONCEPT_HDL Unable to clear pstprop.dat file conflicts
1501093 SIP_LAYOUT OTHER Package design variant shows wirebonds
connected to a die which is not part of the variant
1501165 F2B DESIGNVARI TDO does not manage overlay files and
variant_roz1040660_1.ba cannot be created unless variant_merged.dat is checked out
1501294 ADW COMPONENT_BROWSE Some tabs missing after the migration to
ADW ISR 053 with SPB ISR 060
1501974 F2B PACKAGERXL 'Feedback has found Illegal pin swap(s)'
error although the pin was already swapped and fed back (B2F) to DE-HDL
1502282 ADW CONF Configuration Manager: Clicking 'Set up or
Manage Company & Site' gives an unclear message
1502782 ALLEGRO_EDITOR SCHEM_FTB Allegro System Architect (SCM) - Export
Physical stops unexpectedly without any errors or warnings
1504093 ASI_SI GUI View Topology and Waveform buttons overlap
when Signal Analysis window is resized
1504767 CONSTRAINT_MGR SCHEM_FTB Constraint Manager generates errors if the
'sNoF2BFlow' property is added to the Constraint Manager Dictionary
1506110 ALLEGRO_EDITOR DRC_CONSTR No DRC shown when a text on etch layer is
overlapped on mechanical pin
1506654 CONCEPT_HDL INTERFACE_DESIGN On moving, Netgroups break
1507497 ADW COMPONENT_BROWSE Switching rows in Component Browser does
not change the graphics of the symbol
1509184 ALLEGRO_EDITOR DATABASE BB vias in mirror have terminal pads
suppressed by artwork
1510387 FSP EXTERNAL_PORTS Break in extending a net as a deep
connection when it is targeted to multiple FPGAs connected in a daisy chain
1510570 ADW DATABASE ERROR: Cannot check in block model because
the part with instance id used in the model is not available in the database
1511180 ADW DBEDITOR Database Editor: Incorrect message about a
schematic mode displays when associating a footprint to a part number
1511397 SIP_LAYOUT TECHFILE Tech file exported from release 16.5 cannot
be reused in SiP Layout in 16.5 or 16.6
1511744 ALLEGRO_EDITOR OTHER Allegro PCB Editor removes property from
component instance
1511761 SIG_INTEGRITY OTHER Allegro PCB Editor crashes on running the
cns_show command.
1511947 ADW DSN_MIGRATION Command line arguments of the
'designmigration' command are not working
1513085 CONCEPT_HDL CORE NC symbols in the schematic are being
renamed to NC_1 in pstxnet.dat and are routed as one net in Allegro PCB Editor
1513092 ADW DBEDITOR Create Footprint Model name is not working
properly if it already exists in the local flatlib
1513737 ADW CONF DesignerServer from a different network
domain does not show distribution data
1514469 CONCEPT_HDL CORE Unable to get rid of an underscore from the
PHYS_NET_NAME property
1514942 SIP_LAYOUT CROSS_SECTION AIR no longer permitted in stackup in 17.0
1515318 PCB_LIBRARIAN IMPORT_EXPORT Import Pin Table: 'CTRL + C' and 'CTRL + V'
not working correctly
1517351 CONCEPT_HDL CORE Genview does not update an existing split
symbol
1517388 ALLEGRO_EDITOR SHAPE DRC error reported as PCB Editor fails to
read the void for a via
1518032 CONCEPT_HDL SECTION Error SPCOCN-2009 displayed even when the
user has not manually sectioned the design
1518724 PCB_LIBRARIAN PTF_EDITOR PTF Editor is not saving changes
1519040 ALLEGRO_EDITOR DATABASE Match groups are lost when a board created
in SCM is saved in Allegro PCB Designer.
1519518 CONCEPT_HDL OTHER Genview does not generate split symbols
1519623 CONCEPT_HDL CORE Differential pair added to a NetClass does
not display 'NET_PHYSICAL_TYPE' on the canvas
1519910 CONCEPT_HDL INTERFACE_DESIGN Hotfix 62: Information on manually-remapped
port groups is not saved, but reset to default
1519946 CONCEPT_HDL CORE Renaming a net leads to loss of constraints
associated with the net
1519987 ALLEGRO_EDITOR SCHEM_FTB In Hotfix 61, constraints are lost on
importing a netlist
1520207 CONCEPT_HDL CORE Genview crashes after renaming ports
1520727 CONCEPT_HDL CORE In Project Manager, the 'Design Sync -
Export Physical' command does not automatically update the schematic
1521174 SIP_LAYOUT DIE_STACK_EDITOR Padstack shapes not converted correctly to
die-stack layer using Die-stack Editor
1521871 CONSTRAINT_MGR CONCEPT_HDL Constraint Manager launched from DE-HDL
allows space in the name of layer sets
1522831 APD OTHER axlSpreadsheetSetColumnProp with
'AUTO_WIDTH' propName does not autofit the contents.
1522900 ORBITIO ALLEGRO_SIP_IF Padstack shape distortion after translation
to OrbitIO from SiP Layout design
1523237 ALLEGRO_EDITOR SKILL SKILL function axlDBGetExtents() causing
PCB Editor to crash
1523426 ALLEGRO_EDITOR DRC_CONSTR Dynamic shape not adjusted based on
keepout; DRC generated
1524875 F2B PACKAGERXL Packaging using csnetlister fails, while
manual packaging of individual blocks works fine
1525432 CONSTRAINT_MGR OTHER User-defined property not being transferred
from DE-HDL to PCB Editor
1525883 ADW DATABASE Invoking libimport on an existing DB should
verify that the 'libimp_su' variable is set correctly
1525948 F2B PACKAGERXL Reference designators assigned by the
Packager tool are not correct
1526914 ADW LIBIMPORT Cannot import to new library database
1527321 ALLEGRO_EDITOR SCHEM_FTB Unable to create netlist with the 'Open
Board in OrCAD PCB Editor' option in Hotfix 63
1528075 CONCEPT_HDL OTHER Auto Generate: DML model assignment fails
with error 'There is PHYS_DES_PREFIX property in PTF file.'
1528235 ADW DBEDITOR Running rule 'Validate Classification
Property and Property Values' results in property mismatch error
1528254 CONSTRAINT_MGR CONCEPT_HDL Import Logic with the 'Overwrite current
constraints' option is deleting some attributes
1528398 ALLEGRO_EDITOR SCHEM_FTB Netlisting of pins with NC property results
in error
1528479 ADW LRM LRM crashes when opened on a lower-level
block in a hierarchical design
1528894 ADW DBEDITOR Lack of PTF_SUBTYPE in the classification
prevents the release of the part
1529178 SIG_EXPLORER OTHER When an ECSet is created from a net, values
are not transferred correctly for PinPairs
1529209 CONCEPT_HDL CORE When adding a component symbol version, the
More option does not show all the versions
1529720 CONCEPT_HDL COPY_PROJECT Running ADW copy project does not update
the 'master.tag' file
1530445 ALLEGRO_EDITOR EDIT_ETCH PCB Editor crashes when 'Add Connect' is
used
1530707 CONCEPT_HDL CORE Request to recover a 16.6 design after DE-
HDL crashes
1531425 CONCEPT_HDL CORE DE-HDL crashing while trying to add a
NetGroup
1532865 CONCEPT_HDL CHECKPLUS Provide the ability for Rules Checker to
report a GND symbol from the standard, and not our local library, in .mkr
1533543 ADW DBEDITOR Component Browser free text search returns
2 parts when only 1 exists
1536273 CONSTRAINT_MGR CONCEPT_HDL Model-defined differential pair is removed,
and Constraint Manager Design Differences does not report an issue
1537055 CONCEPT_HDL CHECKPLUS Rules Checker - POWER_PINS value not
obtained when schematic instance has the POWER_PINS and POWER_GROUP properties
1537339 CONCEPT_HDL INTERFACE_DESIGN No warning is flagged when moving a Net
Group over a net
1537521 FLOWS PROJMGR Do not allow project creation if there are
spaces in directory or file names on the Linux platform
1539077 ALLEGRO_EDITOR SYMBOL PCB Editor crashes when choosing 'Layout -
Renumber Pins'
1539227 CONCEPT_HDL CORE Renaming a page from the hierarchy browser
crashes the schematic editor.
1539997 ALLEGRO_EDITOR SKILL PCB Editor crashes when the
axlStringRemoveSpaces() command is run
1541532 SCM SCHGEN Generate Schematics crashes with 'Out of
Memory' error
1541680 CONCEPT_HDL DOC A dot (.) or period in design name created
2 separate design folders in worklib
1542817 ALLEGRO_EDITOR DATABASE Import Netlist not getting completed on
specific board
1542949 ASDA EXPORT_PCB The Export to PCB Layout form: The file
name specified in the 'Output Layout File' field is not accepted
1543537 ASDA NEW_PROJECT While creating new projects, the new folder
name is not visible clearly in the explorer
1544060 SCM SCHGEN Generate Schematics causes Allegro System
Architect to crash
1544633 APD STREAM_IF The 'stream out' command causes Allegro
Package Designer to crash
1544698 ALLEGRO_EDITOR PLACEMENT 'place replicate' does not add clines and
vias to fanouts if fanouts are marked
1544856 ASDA CANVAS_EDIT Edit > Find places the process (UI) behind
the SDA tool.
1545136 ALLEGRO_EDITOR PLACEMENT All fanouts are marked as part of one
symbol instead of the symbols they attached with
1546062 ADW TDO-SHAREPOINT Failure to launch TDO Dashboard, need to
update error message with more useful information
1549105 APD OTHER 'Stream out' fails with message: 'Request
to terminate detected. Program aborted'
1549658 ADW TDA An unmapped network folder in the Team
Design Authoring option results in an error
1550052 ALLEGRO_EDITOR PLACEMENT PCB Editor crashes when copying symbols
1551635 CAPTURE TCL_INTERFACE GetSelectedPMItems returns error for design
cache objects
1553027 ALLEGRO_EDITOR UI_GENERAL PCB Editor canvas stops responding for
tasks such as resize and workspace switch
1555246 ADW DBEDITOR Part Copy As does not copy AML and
reliability model relations.
1555254 ADW DBEDITOR Text in Free Text search box is removed if
it loses focus
1557542 ALLEGRO_EDITOR OTHER DXF export creates strange result for
donut-shaped polygon
1573039 ALLEGRO_EDITOR INTERFACES IDX returns control to the general
interface prematurely during an incremental IDX export
1580571 ADW DBEDITOR XML files continue to appear in flatlib
even after the padstack/footprint models were released
1580580 ADW LIBDISTRIBUTION The .lis file contains references to old
models even after they were purged.
1582064 ALLEGRO_EDITOR UI_GENERAL User-defined menus not working in PCB
Editor 17.2
1582628 ADW TDA When one user takes an update of physical
object while the other user is still checking in the object, TDO crashes
1582856 PSPICE MODELEDITOR Getting 'ERROR: [S2C3471] Base part library
does not exist when Export to Part Library', though olb is created
1584719 TDA CORE Caching errors are flagged for a board-ref
project during block update
1587045 CAPTURE IMPORT/EXPORT Unable to import PDF file
1587259 ALLEGRO_EDITOR UI_GENERAL axlUIMenuFind not working correctly for the
'bottom' option
1588736 PSPICE MODELEDITOR The Model Import wizard displays 'Invalid
configuration' message when a .lib file is opened in Model Editor
1588742 PSPICE PROBE Browse icon is missing from PSpice File -
Export - text
1590006 ALLEGRO_EDITOR UI_GENERAL PCB Editor 17.2 crashes when multiple
browse windows are opened
1590597 PSPICE PROBE Problem with the adaption in the Probe
Window icons
1591264 ALLEGRO_EDITOR UI_GENERAL Film order in Visibility View is sorted
alphabetically and does not match the manufacturing artwork
1592089 PSPICE MODELEDITOR Cannot get the PSpice DMI Model DLL while
using PSpice DMI Template Code Generator
1593436 ADW DBEDITOR Cursor does not automatically move to the
model name cell when creating a new model
1594076 TDA CORE TDO crashes on concurrent check-ins when
one of the blocks was not modified.
1595987 ALLEGRO_EDITOR PLACEMENT Subclasses not getting updated in Placement
Edit mode
1596162 ASDA IMPORT_DEHDL_SHE Importing sheets from DE-HDL imports the
block as well
1597000 CONCEPT_HDL INTERFACE_DESIGN Renaming a NetGroup does not work if
several segments of the NetGroup trace have the same netnames assigned.
1597406 ALLEGRO_EDITOR SHAPE Dynamic Shape does not void the traces and
voids open areas
1597957 ALLEGRO_EDITOR PLACEMENT Quickplace: placed and unplaced counts not
getting updated
1600194 ALLEGRO_EDITOR DRC_CONSTR 'drc update' gives a different DRC count
each time the command is given in a multiple-cpu system
1600800 ALLEGRO_EDITOR GRAPHICS LINUX 17.2 operation of Update DRC is not
the same as Windows – graphics not updating
1602605 CONSTRAINT_MGR OTHER OrCAD: constraints not getting saved
1602801 SIG_INTEGRITY OTHER Dielectric Warning message when opening SiP
tool.
1603377 PSPICE ENVIRONMENT Running simulation with the 'At Markers
Only' option does not generate the .dat file
1604166 CONSTRAINT_MGR CONCEPT_HDL Audit ECSets does not work from 'Referenced
Electrical CSet' column header
1604741 ASDA CANVAS_EDIT Tcl console changes the present working
directory when you open Project Preferences and close it.
1605310 TDA CORE Join Project wizard: Random crashes in the
Team Design Authoring option
1606861 CONCEPT_HDL CORE DE-HDL crashes on Linux during the Generate
View operation
1606917 CONSTRAINT_MGR CONCEPT_HDL Importing tech file in DE-HDL Constraint
Manager is creating a duplicate 'DEFAULT' cset
1607157 ALLEGRO_EDITOR INTERACTIV Edit - Change allows lines to be copied to
Cutout subclass, but that subclass requires closed polygons
1607330 CONCEPT_HDL CORE Variant view schematic PDF corrupted with
attach_props set
1607568 ALLEGRO_EDITOR NC PCB Editor shows wrong drill legend for
Top-to-Top drill
1607986 CONCEPT_HDL SKILL cnGetSetupProjFilePath: The skill routine
does not deliver the full qualified path and name of the project in 17.2
1608524 SIP_LAYOUT MANUFACTURING The Display Pin Text tool fails in the
16.6.073 version with a parseString error.
1609400 ASDA CANVAS_EDIT The 'Assign Differential Pair' right-click
pop-up menu command should be grayed out when a single net is selected
1609809 ALLEGRO_EDITOR UI_GENERAL Crash in Allegro PCB Designer version 17.2-
2016 on Linux
1609856 ALLEGRO_EDITOR ARTWORK Embedded paste and soldermask showing up in
both top and bottom gerber files.
1609922 CONCEPT_HDL INFRA Launching Model Assignment crashes DE-HDL
when the temp/edbDump.txt is read-only
1611226 ALLEGRO_EDITOR SYMBOL PCB Editor gives a crash message while
saving a flash symbol
1612108 ALLEGRO_EDITOR OTHER Netlist Import is crashing with the .SAV
message.
1613123 ALLEGRO_EDITOR SKILL DrillType for Oval Slot should be
'OVAL_SLOT' not 'OVAL SLOT'
1614000 ADW LIBDISTRIBUTION Library distribution (lib_dist) does not
complete; lib_dist.lck cannot be deleted when Configuration Manager is running
1614667 SIG_INTEGRITY SIMULATION Different results from Probe in Allegro
Sigrity SI and SigXplorer
1615601 GRE IFP_INTERACTIVE Delete Bundle then try to delete plan lines
results in fatal error
1616235 ORBITIO ALLEGRO_SIP_IF oio2sip import does not map layers
correctly
1616540 SIP_LAYOUT DRC_CONSTRAINTS Same net DRC Line-to-Line reappearing after
dyn shape update
1616733 ALLEGRO_EDITOR INTERFACES 'genrad output' no longer working in 17.2.
Gives the Error 'extracta process failed. Command terminated'
1618751 ASDA DRC Zero Node Net errors flagged when DRC
checks are run, though RETAIN_ZERONODE_NET is set to 'NO' in Site CPM file
1618797 ADW FLOW_MGR Flow Manager cannot execute a specific
command in 17.2.
1618930 CONSTRAINT_MGR INTERACTIV Hovering over row column cell causes the
application to go into a not responding state.
1620350 ASDA EDIT_OPERATIONS Pin number is lost on updating the version
of a connector pin
1621963 ASDA SELECTION_FILTER Selection filter: Pins in the symbol used
in connectors are not selected
1622715 CONCEPT_HDL CONSTRAINT_MGR Extracting an XNet crashes DE-HDL
1625209 ASDA IMPORT_PCB File Import from PCB Editor shows board
differences

Fixed CCRs: SPB 17.2 HF003


07-28-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1423889 ALLEGRO_EDITOR EDIT_ETCH AiDT gets poor routing result
1461626 CONCEPT_HDL CREFER Cross-references shown to the same pin on
different block instances though the signal names differ
1472456 CONCEPT_HDL CORE The design connectivity (XCON) file and
design data are not in sync
1546151 CONCEPT_HDL CORE Add port, Genview, move pin on block - the
pin name disappears
1547356 ALLEGRO_EDITOR EDIT_ETCH AiDT gives different results in ISR S034
and S066
1560102 ADW FLOW_MGR Flow Manager: None of the eval commands
working
1570032 ALLEGRO_EDITOR GRAPHICS 3D Viewer shows flat LED for a specific
design
1574676 ORBITIO ALLEGRO_SIP_IF Updating the OrbitIO database with a
modified .sip file gives errors
1578876 ADW ADWSERVER Component Browser crashes when trying to
show details of a part number
1580744 F2B PACKAGERXL Running Export Physical results in error
SPCODD-114
1582863 CONCEPT_HDL CORE Generate View creates non-existent ports
1584317 CONCEPT_HDL CORE Provide an option to open pxl.log from the
Design Sync window when packaging does not complete successfully
1587018 ADW FLOW_MGR User is prompted to specify the flow name
each time the project is updated
1587157 CONCEPT_HDL CONSTRAINT_MGR pstprop.net reports conflicts on nets with
VOLTAGE properties
1587498 CONCEPT_HDL INTERFACE_DESIGN Need the ability to tap individual bus bits
1587718 ADW LIBIMPORT Library Import - The Pre-analyze tool does
not report errors
1588197 ALLEGRO_EDITOR INTERFACES STEP export fails when External copper is
selected on Windows 10
1588786 ALLEGRO_EDITOR OTHER strip_design reports 'Design has been
corrupted'
1589252 CONCEPT_HDL CORE Search results zoom into the page origin
instead of the selected components
1589318 ALLEGRO_EDITOR DRC_CONSTR Via to SMD Fit DRC reported between
embedded pin and via which do not share layers
1589979 ADW FLOW_MGR Design Name change does not reflect in Flow
Manager in the same session of a project
1590538 CONCEPT_HDL DOC Open Archive: Some observations on the
random behavior
1590639 CONCEPT_HDL OTHER Importing a design in DE-HDL results in a
crash
1590651 CONCEPT_HDL INTERFACE_DESIGN DE-HDL: Duplicate NetGroups created in
Interface Browser and Constraint Manager
1590720 ALLEGRO_EDITOR INTERFACES Exported Text Size Parameter file does not
load names into the text table
1591070 PSPICE PROBE PSpice crashes when using the Trace -
Measurements - Evaluate command
1591223 CONCEPT_HDL CORE Variant information for lower-level
schematic not displayed
1594240 CONCEPT_HDL ARCHIVER Archiver is not able to change the
permissions of the cells archived
1594416 ALLEGRO_EDITOR PAD_EDITOR Padstack Editor crashes when you create a
new pad
1596615 ADW DBEDITOR Unable to search parts: Component Browser
did not launch; Database Editor did not return search results
1596780 ALLEGRO_EDITOR SKILL PCB Editor crashes after doing SRM update
and save
1597153 F2B DESIGNVARI ERROR SPCODD-53 in Variant Editor
1597385 F2B DESIGNVARI Some 16.5 variant DNI parts appear in 16.6
as X-OUT and some without X-OUT or DNI
1598629 F2B PACKAGERXL Export Physical crashes after flagging
error SPCOPK-1458
1599452 ALLEGRO_EDITOR ARTWORK Import Artwork with Mirror option does not
import pins or shapes
1599744 ADW FLOW_MGR Flow Manager: Commands associated with some
of the buttons not working
1599950 SCM OTHER Adding the GND net to parts/pins takes a
long time.
1600226 RF_PCB AUTO_PLACE Fail to auto-place RF group
1600618 ALLEGRO_EDITOR DRC_CONSTR Casing of property names is affecting
results when working with Physical Constraint Set
1600914 ALLEGRO_EDITOR INTERFACES Exported PDF has unfilled shapes despite
enabling the 'Filled Shapes' option
1601165 ALLEGRO_EDITOR DATABASE Thermal Relief is not added for Rounded
Rectangle pad
1601281 ALLEGRO_EDITOR OTHER STEP model link gets corrupted with SKILL
axlLoadSymbol
1601282 ALLEGRO_EDITOR OTHER Export Libraries will not export device
files when there is a space in the folder name.
1602514 PCB_LIBRARIAN METADATA References to some primitives missing in
block metadata;TDA errors reported for missing parts after joining a project
1602823 SIP_LAYOUT WIREBOND SiP crashes when using the Add Wire command
1602955 ALLEGRO_EDITOR SHAPE Shape to Route Keepout DRC not reported for
attached database
1604223 CONCEPT_HDL CORE Tool stops responding after error SPCOCD-
553: Connectivity Server Error
1604746 ALLEGRO_EDITOR OTHER In 17.2, layer data is getting changed when
importing extracta files into other thirty-party extraction tools
1605322 ALLEGRO_EDITOR TECHFILE Generating tech file in 17.2 takes much
longer as compared to 16.6

Fixed CCRs: SPB 17.2 HF002


06-31-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1452838 CONCEPT_HDL CORE Apparent discrepancy between Bus names and
other nets
1469146 ADW LRM Packaging error reported after updating the
design using LRM
1481802 ORBITIO ALLEGRO_SIP_IF Import of an OrbitIO file to an existing
SiP file offsets the results incorrectly
1518957 APD SHAPE Shape void result incorrect
1519155 ALLEGRO_EDITOR OTHER IPC-2581-B Negative Plane Error
1524947 SIG_INTEGRITY SIGNOISE Custom Stimulus is not recognized correctly
in Allegro Sigrity SI or PCB SI.
1532162 CONCEPT_HDL CORE The Rename Signal command does not update
split symbols.
1543997 CONSTRAINT_MGR OTHER Import Logic is overwriting the constraints
in the attached design.
1544675 ALLEGRO_EDITOR OTHER Export Libraries corrupts symbols if paths
do not include the current directory (.)
1549097 CONSTRAINT_MGR XNET_DIFFPAIR Show warning message if differential pairs
are created for nets with voltage properties
1551934 ALLEGRO_EDITOR SKILL axlBackDrill command is not analyzing new
layer set when application mode is set to 'None'
1554919 ADW LRM LRM does not find PTF data for cell 'res'
in the reference library
1555009 CONCEPT_HDL INTERFACE_DESIGN Unable to rename a NetGroup.
1559136 ALLEGRO_EDITOR EDIT_ETCH Cannot connect floating clines to vias with
nets
1559552 SIP_LAYOUT ORBITIO_IF device offset in oio2sip translation
1560301 CONCEPT_HDL CORE DE-HDL hangs when Edit menu commands are
called on Linux if xclip is open
1560804 ALLEGRO_EDITOR OTHER Film records order gets reversed when using
File - Import - Parameters after File - Export - Parameters
1561501 ORBITIO OTHER OrbitIO stops responding when refreshing a
design in SiP Layout
1564036 CONCEPT_HDL CORE User-defined custom variables are not
getting populated in the TOC
1564545 CONCEPT_HDL OTHER Signal model property deleted from an
instance is not deleted from the instance pins
1564552 CONCEPT_HDL CORE Find Net should zoom to the nets on
schematic canvas
1566119 CONCEPT_HDL CORE Right-clicking the schematic to add a
component does not show all the schematic symbol versions
1566848 ALLEGRO_EDITOR ARTWORK Board Outline artwork is incomplete
1566942 ASDA MISCELLANEOUS Several extra files in the /tmp/ folder on
Linux
1567290 ALLEGRO_EDITOR MANUFACT Import Artwork fails to import a shape.
1567587 ALLEGRO_EDITOR MANUFACT Extended tool name in header of drill file
is not correct
1569056 CONCEPT_HDL CORE Opening the same drawing in multiple
cascading windows view displays non-existent artifacts
1569087 ALLEGRO_EDITOR DRC_CONSTR Running DRC Update gives the message
'Figure outside of drawing extents. Cannot continue.'
1569147 CONCEPT_HDL CORE The signal name auto-complete drop-down
list is not displayed correctly
1569394 ALLEGRO_EDITOR SKILL axlPadSuppressSet( 'on 1 '(via)) not
working on SPB17.2
1569924 CONCEPT_HDL CHECKPLUS Checking in a large BGA into ADW results in
an error related to negative signals
1570398 SIP_LAYOUT DATABASE Diestack layers cannot be deleted if there
are unplaced symbols in the design
1570419 CONSTRAINT_MGR CONCEPT_HDL Need to add a customized worksheet custom
property weblink in Constraint Manager
1570624 APD ARTWORK Artwork file has missing voids on a layer
and is causing a short
1570678 F2B DESIGNVARI Variant Editor: Error when adding an RSTATE
property
1571113 CONSTRAINT_MGR DATABASE Reports generated from cmDiffUtility show
the differences in mm units only
1572593 ALLEGRO_EDITOR ARTWORK ARTWORK: 'Draw holes only' option does not
match display
1573127 CONCEPT_HDL COPY_PROJECT The CopyProject functionality creates an
incorrect 'view_pcb' directive value
1573205 CONCEPT_HDL CORE dsreportgen is unable to resolve the
physical net names (PHYSNET)
1573625 CAPTURE PROJECT_MANAGER Toolbar customization is reset when Capture
is re-invoked in SPB 17.2
1573755 ALLEGRO_EDITOR CROSS_SECTION Changing a layer's type is also changing
its material in Cross Section Editor
1573970 CONCEPT_HDL ARCHIVER archcore fails to archive the project
CPM.arch file
1574381 CONCEPT_HDL OTHER Packager crashes on repackaging a design
with RefDes related advanced settings
1576100 ALLEGRO_EDITOR SYMBOL Update symbol crashes, creates '.sav' file,
but shows update was successful in 'refresh.log'
1577381 CONCEPT_HDL CORE ERROR(SPCOCN-2128): The NetGroup structure
does not match the PortGroup structure
1580103 ALLEGRO_EDITOR DATABASE dbstat of 16.6 does not recognize 17.X
files
1580891 SCM REPORTS Dsreportgen crashes in different scenarios
1581254 SIP_LAYOUT CROSS_SECTION Cross Section Editor crashes when adding a
layer
1584957 ADW FLOW_MGR 17.2 Flow Manager, JavaScript - Tool Launch
Error
1588823 ADW FLOW_MGR Flow Manager: In 17.2, using back slashes
in the UNC path results in problems in working with the tool
1590064 ADW LRM Allegro EDM Flow Manager - An empty LRM
dialog opens on design load in 17.2

Fixed CCRs: SPB 17.2 HF001


05-06-2016
===================================================================================
================================================
CCRID PRODUCT PRODUCTLEVEL2 TITLE
===================================================================================
================================================
1272355 F2B DESIGNVARI Property changes on replaced component
shows incorrect result in BOM output
1482953 ALLEGRO_EDITOR DATABASE Part change disassociates parts from Group
1484075 ALLEGRO_EDITOR PADS_IN 'pads_in' imports ASSEMBLY_TOP and
PLACE_BOUND_TOP outlines that are defined as shapes as lines
1488909 ALLEGRO_EDITOR DRC_CONSTR Test Via causes net scheduling verification
to fail
1498389 SIP_LAYOUT DIE_GENERATOR Provide the ability in the 'die in' command
to specify flip chip as a DIE symbol
1499515 ADW COMPONENT_BROWSE The Search Criteria property value is
automatically being set in the ADW Component Browser
1506672 ALLEGRO_EDITOR INTERACTIV In the attached board file, when using
Replicate Place, some shapes are missing from some layers
1522411 FLOWS PROJMGR License selection should persist on
invoking Layout from Project Manager
1523532 F2B PACKAGERXL Adding subdesign names in the 'Use
subdesign' or 'Force subdesign' sections hangs for more than a minute
1525783 CONCEPT_HDL CORE '\BASE' scope does not work for SYNONYMed
global signals
1526729 SPIF OTHER Exporting a dsn file causes PCB Editor to
crash in the interactive and batch modes
1529846 ALLEGRO_EDITOR SHAPE Some shapes are not generated in the
artwork
1537499 CONCEPT_HDL CORE Adding the same version (already placed)
with the same split block name should not be allowed
1541589 ALLEGRO_EDITOR INTERFACES STEP model incorrectly shown in 3D viewer.
Shows pins as angled.
1542334 CONCEPT_HDL CREFER creferhdl leaving lock files in sch_1
folder
1542722 ALLEGRO_EDITOR INTERFACES IDX export: RefDes and PART_NUMBER missing
for mechanical symbols
1543410 ADW LRM LRM shows confusing part status; reports
that update is needed but clicking update does not work
1544614 ALLEGRO_EDITOR SKILL Associative dimension data reaches the
'psm' file despite deleting the layer on which it was set in the 'dra' file
1545370 APD OTHER Pads in .mdd file getting placed on
different layers as compared to the design
1545909 ALLEGRO_EDITOR UI_FORMS Show 'microvia' checkbox in 'Blind/Buried
Vias' form only with the 'Allegro_PCB_Mini' license
1546141 ALLEGRO_EDITOR SHAPE Shapes missing from Artwork
1546877 CONCEPT_HDL CORE Align Left on wires fails with incorrect
error message
1547224 CONCEPT_HDL CORE Lock the 'PATH' property once it is
assigned by system
1547584 SIP_LAYOUT OTHER SiP - Design Variant: Delete embedded layer
if not selected
1548116 CONCEPT_HDL CORE Some versions of Technology Independent
Library do not appear when adding a symbol
1548151 ALLEGRO_EDITOR INTERFACES Exporting a step file gives a component
rotation mismatch in the *.stp file
1548421 F2B BOM Parts with same 'BOM_IGNORE' set do not
behave the same way in the BOM report
1548978 ALLEGRO_EDITOR MANUFACT Shape not voiding clines
1549662 ALLEGRO_EDITOR OTHER Import Parameters Path fails if parampath
does not have the current directory (.) set
1549836 CONCEPT_HDL CORE Tools - Customize - Keys - Reset does not
reset keyboard shortcuts
1550941 PCB_LIBRARIAN PTF_EDITOR PDV Part Table Editor new column sorting
causing problems
1551713 ALLEGRO_EDITOR DRC_CONSTR Hole to Hole DRC between via and pin not
shown
1553950 ALLEGRO_EDITOR SKILL Executing axlUIControl(pixel2UserUnits)
crashes PCB Editor
1554333 CONCEPT_HDL CORE Changed connectivity error when aligning
ports attached to NetGroups
1555092 SIP_LAYOUT DEGASSING Degas offset is not working with hexagons
1556261 ALLEGRO_EDITOR DATABASE DBDoctor crashes with the error 'Illegal
database pointer encountered, Exiting DBDOCTOR.'
1557716 APD OTHER Stream out fails with request to terminate
detected - Program aborted
1559951 SIP_LAYOUT SYMB_EDIT_APPMOD Wrong bump locations after Symbol Editor -
Refresh co-design die
1560197 CONCEPT_HDL CORE BOM-HDL adds extra characters to
subdesign_suffix when generating hierarchical BOM
1561077 ALLEGRO_EDITOR INTERFACES Beta - IDX User Layer export fails on Linux
1562537 ALLEGRO_EDITOR MENTOR Using mbs2brd in 16.6 gives a fatal error
1564203 ALLEGRO_EDITOR ARTWORK Cannot generate negative artwork

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