Interfacing a Hard Disk Drive to an AT91RM9200

Microcontroller

AT91 ARM®
1. Scope
Thumb®
This Application Note describes the AT91RM9200 hardware and software interface
for a hard disk drive. The AT91RM9200 embeds a CompactFlash® Glue Logic that Microcontrollers
can be adapted to support such a peripheral.

1.1 Reference Documents

Application Note
The following table gives the references of the documents and their denominations in
this Application Note.

Table 1-1. Reference Document Table

Owner - Reference Denomination
Atmel Literature Number 1768 AT91RM9200 Datasheet
AT Attachment Interface Document, American National Standards
Institute, X3.221-1994

6023B–ATARM–06-Jan-06

1
2. Hardware Interface

2.1 External Bus Interface Signals

The External Bus Interface integrates circuitry to interface with CompactFlash devices using
Attribute, Memory and I/O modes. Most of these signals can be used to connect a hard disk
drive to the AT91RM9200.
Note: For a full description of external bus interface signals, refer to the EBI Programmer Datasheet.
This document only contains information relevant to accessing a hard disk drive.
Note: The External Bus Interface does not allow DMA accesses.

Table 2-1. EBI Signals for HDD Support

EBI Name HDD Name Function Type Active Level
CFIOR _IOR HDD I/O Read Signal Output Low
CFIOW _IOW HDD I/O Write Signal Output Low
CFRNW HDD Read Not Write Output
CFCS HDD Chip select Output Low
A0-A2 A0-A2 Address Bus Output
D0-D15 D0-D15 Data Bus Input/Output
NWAIT IORDY HDD Ready Signal Input High

2.2 Other AT91RM9200 Signals

In addition to the External Bus interface signal, the hard disk drive requires the signals shown
in Table 2-2.

Table 2-2. Other AT91RM9200 Signals for HDD Support

AT91RM9200
Name HDD Name Function Type Active Level
PC11-PC12 _CS0-_CS1 HDD Chip Select Output Low
(1)
PC5 _RESET HDD Reset Output Low

Note: 1. Or any free PIO.

Other HDD signals are not handled by the AT91RM9200 microcontroller.

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 Application Note
2.3 HDD Application Example

Figure 2-1. HDD Application Example

AT91RM9200 IDE Connector

D[15:0] D[15:0]

DIR /OE

A25/CFRNW
CSEL
NCS4/CFCS

/OE
A[2:0] A[2:0]

NWR1/CFIOR _IORD

NWR3/CFIOW _IOWR

PC11 _CS0

PC12 _CS1

PC6/NWAIT IORDY

PC5 _RESET

3
6023B–ATARM–06-Jan-06
3. Software Interface

3.1 External Bus Interface Signal Handling

The EBI CompactFlash Glue Logic integrates a fourth memory space that can be accessed
through NCS4 (i.e., between 0x5000 0000 and 0x5FFF FFFF).
This memory space, True IDE Mode Space, is intended to access CompactFlash in True IDE
Mode (Hard Disk Drive, so).

Table 3-1. Address Map

True IDE Mode Space
Offset 0x00C0 0000
I/O Mode Space
Offset 0x0080 0000
Common Memory Mode Space
Offset 0x0040 0000
Attribute Memory Mode Space
Offset 0x0000 0000

To use the CompactFlash Glue Logic feature, the following PIOs must be set as peripherals:
– PC6 that enables NWAIT
– PC7 that enables A23
– PC9 that enables A25_CFRNW
– PC10 that enables NCS4_CFCS
Moreover, the CompactFlash Glue Logic must be activated via the Chip Select 4 Assignment
Field in the EBI User Interface.

3.2 Handling Other AT91RM9200 Signals

In Attribute, Memory and I/O modes, PC11 - PC12 signals that are connected to CS0 - CS1
HDD signals are used by the EBI to manage CFCE1 - CFCE2 to enable upper-byte and lower-
byte access on the data bus of the CompactFlash.
As this behavior is not compatible with IDE accesses, these signals must be configured as
PIOs, i.e., PC11 and PC12.
PC11 and PC12 levels must be set by software before the access to the HDD.

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6023B–ATARM–06-Jan-06
 Application Note
Data Bus Width must be set depending on the access needed. See Table 3-2.

Table 3-2. Signals Depending on Access Type

Access PC11 PC12 Offset D[15:8] D[7:0] SMC_CSR4 (DBW)
Byte R/W Task File Register Access 0 1 1 - 7h Don’t Care/High Z Odd/Even Byte 8-bit
Half-word R/W Task File Data
0 1 0h Odd Byte Even Byte 16-bit
Register Access
Byte W Control Register
Byte R Alt Status Register 1 0 6 - 7h Don’t Care/High Z Odd/Even Byte 8-bit
Byte R/W Drive Access Register

3.3 Timings
The SMC2_CSR4 Chip Select is to be programmed depending on the HDD timing accesses.
Typical values are listed in Table 3-3.

Table 3-3. Timing Parameter Values

Parameter Value
NWS 10
TDF 0
RWS 5
RWH 3

3.4 Software Example

An example HDD driver describing signal management with the AT91 software package can
be downloaded from the Atmel web site http://www.atmel.com.

4. Warranty
All delivered sources are free of charge and can be copied or modified without authorization.
The software is delivered "AS IS" without warranty or condition of any kind, either express,
implied or statutory. This includes without limitation any warranty or condition with respect to
merchantability or fitness for any particular purpose, or against the infringements of intellectual
property rights of others.

5
6023B–ATARM–06-Jan-06
5. Revision History
Table 5-1. Revision History
Document Ref. Comments Change Request
6023A First issue.
6023B Updated referenced documents in Table 1-1, “Reference Document Table,” on page 1. 04-312

6 Application Note
6023B–ATARM–06-Jan-06
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