LM13600 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

May 1998

LM13600
Dual Operational Transconductance Amplifiers with
Linearizing Diodes and Buffers
General Description n Excellent matching between amplifiers
n Linearizing diodes
The LM13600 series consists of two current controlled
n Controlled impedance buffers
transconductance amplifiers each with differential inputs and
a push-pull output. The two amplifiers share common sup- n High output signal-to-noise ratio
plies but otherwise operate independently. Linearizing di-
odes are provided at the inputs to reduce distortion and allow Applications
higher input levels. The result is a 10 dB signal-to-noise im- n Current-controlled amplifiers
provement referenced to 0.5 percent THD. Controlled im- n Current-controlled impedances
pedance buffers which are especially designed to comple-
n Current-controlled filters
ment the dynamic range of the amplifiers are provided.
n Current-controlled oscillators
n Multiplexers
Features n Timers
n gm adjustable over 6 decades n Sample and hold circuits
n Excellent gm linearity

Connection Diagram
Dual-In-Line and Small Outline Packages

DS007980-2

Top View
Order Number LM13600M, LM13600N or LM13600AN
See NS Package Number M16A or N16A

© 1999 National Semiconductor Corporation DS007980 www.national.com

 Absolute Maximum Ratings (Note 1) Operating Temperature Range 0˚C to +70˚C
If Military/Aerospace specified devices are required, DC Input Voltage +VS to −VS
please contact the National Semiconductor Sales Office/ Storage Temperature Range −65˚C to +150˚C
Distributors for availability and specifications. Soldering Information
Supply Voltage (Note 2) Dual-In-Line Package
LM13600 36 VDC or ± 18V Soldering (10 seconds) 260˚C
LM13600A 44 VDC or ± 22V Small Outline Package
Power Dissipation (Note 3) TA = 25˚C 570 mW Vapor Phase (60 seconds) 215˚C
Differential Input Voltage ± 5V Infrared (15 seconds) 220˚C
Diode Bias Current (ID) 2 mA See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
Amplifier Bias Current (IABC) 2 mA surface mount devices.
Output Short Circuit Duration Continuous
Buffer Output Current (Note 4) 20 mA

Electrical Characteristics (Note 5)

Parameter Conditions LM13600 LM13600A Units
Min Typ Max Min Typ Max
Input Offset Voltage (VOS) 0.4 4 0.4 1 mV
Over Specified Temperature Range 2 mV
IABC = 5 µA 0.3 4 0.3 1 mV
VOS Including Diodes Diode Bias Current (ID) = 500 µA 0.5 5 0.5 2 mV
Input Offset Change 5 µA ≤ IABC ≤ 500 µA 0.1 3 0.1 1 mV
Input Offset Current 0.1 0.6 0.1 0.6 µA
Input Bias Current 0.4 5 0.4 5 µA
Over Specified Temperature Range 1 8 1 7 µA
Forward
Transconductance (gm) 6700 9600 13000 7700 9600 12000 µmho
Over Specified Temperature Range 5400 4000 µmho
gm Tracking 0.3 0.3 dB
Peak Output Current RL = 0, IABC = 5 µA 5 3 5 7 µA
RL = 0, IABC = 500 µA 350 500 650 350 500 650 µA
RL = 0, Over Specified Temp 300 300 µA
Range
Peak Output Voltage
Positive RL = ∞, 5 µA ≤ IABC ≤ 500 µA +12 +14.2 +12 +14.2 V
Negative RL = ∞, 5 µA ≤ IABC ≤ 500 µA −12 −14.4 −12 −14.4 V
Supply Current IABC = 500 µA, Both Channels 2.6 2.6 mA
VOS Sensitivity
Positive ∆ VOS/∆V+ 20 150 20 150 µV/V
Negative ∆ VOS/∆V− 20 150 20 150 µV/V
CMRR 80 110 80 110 dB
Common Mode Range ± 12 ± 13.5 ± 12 ± 13.5 V
Crosstalk Referred to Input (Note 6) 100 100 dB
20 Hz < f < 20 kHz
Differential Input Current IABC = 0, Input = ± 4V 0.02 100 0.02 10 nA
Leakage Current IABC = 0 (Refer to Test Circuit) 0.2 100 0.2 5 nA
Input Resistance 10 26 10 26 kΩ
Open Loop Bandwidth 2 2 MHz
Slew Rate Unity Gain Compensated 50 50 V/µs
Buffer Input Current (Note 6), Except IABC = 0 µA 0.2 0.4 0.2 0.4 µA
Peak Buffer Output Voltage (Note 6) 10 10 V

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Electrical Characteristics (Note 5) (Continued)
Note 1: “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits.
Note 2: For selections to a supply voltage above ± 22V, contact factory.
Note 3: For operating at high temperatures, the device must be derated based on a 150˚C maximum junction temperature and a thermal resistance of 175˚C/W
which applies for the device soldered in a printed circuit board, operating in still air.
Note 4: Buffer output current should be limited so as to not exceed package dissipation.
Note 5: These specifications apply for VS = ± 15V, TA = 25˚C, amplifier bias current (IABC) = 500 µA, pins 2 and 15 open unless otherwise specified. The inputs to
the buffers are grounded and outputs are open.
Note 6: These specifications apply for VS = ± 15V, IABC = 500 µA, ROUT = 5 kΩ connected from the buffer output to −VS and the input of the buffer is connected
to the transconductance amplifier output.

Schematic Diagram
One Operational Transconductance Amplifier

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Typical Performance Characteristics

Input Offset Voltage Input Offset Current Input Bias Current

DS007980-39 DS007980-40 DS007980-41

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 Typical Performance Characteristics (Continued)

Peak Output Current Peak Output Voltage and Leakage Current

Common Mode Range

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Input Leakage Transconductance Input Resistance

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Amplifier Bias Voltage vs Input and Output Capacitance Output Resistance

Amplifier Bias Current

DS007980-49 DS007980-50
DS007980-48

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Typical Performance Characteristics (Continued)

Distortion vs Differential Voltage vs Amplifier Bias Current Output Noise vs Frequency

Input Voltage

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Unity Gain Follower

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Leakage Current Test Circuit Differential Input Current Test Circuit

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 Circuit Description
The differential transistor pair Q4 and Q5 form a transcon-
ductance stage in that the ratio of their collector currents is (5)
defined by the differential input voltage according to the The term in brackets is then the transconductance of the am-
transfer function: plifier and is proportional to IABC.

Linearizing Diodes
(1) For differential voltages greater than a few millivolts, Equa-
where VIN is the differential input voltage, kT/q is approxi- tion (3) becomes less valid and the transconductance be-
mately 26 mV at 25˚C and I5 and I4 are the collector currents comes increasingly nonlinear. Figure 1 demonstrates how
of transistors Q5 and Q4 respectively. With the exception of the internal diodes can linearize the transfer function of the
Q3 and Q13, all transistors and diodes are identical in size. amplifier. For convenience assume the diodes are biased
Transistors Q1 and Q2 with Diode D1 form a current mirror with current sources and the input signal is in the form of cur-
which forces the sum of currents I4 and I5 to equal IABC; rent IS. Since the sum of I4 and I5 is IABC and the difference
is IOUT, currents I4 and I5 can be written as follows:
I4 + I5 = IABC (2)
where IABC is the amplifier bias current applied to the gain
pin.
For small differential input voltages the ratio of I4 and I5 ap-
proaches unity and the Taylor series of the In function can be Since the diodes and the input transistors have identical ge-
approximated as: ometries and are subject to similar voltages and tempera-
tures, the following is true:

(3)

(4) (6)
Collector currents I4 and I5 are not very useful by themselves
and it is necessary to subtract one current from the other.
The remaining transistors and diodes form three current mir-
rors that produce an output current equal to I5 minus I4 thus:

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FIGURE 1. Linearizing Diodes

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Linearizing Diodes (Continued) Applications-Voltage Controlled
Notice that in deriving Equation 6 no approximations have Amplifiers
been made and there are no temperature-dependent terms. Figure 2 shows how the linearizing diodes can be used in a
The limitations are that the signal current not exceed ID/2 voltage-controlled amplifier. To understand the input biasing,
and that the diodes be biased with currents. In practice, re- it is best to consider the 13 kΩ resistor as a current source
placing the current sources with resistors will generate insig- and use a Thevenin equivalent circuit as shown in Figure 3.
nificant errors. This circuit is similar to Figure 1 and operates the same. The
potentiometer in Figure 2 is adjusted to minimize the effects
Controlled Impedance Buffers of the control signal at the output.
The upper limit of transconductance is defined by the maxi- For optimum signal-to-noise performance, IABC should be as
mum value of IABC (2 mA). The lowest value of IABC for which large as possible as shown by the Output Voltage vs. Ampli-
the amplifier will function therefore determines the overall fier Bias Current graph. Larger amplitudes of input signal
dynamic range. At very low values of IABC, a buffer which has also improve the S/N ratio. The linearizing diodes help here
very low input bias current is desirable. An FET follower sat- by allowing larger input signals for the same output distortion
isfies the low input current requirement, but is somewhat as shown by the Distortion vs. Differential Input Voltage
non-linear for large voltage swing. The controlled impedance graph. S/N may be optimized by adjusting the magnitude of
buffer is a Darlington which modifies its input bias current to the input signal via RIN (Figure 2) until the output distortion is
suit the need. For low values of IABC, the buffer’s input cur- below some desired level. The output voltage swing can
rent is minimal. At higher levels of IABC, transistor Q3biases then be set at any level by selecting RL.
up Q12 with a current proportional to IABC for fast slew rate. Although the noise contribution of the linearizing diodes is
When IABC is changed, the DC level of the Darlington output negligible relative to the contribution of the amplifier’s inter-
buffer will shift. In audio applications where IABC is changed nal transistors, ID should be as large as possible. This mini-
suddenly, this shift may produce an audible “pop”. For these mizes the dynamic junction resistance of the diodes (re) and
applications the LM13700 may produce superior results. maximizes their linearizing action when balanced against
RIN. A value of 1 mA is recommended for ID unless the spe-
cific application demands otherwise.

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FIGURE 2. Voltage Controlled Amplifier

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 Applications-Voltage Controlled Amplifiers (Continued)

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FIGURE 3. Equivalent VCA Input Circuit

Stereo Volume Control If VC is derived from a second signal source then the circuit
becomes an amplitude modulator or two-quadrant multiplier
The circuit of Figure 4 uses the excellent matching of the two as shown in Figure 5, where:
LM13600 amplifiers to provide a Stereo Volume Control with
a typical channel-to-channel gain tracking of 0.3 dB. RP is
provided to minimize the output offset voltage and may be
replaced with two 510Ω resistors in AC-coupled applications.
For the component values given, amplifier gain is derived for
Figure 2 as being:

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FIGURE 4. Stereo Volume Control

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Stereo Volume Control (Continued)

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FIGURE 5. Amplitude Modulator

The constant term in the above equation may be cancelled Figure 8. A signal voltage applied at RX generates a VIN to
by feeding IS x IDRC/2 (V− + 1.4V) into IO. The circuit of Fig- the LM13600 which is then multiplied by the gm of the ampli-
ure 6 adds RM to provide this current, resulting in a fier to produce an output current, thus:
four-quadrant multiplier where RC is trimmed such that VO =
0V for VIN2 = 0V. RM also serves as the load resistor for IO.
Noting that the gain of the LM13600 amplifier of Figure 3
may be controlled by varying the linearizing diode current ID
as well as by varying IABC, Figure 7 shows an AGC Amplifier where gm ≈ 19.2 IABC at 25˚C. Note that the attenuation of
using this approach. As VO reaches a high enough amplitude VO by R and RA is necessary to maintain VIN within the linear
(3 VBE) to turn on the Darlington transistors and the lineariz- range of the LM13600 input.
ing diodes, the increase in ID reduces the amplifier gain so Figure 9 shows a similar VCR where the linearizing diodes
as to hold VO at that level. are added, essentially improving the noise performance of
the resistor. A floating VCR is shown in Figure 10, where
Voltage Controlled Resistors each “end” of the “resistor” may be at any voltage within the
An Operational Transconductance Amplifier (OTA) may be output voltage range of the LM13600.
used to implement a Voltage Controlled Resistor as shown in

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FIGURE 6. Four-Quadrant Multiplier

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 Voltage Controlled Resistors (Continued)

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FIGURE 7. AGC Amplifier

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FIGURE 8. Voltage Controlled Resistor, Single-Ended

Voltage Controlled Filters gm is again 19.2 x IABC at room temperature. Figure 12

shows a VC High-Pass Filter which operates in much the
OTA’s are extremely useful for implementing voltage con- same manner, providing a single RC roll-off below the de-
trolled filters, with the LM13600 having the advantage that fined cut-off frequency.
the required buffers are included on the I.C. The VC Lo-Pass
Additional amplifiers may be used to implement higher order
Filter of Figure 11 performs as a unity-gain buffer amplifier at
filters as demonstrated by the two-pole Butterworth Lo-Pass
frequencies below cut-off, with the cut-off frequency being
Filter of Figure 13 and the state variable filter of Figure 14.
the point at which XC/gm equals the closed-loop gain of
Due to the excellent gm tracking of the two amplifiers and the
(R/RA). At frequencies above cut-off the circuit provides a
varied bias of the buffer Darlingtons, these filters perform
single RC roll-off (6 dB per octave) of the input signal ampli-
well over several decades of frequency.
tude with a −3 dB point defined by the given equation, where

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Voltage Controlled Filters (Continued)

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FIGURE 9. Voltage Controlled Resistor with Linearizing Diodes

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FIGURE 10. Floating Voltage Controlled Resistor

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FIGURE 11. Voltage Controlled Low-Pass Filter

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 Voltage Controlled Filters (Continued)

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FIGURE 12. Voltage Controlled Hi-Pass Filter

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FIGURE 13. Voltage Controlled 2-Pole Butterworth Lo-Pass Filter

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Voltage Controlled Filters (Continued)

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FIGURE 14. Voltage Controlled State Variable Filter

Voltage Controlled Oscillators The VC Lo-Pass Filter of Figure 11 may be used to produce
a high-quality sinusoidal VCO. The circuit of Figure 16 em-
The classic Triangular/Square Wave VCO of Figure 15 is ploys two LM13600 packages, with three of the amplifiers
one of a variety of Voltage Controlled Oscillators which may configured as lo-pass filters and the fourth as a limiter/
be built utilizing the LM13600. With the component values inverter. The circuit oscillates at the frequency at which the
shown, this oscillator provides signals from 200 kHz to below loop phase-shift is 360˚ or 180˚ for the inverter and 60˚ per
2 Hz as IC is varied from 1 mA to 10 nA. The output ampli- filter stage. This VCO operates from 5 Hz to 50 kHz with less
tudes are set by IA x RA. Note that the peak differential input than 1% THD.
voltage must be less than 5V to prevent zenering the inputs.
A few modifications to this circuit produce the ramp/pulse
VCO of Figure 16. When VO2 is high, IF is added to IC to in-
crease amplifier A1’s bias current and thus to increase the
charging rate of capacitor C. When VO2 is low, IF goes to
zero and the capacitor discharge current is set by IC.

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 Voltage Controlled Oscillators (Continued)

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FIGURE 15. Triangular/Square-Wave VCO

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FIGURE 16. Ramp/Pulse VCO

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Voltage Controlled Oscillators (Continued)

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FIGURE 17. Sinusoidal VCO

when the amplifier output switches low. A special feature of
this timer is that the other amplifier, when biased from VO,
can perform another function and draw zero stand-by power
as well.
The operation of the multiplexer of Figure 20 is very straight-
forward. When A1 is turned on it holds VO equal to VIN1 and
when A2 is supplied with bias current then it controls VO. CC
and RC serve to stabilize the unity-gain configuration of am-
plifiers A1 and A2. The maximum clock rate is limited to
about 200 kHz by the LM13600 slew rate into 150 pF when
the (VIN1-VIN2) differential is at its maximum allowable value
of 5V.
The Phase-Locked Loop of Figure 21 uses the four-quadrant
multiplier of Figure 6 and the VCO of Figure 18 to produce a
DS007980-25
PLL with a ± 5% hold-in range and an input sensitivity of
FIGURE 18. Single Amplifier VCO about 300 mV.

Figure 18 shows how to build a VCO using one amplifier

when the other amplifier is needed for another function.

Additional Applications
Figure 19 presents an interesting one-shot which draws no
power supply current until it is triggered. A positive-going trig-
ger pulse of at least 2V amplitude turns on the amplifier
through RB and pulls the non-inverting input high. The ampli-
fier regenerates and latches its output high until capacitor C
charges to the voltage level on the non-inverting input. The
output then switches low, turning off the amplifier and dis-
charging the capacitor. The capacitor discharge rate is in-
creased by shorting the diode bias pin to the inverting input DS007980-26

so that an additional discharge current flows through DI FIGURE 19. Zero Stand-By Power Timer

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 Additional Applications (Continued)

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FIGURE 20. Multiplexer

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FIGURE 21. Phase Lock Loop

The Schmitt Trigger of Figure 22 uses the amplifier output The Peak Detector of Figure 24 uses A2 to turn on A1 when-
current into R to set the hysteresis of the comparator; thus ever VIN becomes more positive than VO. A1 then charges
VH = 2 x R x IB. Varying IB will produce a Schmitt Trigger with storage capacitor C to hold VO equal to VINPK. One precau-
variable hysteresis. tion to observe when using this circuit: the Darlington transis-
Figure 23 shows a Tachometer or Frequency-to-Voltage con- tor used must be on the same side of the package as A2
verter. Whenever A1 is toggled by a positive-going input, an since the A1 Darlington will be turned on and off with A1.
amount of charge equal to (VH−VL) Ct is sourced into Cf and Pulling the output of A2 low through D1 serves to turn off A1
Rt. This once-per-cycle charge is then balanced by the cur- so that VO remains constant.
rent of VO/Rt. The maximum fIN is limited by the amount of
time required to charge Ct from VL to VH with a current of IB,
where VL and VH represent the maximum low and maximum
high output voltage swing of the LM13600. D1 is added to
provide a discharge path for Ct when A1 switches low.
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Additional Applications (Continued)

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FIGURE 22. Schmitt Trigger

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FIGURE 23. Tachometer

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FIGURE 24. Peak Detector and Hold Circuit

The Sample-Hold circuit of Figure 25 also requires that the continuously. The Ramp-and-Hold of Figure 26 sources IB
Darlington buffer used be from the other (A2) half of the
package and that the corresponding amplifier be biased on

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 Additional Applications (Continued)

into capacitor C whenever the input to A1 is brought high,

giving a ramp-rate of about 1 V/ms for the component values
shown.
The true-RMS converter of Figure 27 is essentially an auto-
matic gain control amplifier which adjusts its gain such that
the AC power at the output of amplifier A1 is constant. The
output power of amplifier A1 is monitored by squaring ampli-
fier A2 and the average compared to a reference voltage
with amplifier A3. The output of A3 provides bias current to
the diodes of A1 to attenuate the input signal. Because the
output power of A1 is held constant, the RMS value is con-
stant and the attentuation is directly proportional to the RMS
value of the input voltage. The attenuation is also propor-
tional to the diode bias current. Amplifier A4 adjusts the ratio
of currents through the diodes to be equal and therefore the
voltage at the output of A4 is proportional to the RMS value
DS007980-32
of the input voltage. The calibration potentiometer is set such
that VO reads directly in RMS volts. FIGURE 25. Sample-Hold Circuit

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FIGURE 26. Ramp and Hold

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FIGURE 27. True RMS Converter

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Additional Applications (Continued)

The circuit of Figure 28 is a voltage reference of variable

temperature coefficient. The 100 kΩ potentiometer adjusts
the output voltage which has a positive TC above 1.2V, zero The voltage on the base of Q1 is then
TC at about 1.2V and negative TC below 1.2V. This is ac-
complished by balancing the TC of the A2 transfer function
against the complementary TC of D1.
The log amplifier of Figure 29 responds to the ratio of cur-
rents through buffer transistors Q3 and Q4. Zero tempera- The ratio of the Q1 and Q2 collector currents is defined by:
ture dependence for VOUT is ensured because the TC of the
A2 transfer function is equal and opposite to the TC of the
logging transistors Q3 and Q4.
The wide dynamic range of the LM13600 allows easy control
of the output pulse width in the Pulse Width Modulator of Fig- Combining and solving for IABC yields:
ure 30.
For generating IABC over a range of 4 to 6 decades of cur-
rent, the system of Figure 31 provides a logarithmic current
out for a linear voltage in.
Since the closed-loop configuration ensures that the input to This logarithmic current can be used to bias the circuit of Fig-
A2 is held equal to 0V, the output current of A1 is equal ure 4 provide a temperature independent stereo attenuation
to I3 = −VC/RC. characteristic.
The differential voltage between Q1 and Q2 is attenuated by
the R1, R2 network so that A1 may be assumed to be oper-
ating within its linear range. From Equation (5), the input volt-
age to A1 is:

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FIGURE 28. Delta VBE Reference

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 Additional Applications (Continued)

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FIGURE 29. Log Amplifier

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FIGURE 30. Pulse Width Modulator

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Additional Applications (Continued)

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FIGURE 31. Logarithmic Current Source

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22
Physical Dimensions inches (millimeters) unless otherwise noted

S.O. Package (M)

Order Number LM13600M
NS Package Number M16A

Molded Dual-In-Line Package (N)

Order Number LM13600N or LM13600AN
NS Package Number N16A

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LM13600 Dual Operational Transconductance Amplifiers with Linearizing Diodes and Buffers

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the body, or (b) support or sustain life, and whose fail- sonably expected to cause the failure of the life support
ure to perform when properly used in accordance device or system, or to affect its safety or effectiveness.
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.

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