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Beee Lab - 2k14new

The document is an electrical and electronics engineering lab manual. It contains 15 experiments including measuring current, voltage and resistance using various meters, verifying Ohm's law and Kirchhoff's laws, observing AC voltage and current waveforms on an oscilloscope, determining the characteristics of a PN junction diode, zener diode, and common emitter transistor configuration. It also includes experiments on rectifier circuits, logic gates, adders, counters, and shift registers. For each experiment, it lists the required apparatus and components, provides background theory, outlines the procedure, and describes how to analyze results.

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J.Gowri Shankar
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0% found this document useful (0 votes)
80 views71 pages

Beee Lab - 2k14new

The document is an electrical and electronics engineering lab manual. It contains 15 experiments including measuring current, voltage and resistance using various meters, verifying Ohm's law and Kirchhoff's laws, observing AC voltage and current waveforms on an oscilloscope, determining the characteristics of a PN junction diode, zener diode, and common emitter transistor configuration. It also includes experiments on rectifier circuits, logic gates, adders, counters, and shift registers. For each experiment, it lists the required apparatus and components, provides background theory, outlines the procedure, and describes how to analyze results.

Uploaded by

J.Gowri Shankar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 71

RAJAJI INSTITUTE OF TECHNOLOGY

SALEM-63608

DEPARTMENT OF COMPUTER
ENGNEERING

ELECTRICAL AND ELECTRONICS


ENGINEERING LAB MANUAL
By,

J.GOWRI SHANKAR LECT/ECE


2
Sub.Code: 25234

Sub: ELECTRICAL AND ELECTRONICS ENGINEERING LABORATORY

LIST OF EXPERIMENTS:

1. (a) MEASURING CURRENT, VOLTAGE AND RESISTANCE USING VARIOUS TEST METERS
AMMETER , VOLTMETER AND MULTIMETER
(b) CHECKING OF POWER SUPPLY SMPS
2. VERIFCATION OF OHM’S LAW AND KIRCHOFF’S LAW
3. TO OBSERVE WAVEFORMS OF A.C. VOLTAGE AND CURRENT ON CRO. DETERMINE
AMPLITUDE AND PHASE AND UNDERSTAND THE CONCEPTS OF LAGGING AND LEADING.
4. TO DETERMINE EFFICIENCY AND VOLTAGE REGULATION OF SINGLE PHASE TRANSFORMER
BY DIRECT LOADING METHOD.
5. DRAW THE FORWARD BIAS AND REVERSE BIAS CHARACTERISTICS OF A PN JUNCTION
DIODE AND DETERMINE THE FORWARD RESISTANCE OF THE DIODE
6. DRAW THE FORWARD AND REVERSE BIAS CHARACTERISTICS OF A ZENER
7. DRAW THE CHARACTERISTICS OF COMMON EMITTER CONFIGURATION AND DETERMINE
ITS INPUT IMPEDANCE, OUTPUT IMPEDANCE AND CURRENT GAIN.
8. CONSTRUCT AND TEST FULL- WAVE RECTIFIER AND BRIDGE RECTIFIER CIRCUIT.
9. VERIFY TRUTH TABLES OF LOGIC GATES USING IC 7404, 7408, 7432, 7402, 7400,7486
10. VERIFY DE-MORGAN’S THEOREMS.
11. CONSTRUCT HALF ADDER AND FULL ADDER CIRCUITS USING ICS AND VERIFY THEIR TRUTH
TABLE
12. CONSTRUCT HALF SUBTRACTOR AND FULL SUB TRACTOR USING ICS AND VERIFY THEIR
TRUTH TABLE
13. VERIFY THE OPERATION OF A MULTIPLEXER AND DE-MULTIPLEXER USING IC’S
14. IMPLEMENT AND TEST RS, JK, T AND D FLIP-FLOPS.
15. CONSTRUCT AND TEST 4-BIT RIPPLE COUNTER AND OBSERVE THE OUTPUT WAVEFORM
16. CONSTRUCT AND TEST SYNCHRONOUS COUNTER AND OBSERVE THE OUTPUT WAVEFORM.

3
17. CONSTRUCT AND TEST 4-BIT SHIFT REGISTERS

4
5
EX.NO: 1
DT: MEASUREMENT OF CURRENT, VOLTAGE AND
RESISTANCE VALUE & TEST SMPS

AIM:
(a)To measure the value of current, voltage and the resistance by using
Ammeter,Voltmeter And Multimeter.
(b) To checking of power supply-SMPS

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. Resistors 1.2 KΩ ,10KΩ
1 MΩ,470 Ω Each1
1.8 Ω
2. RPS (0-30)V 1
3. Voltmeter (0-30)V 1
4. Ammeter (0-100)A, Each 1
(0-100)mA
5. Multimeter - 1
6. SMPS (0-12)V 1
7. Bread Board - 1

PROCEDURE:
Connections are given as per in the circuit diagram
 Switch ON the power supply
 Using RPS the input voltage is given and the corresponding output is taken from
ammeter, voltmeter and Multimeter
 Find the value of the given resistor using analog Multimeter.
 Find the value of the given resistor using digital Multimeter.
 Check the constant output voltage of SMPS.
 Finally the readings are tabulated.

6
7
8
BASIC BLOCK DIAGRAM OF SMPS

TESTING OF SMPS

9
RESULT:
Thus the current, voltage and resistance were checked by using various test meters
also checked the power supply-SMPS.

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

10
11
EX.NO: 2
DT: VERIFICATION OF OHM’S LAW AND KIRCHOFF’S LAW

AIM:
To construct and verify Ohm’s Law and Kirchoff’s law by conducting an experiment by
using Resistance, Ammeter and Voltmeter.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. Regulated Power Supply (0-30)V 1
2. Ammeter (0-100)mA,(0-200)mA 1,2
3. Voltmeter (0-10)V 2
4. Resistor 1 KΩ, 10 KΩ, 5 KΩ Each 2
5. Bread Board - 1

OHM’S LAW:
At a constant temperature, the current flow through the conductor is directly
proportional to the voltage applied to the conductor. i.e, V = IR, Where R = Resistance
KIRCHOFF’S CURRENT LAW:
In a junction (or) node, the algebraic sum of all the currents meeting at this Junction is
always zero. (OR) In a junction (or) node, the sum of Incoming currents are equal to the sum of
Outgoing currents.
KIRCHOFF’S VOLTAGE LAW:
In any closed circuit (or) mesh, the algebraic sum of all the voltages around the closed
circuit is always zero. (OR) In any closed circuit (or) mesh, the sum of Voltage rises are equal to
the sum of Voltage drops
PROCEDURE:
 Connections are given as per in the circuit diagram.
 Switch ‘ON’ the RPS.
 For ohm’s law, Take the readings of Voltmeter and ammeter by varying the RPS.
 Tabulate the readings and calculate the value of resistance using formula.
 For Kirchoff’s current law, take the readings of ammeter Ia, Ib and Ic by varying
the RPS.
 Tabulate the readings of various ammeter and equate the sum of incoming
current and outgoing current.
 For Kirchoff’s voltage law, Take the readings of voltmeter V a and Vb by varying
the RPS. Tabulate the readings.

12
CALCULATION:

OHM’S LAW:

V = IR

KIRCHOFF’S CURRENT LAW:

I1=I1+I2

KIRCHOFF’S VOLTAGE LAW:

E=V1+V2

13
RESULT:
Thus the Ohm’s law and Kirchoff’s law (KCL & KVL) were verified using standard
resistance, Ammeter and Voltmeter.

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

14
15
EX.NO: 3
DT:
OBSERVATION OF A.C VOLTAGE & CURRENT

AIM:
To observe the waveform of A.C voltage and current using CRO. Determine amplitude
and phase and understand the concept of lagging and leading.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. AFO 1 MHZ 1
2. CRO 20 MHZ 1
3. Resistor 1 KΩ, 100 KΩ, Each 1
4. Decade Inductance box - 1
5. Bread Board - 1

PROCEDURE:

 Connections are given as per in the circuit diagram


 Switch ON the power supply
 The input AC signal is given from AFO to CRO. The amplitude and time period
of both input and output readings are noted from CRO.
 Finally the input and output waveforms are drawn.

16
CONCEPT OF LAGGING AND LEADING:

17
RESULT
Thus the amplitude and phase of AC voltage and current were measured and the graphs
were drawn.

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

18
19
EX.NO: 4
DT: FORWARD BIAS CHARACTERISTICS OF
PN JUNCTION DIODE

AIM:
To determine the V-I characteristics of given PN junction diode under forward bias
condition and to determine the following.
1. Cut in voltage
2. Forward dynamic resistance

APPARATUS REQUIRED:

THEORY:
P – Region of the junction is connected to the positive of the battery is said to be
forward bias.

PROCEDURE:

 Connections are given as per in the circuit diagram


 Switch ON the power supply
 Supply voltage is raised step by step.
 Take the ammeter readings and voltmeter readings
 Finally plot the graph by taking voltage on X- axis and current on Y-axis

20
21
RESULT
Thus the V-I forward bias characteristics of given PN junction diode was verified and the graph
were drawn.

Forward dynamic resistance ___________

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

22
23
EX.NO: 5
DT: REVERSE BIAS CHARACTERISTICS OF
ZENER DIODE

AIM:
To determine the V-I characteristics of zener diode and to determine the following.

1. Forward dynamic resistance


2. Reverse breakdown voltage

APPARATUS REQUIRED:

THEORY:
The zener diode with its cathode connected to the positive of the battery is said to
be reverse bias.

PROCEDURE:

 Connections are given as per in the circuit diagram


 Switch ON the power supply
 Supply voltage is raised step by step.
 Take the readings from ammeter and voltmeter
 Finally plot the graph by taking voltage on X- axis and current on Y-axis

24
25
RESULT
Thus the V-I reverse bias characteristics of given zener diode was drawn and verified.

Reverse dynamic resistance ___________

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

26
27
EX.NO: 6
DT: INPUT AND OUTPUT CHARACTERISTICS OF COMMON
EMITTER TRANSISTOR

AIM:
To draw the input and output characteristics of common emitter configuration and to
determine the following terms.

1. Input dynamic resistance


2. Cut in voltage
3. Current curve

APPARATUS REQUIRED:

PROCEDURE:
INPUT CHARACTERISTICS:
 In this case the emitter will be common for both input and output of the
Circuit.
 The Connections are made as per in the circuit diagram
 Switch ON the power supply
 Keeping collector emitted voltage VCE as constant and the corresponding base
current I B and base emitted voltage VBE reading is noted
 Calculate the input resistance using the formula:
Ri = ∆VBE at constant VCE
∆IB
 Plot the graph VBE on x-axis And IB on y-axis

28
29
OUTPUT CHARACTERISTICS:

 The Connections are made as per in the circuit diagram


 Switch ON the power supply
 At constant IB the collector current IC and collector emitter voltage VCE reading
are noted
 Calculate the output resistance using the formula

Ro = ∆VCE at the constant IB


∆IC
 Plot the graph taking VCE on x-axis and I C on y-axis.

RESULT
Thus the common emitter input and output characteristics were studied and the graphs were
drawn. The following were determined.

Input dynamic resistance ___________


Output dynamic resistance ___________

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

30
31
EX.NO: 7
DT: FULL WAVE AND BRIDGE RECTIFIER

AIM:
To construct the full wave and bridge rectifier using filter circuits and calculate the
percentage of regulation.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. Diode IN 4001 6
2. Capacitor 100f,1000f Each 2
3. CRO 20 MHZ 1
4. Voltmeter (0-50)V 1
5. DRB - 1
6. Transformer (9-0-9)V 1
7 Bread Board - 1

DESCRIPTION:

RECTIFIER:
The circuit that converts alternating current to direct current is known as rectifier. The
rectification can be done by following method,
1. Full wave Rectifier (FWR).
2. Bridge Rectifier(BDR).
PROCEDURE: (FWR & BDR)

A. WITHOUT FILTER:

 The Connections are made as per in the circuit diagram


 Switch on power supply.
 Without connecting load voltmeter reading is noted.
 Connect the load then vary the resistance using DRB the corresponding
Voltmeter and ammeter reading is noted.
 Calculate the % of regulation.
 The graph is drawn between the output current and % of regulation

32
B.WITH FILTER:
33
 The Connections are made as per in the circuit diagram.
 Switch on power supply.
 Without connecting load voltmeter reading is noted.
 Connect the load then vary the resistance using DRB the corresponding
Voltmeter and ammeter reading is noted.
 Calculate the % of regulation.
 The graph is drawn between the output current and % of regulation.

RESULT:
Thus the regulation characteristics of full wave and bridge rectifier with and
without filter were determined.
Full wave rectifier:
% of regulation with filter:
% of regulation without filter:
Bridge rectifier:
% of regulation with filter:
% of regulation without filter: ______

PREPARATION &
OBSERVATION 10

RESULT 05

TOTAL 15

34
35
Ex.No: 8
DT: VERIFICATION OF LOGIC GATES

AIM:
To verify the truth tables of the logic gates by using IC 7404, 7408, 7432, 7402, 7400
and 7486.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. Fixed Power Supply +5V 1
2. IC’s 7404,08,32,02, Each1
00&7486
3. LED - 1
4. Bread board - 1

THEORY:

Gate is a circuit with one or more inputs and only one out put . The out put occurs only
for a well defined condition of the inputs. Gates are also basic digital circuits because the input
and output signals are either o (low) or 1 (high). Gates are often called logic circuits because
they can be analyses with Boolean algebra.

PROCEDURE:
 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output level.
 Repeat the above procedures for all other ICs.
 Switch OFF the power supply.
 Disconnect the connections.

36
37
RESULT:

Thus the functions of logic gates such as AND, OR, NOT, NAND, NOR and
EX-OR gates are verified as per the truth table.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

38
39
PROCEDURE:

 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table of the logic circuit.
 Switch OFF the power supply.

40
41
RESULT:

Thus the De-Morgan’s Theorems were verified using truth table.


PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

42
43
Ex.No: 10
DT: HALF ADDER AND FULL ADDER

AIM:

To Construct and test the performance of half adder and full adder.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. fixed Power Supply +5V 1
2. ICs 7486,7408,7432 Each1
3. LED - 5
4. Bread board - 1

THEORY
HALF ADDER:
Half adder is a logic circuit used for adding two single bit binary numbers. The A and B
the two inputs produce the outputs as, Sum = AB + AB and Carry = AB

FULL ADDER:
Full adder is used for adding three single bit binary numbers. The A,B and C of the
three inputs, produce the outputs as, Sum = A B C and Carry = AB+BC+CA

PROCEDURE:

 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output level.
 Repeat the above procedures for all half adder, full adder and 4-bit full adder
 Switch OFF the power supply.
 Disconnect the connections.

44
45
RESULT:
Thus the half adder and full adder circuits are constructed and their performance is also
tested.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

46
Ex.No: 11
47
DT: HALF SUBTRACTOR AND FULL SUBTRACTOR

AIM:
To Construct and test the performance of half subtractor and full subtractor.

APPARATUS REQUIRED:

S.NO NAME OF THE RANGE QUANTITY


APPARATUS
1. fixed Power Supply +5V 1
2. ICs 7486,7404,7408,7432 Each1
3. LED - 4
4. Bread board - 1

THEORY:
HALF SUBTRACTOR:
Half subtractor is used for subtracting one single bit binary number from another
single bit binary number. The A and B inputs produce the outputs as, Difference = ĀB+A and
Br = ĀB
FULL SUBTRACTOR:
Full subtractor is used for performing three bit subtraction. The A, B and C of the
three inputs, produce the outputs as, Difference = A B C and Br = ĀB+ĀB+BC

PROCEDURE:
 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output level.
 Repeat the above procedures for all half subtractor, full subtractor and 4-bit full
subtractor
 Switch OFF the power supply.
 Disconnect the connections.

48
49
RESULT:
The half subtractor and full subtractor circuits are constructed and their performance is
also tested.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

50
51
Ex.No: 12
DT: MULTIPLEXER AND DEMULTIPLEXER
AIM:
To construct and test the performance of Multiplexer and Demultiplexer circuit.
APPARATUS REQUIRED:

THEORY
MULTIPLEXER:
Multiplexer means many into one. A multiplexer is a digital circuit which contains
many input lines and only one output line. The number of address input lines depends on the
number of input lines.
DEMULTIPLEXER:
Demultiplexer means one into many. A Demultiplexer is a digital combination
circuit with one input and many outputs. The number of address lines depends on the number

52
of output lines.

53
54
RESULT:
Thus the performance of multiplexer and Demultiplexer circuits are constructed and the
outputs were verified using their truth tables.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

55
56
Ex.No: 13
DT: FLIP FLOPS

AIM

To construct and verify the truth table for RS, JK, D and T Flip flop.

APPARATUS REQUIRED:

S.NO NAME OF THE APPARATUS RANGE QUANTITY


1. Fixed Power Supply +5V 1
2. Ics 7400,7404,7473 Each1
3. LED - 4
4. Bread board - 1

THEORY:

Flip – Flops is a bistable logic element with one or more inputs and two outputs. The
outputs are complement to each other. A flip flop can store one bit of binary data as ‘1’ or ‘0’
four types of output conditions may exist a flip flops. They are set, reset no change and toggle.
TFF is a toggle flip flop and DFF is a data (Delay) flip flop.

PROCEDURE:

 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output conditions.
 Switch OFF the power supply.
 Disconnect the connections.

57
58
RESULT:

Thus the RS, JK, D and T Flip Flops are constructed and their outputs are verified using
their truth tables.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

59
60
Ex.No: 14
DT: FOUR BIT RIPPLE COUNTER

AIM:
To construct and test the performance of 4 bit ripple counter

APPARATUS REQUIRED:

S.NO NAME OF THE RANGE QUANTITY


APPARATUS
1. Fixed Power Supply +5V 1
2. ICs 7473 4
3. LED - 5
4. Bread board - 1

THEORY:

A ripple counter is also called an asynchronous counter, because it is an asynchronous


sequential circuit. It is simple and strait forward in operation. It has some speed limitations. It
also requires a minimum number of hardware.

PROCEDURE;

 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output conditions.
 Switch OFF the power supply.
 Disconnect the connections.

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62
RESULT:

Thus the 4 bit ripple counter was constructed and its output was verified.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

4-BIT SYNCHRONOUS COUNTER:

63
CIRCUIT DIAGRAM:

WAVE FORM:

Ex.No: 15
64
DT: SYNCHRONOUS COUNTER

AIM:
To construct and test the performance of synchronous decade counter.

APPARATUS REQUIRED:

S.NO NAME OF THE RANGE QUANTITY


APPARATUS
1. Fixed Power Supply +5V 1
2. ICs 7473,7408 4,1
3. LED - 5
4. Bread board - 1

THEORY:

A counter which is reset at the 10th clock pulse is called divide by 10th counter or decade
counter.

PROCEDURE;

 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Apply different combinations of inputs, as per the truth table.
 Note its corresponding output conditions.
 Switch OFF the power supply.
 Disconnect the connections.

65
66
RESULT:

Thus the 4-bit synchronous counter was constructed and its output was verified.

PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

67
68
Ex.No: 16
DT: FOUR BIT SHIFT REGISTER

AIM:
To construct and test the performance of four bit shift register.

APPARATUS REQUIRED:

S.NO NAME OF THE RANGE QUANTITY


APPARATUS
1. Fixed Power Supply +5V 1
2. ICs 7473 4
3. LED - 5
4. Bread board - 1

THEORY:
A register which has the shifting facility is called as shift register. The data placed in
the shift register can be moved form one place to other in two ways, namely serial shifting
and parallel shifting. In serial shifting, the data bits are shifted in serial manner. In Parallel
shifting, all data bits are shifted simultaneously.

PROCEDURE:
 Make the connections as per the circuit diagram by using Bread board.
 Switch ON the power supply.
 Note its corresponding output conditions.
 Switch OFF the power supply.
 Disconnect the connections.

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70
RESULT:
Thus the four bit shift register was constructed and its outputs were verified using their truth
table.
PREPARATION
10
& OBSERVATION
RESULT 5
TOTAL 15

71

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