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Shreya Mukherjee is seeking a position where she can contribute her VLSI design skills. She has an M.Tech in VLSI Design from VIT University and a B.E in ECE from WBUT. Her skill set includes EDA tools like Cadence and Synopsys tools. She has experience with HDLs like Verilog and software skills in C, Perl and TCL. She has worked on projects involving ASIC implementation, adaptive filter design, SRAM cell design and FinFET analysis. She is hardworking, learns quickly and works well in a team. She has received scholarships and holds diplomas in dance and music.

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84 views2 pages

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Shreya Mukherjee is seeking a position where she can contribute her VLSI design skills. She has an M.Tech in VLSI Design from VIT University and a B.E in ECE from WBUT. Her skill set includes EDA tools like Cadence and Synopsys tools. She has experience with HDLs like Verilog and software skills in C, Perl and TCL. She has worked on projects involving ASIC implementation, adaptive filter design, SRAM cell design and FinFET analysis. She is hardworking, learns quickly and works well in a team. She has received scholarships and holds diplomas in dance and music.

Uploaded by

Basu
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Shreya Mukherjee

M.Tech in VLSI Design, Mobile: +91-6379440625


RA 663, Second Floor, Santinagar Road, Nawbhanga. Email: [email protected]
Salt Lake City, Sec-4 West Bengal, Kol-700105. [email protected]

Objective

Seeking a position with an organization where I can contribute my skills for organization’s success
and synchronize with new technology while being resourceful, innovative and flexible.

Skill Set

 EDA Tools : Cedence Virtuoso, Quartus Prime, Modelsim, Synopsis


Design Compiler, Synopsis VCS, TCAD.
 Hardware Description Languages : Verilog.
 Software Skills : Perl, C, Basic TCL

Academic Profile

Degree Board / University Year CGPA / Percentage


2018 –
M.Tech [VLSI Design] VIT University 7.23
2020
2012 -
B.E [ECE] WBUT 7.5
2016
West Bengal Council of
2010-
12th Higher Secondary 85.8%
2012
Education
West Bengal Board of 1999-
10th 85.375%
Secondary Education 2010

Current status

 Currently pursuing M.Tech Degree from Vellore Institude of Technology.


Projects

M.Tech Semester projects


1) Title: ASIC Implementation Of ARM AMBA AHB Protocol
Abstract: ASIC Design flow is performed in Synopsis design complier for front end (area,
power and timing report are obtained) and prime time analysis for timing analysis.
Team Size: 3

2) Title: A High Performance and Energy-Efficient FIR Adaptive Filter Using Approximate
Distributed Arithmetic Circuits
Abstract: RTL implementation of Adaptive FIR filter (sub-blocks weight update module, FIR
filter, carry look ahead adder and Adaptive filter) using ModelSim and performed synthesis in
Synopsys design compiler.
Team Size: 3

3) Title: A New 6-Transistor SRAM Cell for Low Power Cache Design.
Abstract: New type of 6T SRAM cell is designed using switch transistors in Cedence Virtuoso and
power dissipation is compared with conventional 6T SRAM cell in 45nm technology
Team Size: 3

4) Title: DC Analysis of Hybrid FinFET.


Abstract: DC analysis of Hybrid FinFET using TCAD tool.
Team Size: 3

B.Tech Semester projects


5) Title: Digital Image processing
Team Size: 5

Personal Strengths

 Hard working and good at team work.


 Rapid at learning things.

Achievements

 Scheme of Scholarship of College and University Student of Govt. of India.


 “Nritya Visarad” in Kathak Dance in Both Chandigarh Gharaana and Allahabad Gharaana.
 “Senior Diploma” in Rabindra Nritya
 “Senior Diploma” in Vocal Classical
 “Senior Diploma” in Rabindra Sangeet

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