Solved MCQs of CS401 PDF
Solved MCQs of CS401 PDF
· 1 argument
· 1 argument
· 3 arguments
· No arguments
· CF
· OF
· DF
· No flags will be affected
Q=1:
Which bit of attributes byte represents the blue component of foreground color?
0
· 1
· 2
· 3
Q=2:
The clear screen operation initializes the whole block of video memory to:
· 0417
· 0714
· 0741
· 0720
Q=3:
When the operand of DIV instruction is of 16 bit then implied dividend will be of
· 64-bit
· 32-bits
· 16-bits
· 8--bits
Q=4
Which of the following is the pair of register used to access memory in string instruction:
· DI and BP
· SI and BP
· DI and SI
· DS and Si
Q=5
A fat32 file system directory entry in DOS consist of how many bytes?
· 16
· 24
· 32
· 64
Q=6:
Which register is generally used to specify the services number of an interrupt?
DX
AX
BX
CX
………………………………………………………………………………………….
Q=7:
In 9 pin db 9 connector ,which pin is assigned to RD(received data)
· 1
· 2
· 3
· 4
Q=8
In case of COM file, maximum length of parameters passed through command line can
be……….
· 63 bytes
· 127bytes
· 255 bytes
· 511 bytes
Q=9
We can access the DOS service using;
· Int 0x21
· Int 0x13
· Int 0x 10
· Int 0x 08
Q=10
In 9 pin 9 connector,which pin is assigned to signal ground
· 3
· 4
· 5
· 6
Q=11:
BPB stands for
· Basic parameter block
· Bios precise block
· Basic precise block
· Bios parameter block
Q=12
Int 13-bios disk service “generally uses which register to return the error flag?
· CF
· DL
· AH
· AL
Q=13:
The first sector on the hard disk contains the
· Hard disk size
· Partition table
· Data size
· Sector size
Q=14
Operating system organize data in the form of
· Folder
· Batch file
· File
· None of above
………
Q=15
In 9 pin db 9 connector, which pin is assigned to TD(transmitted data)
· 1
· 2
· 3
· 4
Q=16”
Device derive can be divided into ----------major categories.
· 5
· 4
· 3
· 2
5. Thread registration code initialize PCB and add to linked list so that _____ will give it
turn.
· Assembler
· Linker
· Scheduler
· Debugger
· 1
· 2
· 3
· 4
· Cld
· Clrd
· Cl df
· Clr df
· Incremented by 1
· Incremented by 2
· Decremented by 1
· Decremented by 2
20. CX register is
· Count register
· Data register
· Index register
· Base register
21. OUT instruction uses __AX_____ as source register.
………………………………………………………………………………………
► IRS
► ISP
► IRT
► string
► word
► indirect
► stack
► SP is incremented by 2
► SP is decremented by 2
► SP is incremented by 4
► SP is decremented by 4
► Two forms
► Three forms
► Four forms
► Five forms
When the operand of DIV instruction is of 16 bits then implied dividend will be of
► 8 bits
► 16 bits
► 32 bits
► 64 bits
After the execution of MOVS instruction which of the following registers are updated
► SI only
► DI only
► SI and DI only
When a very large number is divided by very small number so that the quotient is larger than
the space provided, this is called
► An illegal instruction
Which of the following options contain the set of instructions to open a window to the video
memory?
► mov AX, 0xb008
mov ES, AX
► mov AX, 0xb800
mov ES, AX
► mov AX, 0x8b00
mov ES, AX
► mov AX, 0x800b
mov ES, AX
The execution of the instruction “mov word [ES : 0], 0x0741” will print character “A” on
screen , background color of the screen will be
► Black
► White
► Red
► Blue
· 16 bits rotation
· 1 bit rotation
· 17 bits rotation
· 8 bits rotation
· 2
· 4
· 8
· 16
· 1
· 2
· 3
· 4
VERY IMPORTANT
Question No: 11
( Marks: 1 ) - Please
choose one In 9pin DB 9 CTS is assigned on pin
number
· 6
· 7
· 8
· 9
· Activity
· Hand-shaking
· Interruption
· Time clicking
In programmable interrupt controller which of the following ports is used for selectively
enabling or disabling interrupts
· 19
· 20
· 21
· 22
=============================================================
. Serial Port is also accessible via I/O ports , COM 1 is accessible via ports
3F8-3FF while COM 2 is accessible via 2F8 -2FF.
The first register at 3F8 is the Transmitter holding register if written to and the receiver
buffer register if read from.
Other register of our interest include 3F9 whose Bit 0 must be set to enable received data
available interrupt and Bit 1 must be set to enable transmitter holding register empty
interrupt.
(Transmitter, COM 1, I/O ports , COM2. bit 0 , Buffer , 3FA)
====================================================
Question # 1
There are three busses to communicate the processor and memory named as _____________
1) : address bus.,data bus and data bus.
2) : addressing bus.,data bus and data bus.
3) : address bus.,datamove bus and data bus.
4) : address bus.,data bus and control bus..
Question # 2
The address bus is unidirectional and address always travels from processor to memory.
1) : TRUE
2) : FALSE
Question # 3
Data bus is bidirectional because________
1) : To way
2) : Data moves from both, processor to memory and memory to processor,
3) : Data moves from both, processor to memory and memory to data Bus,
4) : None of the Given
Correct Option : 3 From : Lecture 1
Question # 4
Control bus________
1) : is Not Important.
2) : is Important .
3) : bidirectional.
4) : unidirectional .
Correct Option : 3 From : Lecture 1
Question # 5
A memory cell is an n-bit location to store data, normally ________also called a byte
1) : 4-bit
2) : 8-bit
3) : 6-bit
4) : 80-bit
Correct Option : 2 From : Lecture 1
Question # 6
The number of bits in a cell is called the cell width.______________ define the memory
completely.
1) : Cell width and number of cells,
2) : cell number and width of the cells,
3) : width
4) : Height
Correct Option : 1 From : Lecture 1
Question # 7
for memory we define two dimensions. The first dimension defines how many
__________bits are there in a single memory cell.
1) : parallel
2) : Vertical
3) : long
4) : short
Correct Option : 1 From : Lecture 1
Question # 8
__________ operation requires the same size of data bus and memory cell width.
1) : Normal
2) : Best and simplest
3) : first
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 9
Control bus is only the mechanism. The responsibility of sending the appropriate signals on
the control bus to the memory is of the_________________.
1) : Data Bus
2) : processor
3) : Address Bus
4) : None of the Given
Correct Option : 2 From : Lecture 1
Question # 10
In “total: dw 0 ” Opcode total is a ___________
1) : Literal
2) : Variable
3) : Label
4) : Starting point
Correct Option : 3 From : Lecture 10
Question # 11
| 0 |--›| 1 | 1 | 0 | 1 | 0 | 0 | 0 | --›| C | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 3 From : Lecture 10
Question # 12
| C |‹--| 1 | 1 | 0 | 1 | 0 | 0 | 0 | ‹--| 0 | is a example of ______
1) : Shl
2) : sar
3) : Shr
4) : Sal
Correct Option : 1 From : Lecture 10
Question # 13
ADC has _________ operands.
1) : two
2) : three
3) : Five
4) : Zero
Correct Option : 2 From : Lecture 10
Question # 14
The basic purpose of a computer is to perform operations, and operations need
____________.
1) : order
2) : nothing
3) : operands
4) : bit
Correct Option : 3 From : Lecture 2
Question # 15
Registers are like a scratch pad ram inside the processor and their operation is very much like
normal______________.
1) : Number
2) : opreations
3) : memory cells
4) : None of the Given
Correct Option : 3 From : Lecture 2
Question # 16
There is a central register in every processor called the _______ and The word size of a
processor is defined by the width of its__________.
1) : accumulator,accumulator
2) : data bus,accumulator
3) : accumulator, Address Bus
4) : accumulator,memory
Correct Option : 1 From : Lecture 2
Question # 17
___________does not hold data but holds the address of data
1) : Pointer, Segment, or Base Register
2) : Pointer, Index, or Base Register
3) : General Registers
4) : Instruction Pointer
Correct Option : 2 From : Lecture 2
Question # 18
“The program counter holds the address of the next instruction to be _____________”
1) : executed.
2) : called
3) : deleted
4) : copy
Correct Option : 1 From : Lecture 2
Question # 19
There are _____ types of “instruction groups”
1) : 4
2) : 5
3) : 3
4) : 2
Correct Option : 1 From : Lecture 2
Question # 20
These instructions are used to move data from one place to another.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 2
Question # 21
“mov” instruction is related to the _______ *****.
1) : Arithmetic and Logic Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Special Instructions
Correct Option : 2 From : Lecture 2
Question # 22
______________allow changing specific processor behaviors and are used to play with it.
1) : Special Instructions
2) : Data Movement Instructions
3) : Program Control Instructions
4) : Arithmetic and Logic Instructions
Correct Option : 1 From : Lecture 2
Question # 23
8088 is a 16bit processor with its accumulator and all registers of __________.
1) : 32 bits
2) : 6 bits
3) : 16 bits
4) : 64 bits
Correct Option : 3 From : Lecture 2
Question # 24
The __________ of a processor means the organization and functionalities of the registers it
contains and the instructions that are valid on the processor.
1) : Manufactures
2) : architecture
3) : Deal
4) : None of the Given
Correct Option : 2 From : Lecture 2
Question # 25
Intel IAPX88 Architecture is ___________
1) : More then 25 old
2) : New
3) : Not Good
4) : None of the Given
Correct Option : 1 From : Lecture 2
Question # 26
The iAPX88 architecture consists of______registers.
1) : 13
2) : 12
3) : 9
4) : 14
Correct Option : 4 From : Lecture 3
Question # 27
General Registers are ______________
1) : AX, BX, CX, and DX
2) : XA, BX, CX, and DX
3) : SS,SI and DI
4) : 3
Correct Option : 1 From : Lecture 3
Question # 28
AX means we are referring to the extended 16bit “A” register. Its upper and lower byte are
separately accessible as ________________.
1) : AH and AL
2) : A Lower and A Upper
3) : AL, AU
4) : AX
Correct Option : 1 From : Lecture 3
Question # 29
AX is General purpose Register where A stands for__________.
1) : Acadmic
2) : Ado
3) : Architecture
4) : Accumulator
Correct Option : 4 From : Lecture 3
Question # 30
The B of BX stands for _________because of its role in memory addressing.
1) : Busy
2) : Base
3) : Better
4) : None of the Given
Correct Option : 2 From : Lecture 3
Question # 31
The D of DX stands for Destination as it acts as the destination in _____________________.
1) : I/O operations
2) : operations
3) : memory cells
4) : Memory I/O operations
Correct Option : 1 From : Lecture 3
Question # 32
The C of CX stands for Counter as there are certain instructions that work with an automatic
count in the ___________.
1) : DI register
2) : BX register
3) : CX register
4) : DX register
Correct Option : 3 From : Lecture 3
Question # 33
_________are the index registers of the Intel architecture which hold address of data and
used in memory access.
1) : SI and SS
2) : PI and DI
3) : SI and IP
4) : SI and DI
Correct Option : 4 From : Lecture 3
Question # 34
In Intel IAPX88 architecture ___________ is the special register containing the address of
the next instruction to be executed.
1) : AX
2) : PI
3) : IP
4) : SI
Correct Option : 3 From : Lecture 3
Question # 35
SP is a memory pointer and is used indirectly by a set of ____________.
1) : instructions
2) : Pointers
3) : Indexes
4) : Variables
Correct Option : 1 From : Lecture 3
Question # 36
___________is also a memory pointer containing the address in a special area of memory
called the stack.
1) : SP
2) : BP
3) : PB
4) : AC
Correct Option : 2 From : Lecture 3
Question # 37
____________is bit wise significant and accordingly each bit is named separately.
1) : AX
2) : FS
3) : IP
4) : Flags Register
Correct Option : 4 From : Lecture 3
Question # 38
When two 16bit numbers are added the answer can be 17 bits long, this extra bit that won’t fit
in the target register is placed in the __________where it can be used and tested
1) : carry flag
2) : Parity Flag
3) : Auxiliary Carry
4) : Zero Flag
Correct Option : 1 From : Lecture 3
Question # 39
Program is an ordered set of instructions for the processor.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 40
For Intel Architecture “operation destination, source” is way of writing things.
1) : TRUE
2) : FALSE
3) :
4) :
Correct Option : 1 From : Lecture 3
Question # 41
Operation code “ add ax, bx ” ____________.
1) : Add the bx to ax and change the bx
2) : Add the ax to bx and change the ax
3) : Add the bx to ax and change the ax
4) : Add the bx to ax and change nothing
Correct Option : 3 From : Lecture 3
Question # 42
The maximum memory iAPX88 can access is________________.
1) : 1MB
2) : 2MB
3) : 3MB
4) : 128MB
Correct Option : 1 From : Lecture 4
Question # 43
The maximum memory iAPX88 can access is 1MB which can be accessed with
_______________.
1) : 18 bits
2) : 20 bits
3) : 16 bits
4) : 2 bits
Correct Option : 2 From : Lecture 4
Question # 44
_____________address of 1DED0 where the opcode B80500 is placed.
1) : physical memory
2) : memory
3) : efective
4) : None of the Given
Correct Option : 1 From : Lecture 4
Question # 45
16 bit of Segment and Offset Addresses can be converted to 20bit Address i.e
Segment Address with lower four bits zero + Offset Address with ______ four bits zero =
20bit Physical Address
1) : Middle
2) : lower
3) : Top
4) : upper
Correct Option : 4 From : Lecture 4
Question # 46
When adding two 20bit Addresses a carry if generated is dropped without being stored
anywhere and the phenomenon is called address______.
1) : wraparound
2) : mode
3) : ping
4) : error
Correct Option : 1 From : Lecture 4
Question # 47
segments can only be defined a 16byte boundaries called _____________ boundaries.
1) : segment
2) : paragraph
3) : Cell
4) : RAM
Correct Option : 1 From : Lecture 4
Question # 48
in a Program CS, DS, SS, and ES all had the same value in them. This is called
_____________________.
1) : equel memory
2) : overlapping segments
3) : segments hidding
4) : overlapping SI
Correct Option : 2 From : Lecture 4
Question # 49
“db num1” size of the memory is _____________
1) : 1byte
2) : 4bit
3) : 16bit
4) : 2byte
Correct Option : 1 From : Lecture 5
Question # 50
“ 1------------[org 0x0100]
2------------mov ax, [num1] ; load first number in ax
3------------mov bx, [num2] ; load second number in bx
4------------add ax, bx _________________________________
5------------int 0x21
6------------
7------------num1: dw 5
8------------num2: dw 10
Question # 51
In “ mov ax, bx ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 4 From : Lecture 5
Question # 52
In “mov ax, [bx] ” is _____________ Addressing Modes
1) : Based Register Indirect
2) : Indirect
3) : Base Indirect
4) : Immediate
Correct Option : 1 From : Lecture 5
Question # 53
In “mov ax, 5 ” is _____________ Addressing Modes
1) : Immediate
2) : Indirect
3) : Indirect
4) : Register
Correct Option : 1 From : Lecture 6
Question # 54
In “ mov ax, [num1+bx] ” is ___________ ADDRESSING
1) : OFFSET+ Indirect
2) : Register + Direct
3) : Indirect + Reference
4) : BASEd REGISTER + OFFSET
Correct Option : 4 From : Lecture 7
Question # 55
“base + offset addressing ” gives This number which came as the result of addition is called
the _______.
1) : Address
2) : mode
3) : effective address
4) : Physical Address
Correct Option : 3 From : Lecture 7
Question # 56
“mov ax, [cs:bx]” associates _________ for this one instruction
1) : CS with BX
2) : BX with CS
3) : BX with AX
4) : None of the Given
Correct Option : 2 From : Lecture 7
Question # 57
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the effective memory address;
1) : 0020
2) : 0200
3) : 0300
4) : 0x02
Correct Option : 2 From : Lecture 7
Question # 58
For example
BX=0100
DS=FFF0
And Opcode are;
move [bx+0x0100], Ax
now what is the physical memory address;
1) : 0020
2) : 0x0100
3) : 0x10100
4) : 0x100100
Correct Option : 2 From : Lecture 7
Question # 59
In “ mov [1234], al ” is _____________ Addressing Modes.
1) : Immediate
2) : Indirect
3) : Direct
4) : Register
Correct Option : 3 From : Lecture 8
Question # 60
In “ mov [SI], AX ” is _____________ Addressing Modes.
1) : Basef Register Indirect
2) : Indirect
3) : Indexed Register Indirect
4) : Immediate
Correct Option : 3 From : Lecture 8
Question # 61
In “ mov ax, [bx - Si] ” is ___________ ADDRESSING
1) : Basef Register Indirect
2) : Indirect
3) : Direct
4) : illegal
Correct Option : 4 From : Lecture 8
Question # 62
In “ mov ax, [BL] ” there is error i.e. __________
1) : Address must be 16bit
2) : Address must be 8bit
3) : Address must be 4bit
4) : 8 bit to 16 bit move illegal
Correct Option : 4 From : Lecture 8
Question # 63
In “ mov ax, [SI+DI] ” there is error i.e. __________
1) : Two indexes can’t use as Memory Address
2) : index can’t use as Memory Address
3) : I don't Know
4) : None of the Given
Correct Option : 1 From : Lecture 8
Question # 64
In JNE and JNZ there is difference for only _____________;
1) : Programmer or Logic
2) : Assembler
3) : Debugger
4) : IAPX88
Correct Option : 1 From : Lecture 9
Question # 65
JMP is Instruction that on executing take jump regardless of the state of all flags is
called__________
1) : Jump
2) : Conditional jump
3) : Unconditional jump
4) : Stay
Correct Option : 3 From : Lecture 9
Question # 66
When result of the source subtraction from the destination is zero, zero flag is set i.e. ZF=1
its mean that;
1) : DEST = SRC
2) : DEST != SRC
3) : DEST < SRC
4) : DEST > SRC
Correct Option : 1 From : Lecture 9
Question # 67
When an unsigned source is subtracted from an unsigned destination and the destination is
smaller, borrow is needed which sets the ____________.
1) : carry flag i.e CF = 0
2) : carry flag i.e CF = 1
3) : Carry Flag + ZF=1
4) : None of the Given
Correct Option : 2 From : Lecture 9
Question # 68
In the case of unassigned source and destination when subtracting and in the result ZF =1 OR
CR=1 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST ? USRC
4) : DEST < SRC
Correct Option : 3 From : Lecture 9
Question # 69
In the case of unassigned source and destination when subtracting and in the result ZF =0
AND CR=0 then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST > USRC
Correct Option : 4 From : Lecture 9
Question # 70
In the case of unassigned source and destination when subtracting and in the result CR=0
then _______
1) : DEST = SRC
2) : DEST != SRC
3) : UDEST < USRC
4) : UDEST ? USRC
Correct Option : 4 From : Lecture 9
Question # 71
______This jump is taken if the last arithmetic operation produced a zero in its destination.
After a CMP it is taken if both operands were equal.
1) : Jump if zero(JZ)/Jump if equal(JE)
2) : Jump if equal(JE)
3) : Jump if zero(JZ)
4) : No Jump fot This
Correct Option : 1 From : Lecture 9
Question # 72
_______This jump is taken after a CMP if the unsigned source is smaller than or equal to the
unsigned destination.
1) : JBE(Jump if not below or equal)
2) : JNA(Jump if not above)/JBE(Jump if not below or equal)
3) : JNA(Jump if not above)
4) : No Jump fot This
Correct Option : 2 From : Lecture 9
Question # 73
Numbers of any size can be added using a proper combination of __________.
1) : ADD and ADC
2) : ABD and ADC
3) : ADC and ADC
4) : None of the Given
Correct Option : 1 From : Lecture 11
Question # 74
Like addition with carry there is an instruction to subtract with
borrows called____________.
1) : SwB
2) : SBB
3) : SBC
4) : SBBC
Correct Option : 2 From : Lecture 11
Question # 75
if “and ax, bx” instruction is given, There are _____________
operations as a result
1) : 16 AND
2) : 17 AND
3) : 32 AND
4) : 8 AND
Correct Option : 1 From : Lecture 12
2. In case of COM File first command parameter is stored at ______ offset of program
segment prefix.
a. 0x80 (Not Confirm)
b. 0x82
c. 0x84
d. 0x86
3. Address always goes from
a. Processor to meory
b. Memory to processor
c. Memory to memory
d. None of the above
10. The execution of instruction mov word [es:160], 0x1230, will print a character on the
screen at
a. First column of second row
b. Second column of first row
c. Second column of second row
d. First column of third row
1)))SHR and SAL are same?
.True (correct)
.False
2)))mov ax,0 will set ZF flag
.True
.False
3)))In 9 pin DB connector ,which pic is assigned to TD.
. 1
. 2
. 3(correct)
. 4
4)))Lower 16 bits of EAX are labeled as
. AX(correct)
. BX
.EAX
.none of above
5))) which is the special prefix used for repeating a block
.rep(correct)
.repeat
.repb
.repe
6)) JA can not after cmp if unsigned destinition is greater than
source
.true
.false
Q=1
Conditional jump can only:
1. Far
2. short
3. near
4. all of the given
q=2:
Address is always go from:
1. Processor to memory
2. Memory to processor
3. Memory to memory
4. None of given
Q=3;
Programmable interrupt controllers have two ports 20 and 21……port 20 is a control port
while port 21 is ………..
1. The interrupt make register
2. Interrupt port
3. Output port
4. Input port
Q=4:
In the instruction “move word[es:160],0x1230 represent the charechter…………
1. A
2. B
3. 0
4. 1
Q=5:
The 8088 processor divides interrupts into how many classes?
1. 2
2. 3
3. 4
4. 5
Q=6:
Which of the following is the pair of register used to access memory in string instruction?
1. DI and BP
2. SI and BP
3. DI and SI
4. DS and SI
Q=7:
In case of COM file,first command line parameter is stored at ………..offset of program
segment prefix’
1. 0x80
2. 0x82
3. 0x84
4. 0x86
Q=8:
The INT 0x13 service 0x03 is use to …
1. Read disk sector
2. Write disk sector
3. Reset disk sector
4. Get drive parameters
Q=9:
After the execution of STOSWB,the CX wil be……..
1. Incremented by 1
2. Incremented by 2
3. Decremented by 1
4. Decremented by 2
Q=10
The execution of the instruction “mov word [ES:160],0x1230”will print a character on the
screen at:
1. First column of second row
2. Second column of first row
3. Second column of second row
4. First column of third row
Question No: 17 ( Marks: 1 )
Write any two control instructions.
An implied operand means that it is always in a particular register say the accumulator. It
needs to not be mentioned in the instruction.