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Pearson
Higher Nationals in
Engineering
ASSESSMENT BRIEF
Unit 20:Digital Principles
Brief 2
Number:
First teaching from July 2018

Issue 1
 Higher National Certificate/Diploma in
Electrical and Electronics Engineering

Assessment Brief A1
Student Name/ID
Number

Unit Number and Title Unit 20: Digital Principles

Academic Year 2018 – 2019

Unit Tutor

Assignment Title Applying simple combinational and sequential logic circuits.

Issue Date 26 Jan 2019

Submission Date 9 Mar 2019 (4:00 PM) (including 3-weeks holiday)

IV Name & Date

Submission Format

You should present

A formal report with appropriate use of structure and referencing.

Unit Learning Outcomes

LO1 Implement and analyse simple combinational logic circuits

LO2 Implement and analyse simple sequential logic circuits
Assignment Brief and Guidance

*Please note that assignment guidance is for reference only and should be more specific in detail to meet
customised needs.

Tasks
Number System, Operation, and Codes
1. Perform each of the following conversions. For some of them, you may want to try several methods
to see which one works best for you. For example, a binary-to-decimal conversion may be done directly,
or it may be done as a binary-to-hex conversion followed by a hex-to-decimal conversion. (P1)
(a) 141710 =_____ 2 (b) 110100012 =_____ 10 (c) 249710 =_____ 16

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 (d) 51110 =_____ (BCD) (e) 23516 =_____ 10 (f) 3E1C16 =_____ 10
(g) 101010111(BCD) = _____ 10 (h) 46516 =_____ 2 (i) B3416 =_____ 2
(j) 01110100(BCD) = _____ 2 (l) 1110102 = _____ (BCD)
2. How many hex digits are required to represent decimal numbers up to 20000? (P1)
3. Take each four-bit binary number in the order they are written to be the equivalent hex digit
without performing a calculation by hand or by calculator. (M1)
(a) 1001 (b) 1111 (c) 1011
(d) 0001 (e) 1101 (f) 0010
4. How many hex digits are required to represent decimal numbers up to 1 million? (M1)
5. How many bits are required to represent the decimal numbers in the range from 0 to 999 using (a)
straight binary code? (b) BCD code? (P1)
6. Fill in the blanks with the correct word or words. (M1)
(a) Conversion from decimal to _____ requires repeated division by16.
(b) Conversion from decimal to binary requires repeated division by_____.
(c) In the BCD code, each _____ is converted to its four-bit binary equivalent.
(d) The _____ code has the characteristic that only one bit changes in going from one step to the
next.
(e) A transmitter attaches a _____ to a code group to allow the receiver to detect _____.
(f) The _____ code is the most common alphanumeric code used in computer systems.
(g) _____ is often used as a convenient way to represent large binary numbers.
(h) A string of eight bits is called a _____.
Logic Gates
7. Apply the input waveforms of Figure 1 to a NOR gate and draw the output waveform.
(a) Repeat with C held permanently LOW. (P1)
(b) Repeat with C held HIGH.

A
B

Figure 1

8. Draw the output waveform for the OR gate of Figure 2. (M1)

A
B B
x
C
C

Figure 2

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 9. Suppose that the A input in Figure 2 is unintentionally shorted to ground (i.e., A=0). Draw the
resulting output waveform. (P1)
10. Read the statements below concerning an OR gate. At first, they may appear to be valid, but after
some thought you should realize that neither one is always true. Prove this by showing a specific
example to refute each statement.
(a) If the output waveform from an OR gate is the same as the waveform at one of its inputs, the
other input is being held permanently LOW. (M1)
(b) If the output waveform from an OR gate is always HIGH, one of its inputs is being held
permanently HIGH. (M1)
11. Change the OR gate in Figure 2 to an AND gate. (M1)
(a) Draw the output waveform.
(b) Draw the output waveform if the A input is permanently shorted to ground.
(c) Draw the output waveform if A is permanently shorted to 5 V
Boolean Algebra and Logic Simplification
12. Given a logic circuit with 4 inputs A,B,C,D, the output is High, only when more than two inputs are
High at the same time.
(a) Draw the truth table. (P1)
(b) Write the simplified expression using K-map. (M1)
(c) Draw the logic circuit based on question (b). (M1)
13. Use a K map to simplify the following expression Y  C ( A B D  D)  AB C  D . (M1)
14. Design the logic circuit corresponding to the truth table shown in Table 1
(a) Determine the output expression using K-map. (M1)
(b) Design the logic circuit using the expression (a). (D1)
(c) Re-design the logic circuit using NOR gates with two inputs only. (D1)

Table 1

15. Design a logic circuit with 4 inputs that produces a HIGH output only when all three inputs are the
same level.

BTEC HND in Engineering 4

 (a) Draw the truth table. (P1)
(b) Determine the output expression using the SOP solution. (M1)
(c) Simplify the logic circuit using K map with the SOP solution. (M1)
16. Given the logic circuits as in Figure 3
(a) Write the Boolean expression for output x in Figure 3a. (P1)
(b) Determine the value of x for all possible input conditions, and list the values in a truth table.
(M1)
(c) Repeat for the circuit in Figure 3b. (D1)

Figure 3
17. For each of the following expressions, construct the corresponding logic circuit using AND, OR gates
and INVERTERs. (D1)

Y  ( A  B  C DE )  B CD
18. Write the expression for the output of Figure 4, and use it to determine the complete truth table. Then
apply the waveforms of Figure 4 to the circuit inputs, and draw the resulting output waveform.

A
X
B

Figure 4
(a) Determine the truth table for the circuit of Figure 4. (P1)
(b) Modify the circuits so that NAND gates and NOR gates are used wherever appropriate. (M1)

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 (c) Simulate this circuit using the software (Proteus), in which a two-way switch is connected to
each input of the logic circuit and its output is connected to one resistor and one LED in series in
Figure 4. (D1)
(d) Perform the real circuit with testboard and compare it with the simulation result. (D1)
19. Simplify each of the following expressions using De Morgan’s theorems. (M1)

Y  ( A  B )( A  B)
20. Simplify the following expression. (D1)

Y  (M  N )( M  P)( N  P )
Combinational Logic Analysis
21. Show how can be implemented with one two-input NOR and one two-input NAND gate.
Implement y=ABCD using only two-input NAND gates. (P2)
22. Figure 3 shows an application of logic gates that simulates a two-way switch like the ones used in
our homes to turn a light on or off from two different switches. Here the light is an LED that will be ON
(conducting) when the NOR gate output is LOW. Note that this output is labelled LIGHT to indicate that
it is active-LOW. (M2)
(a) Determine the input conditions needed to turn on the LED. Then verify that the circuit
operates as a two-way switch using switches A and B. (P2)
(b) Determine the resistor value R connected to the LED (the maximum current is 20mA, the
LED voltage is 2.7V), the output current and voltage of the NOR gate is shown in its data sheet. (M2)
(c) Explain the operation of this circuit Figure 5 in details. (D2)
(d) Simulate this circuit using the software (Proteus). (D2)
(e) Perform the real circuit with testboard and compare it with the simulation result. (D2)
+5 V

+5 V
A

LIGHT
+5 V
B

Figure 5
Latches, Flip-Flops, and Times
23. The waveforms of Figure 7 are connected to the circuit of Figure 6. Assume that Q = 0 initially,
determine the Q waveform. (P2)

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 Figure 6

Figure 7
24. Apply the waveforms of Figure 8 to the FF of Figure 9 and determine the waveform at Q. Repeat for
the FF of Figure 5-20. Assume Q = 0 initially. (M2)

CLK

Figure 8

Figure 9
25. Determine the Q waveform for the FF in Figure 10. Assume that Q = 0 initially, and remember that
the asynchronous inputs override all other inputs. (M2)

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 Figure 10
26. Compare the operation of the D latch with a negative-edge-triggered D flip-flop by applying the
waveforms of Figure 11 to each and determining the Q waveforms. (D2)

D
0

CLK/EN

Q 0

Figure 11

Learning Outcomes and Assessment Criteria

Pass Merit Distinction

LO1 Explain and analyse simple combinational logic D1 Analyse, optimise

Circuits and enhance

P1 Explain and analyse the M1 Analyse and optimise combinational logic

operation of a simple the operation of a circuits, making best

combinational logic circuit, combinational logic circuit use of Truth Table,

making limited use of Truth making good use of Truth Boolean Algebra and

Table, Boolean Algebra and Table, Boolean Algebra and Karnaugh Map.

Karnaugh Map. Karnaugh Map.

LO2 Explain and analyse simple sequential logic circuits D2 Analyse, optimise

P2 Explain and analyse the M2 Analyse and optimise a and enhance a

operation of a simple simple sequential logic sequential logic circuit,

sequential logic circuit, circuit, making use of making use of Timing

making use of Timing Timing Diagrams. Diagrams.

Diagrams.

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 STUDENT ASSESSMENT SUBMISSION AND DECLARATION
When submitting evidence for assessment, each student must sign a declaration confirming that the
work is their own.
Student name: Assessor name:
Assoc. Prof. Dr. Nguyen Thanh Hai

Issue date: Submission date: Submitted on:

26 Jan 2019 9 Mar 2019 (4:00 PM)

Programme:
Pearson BTEC Level 4 HND Diploma in Electrical & Electronic Engineering

Unit 20: Digital Principles

Assignment number and title: Assignment 1

Applying simple combinational and sequential ogic circuits..

Plagiarism
Plagiarism is a particular form of cheating. Plagiarism must be avoided at all costs and students who
break the rules, however innocently, may be penalised. It is your responsibility to ensure that you
understand correct referencing practices. As a university level student, you are expected to use
appropriate references throughout and keep carefully detailed notes of all your sources of materialsfor
material you have used in your work, including any material downloaded from the Internet. Please consult
the relevant unit lecturer or your course tutor if you need any further advice.

Student Declaration
Student declaration
I certify that the assignment submission is entirely my own work and I fully understand the
consequences of plagiarism. I understand that making a false declaration is a form of malpractice.

Student signature: Date:

BTEC HND in Engineering 9

PRESENTATION
1. The assignment should have a cover page that includes the assignment title,
assignment number, course title, module title, Lecturer/tutor name and
student’s name. Attach all the pages of assignment brief/achievement summary with
your report and leave them blank for official use.

2. Ensure that authenticity declaration has been signed.

3. This is an individual assignment.

4. Content sheet with a list of all headings and page numbers.

5. A fully typed up professionally presented report document. Use 12 point Arial or Times
New Roman script.

6. Your assignment should be word-processed and should be minimum 3,000 words in

length.

7. Use the Harvard / IEEE referencing system.

8. Exhibits/appendices are outside this limit.

9. The assignment should contain a list of any references used in the report.

NOTES TO STUDENTS FOR SUBMISSION

 Check carefully the submission date and the instructions given with the assignment. Late
assignments may not be accepted with special approval.
 Ensure that you give yourself enough time to complete the assignment by the due date.
 Do not leave things such as printing to the last minute – excuses of this nature will not
be accepted for failure to hand-in the work on time.
 You must take responsibility for managing your own time effectively.
 If you are unable to hand in your assignment on time and have valid reasons such as
illness, you may apply (in writing) for an extension.
 Failure to achieve a PASS grade will results in a REFERRAL grade being given.
 Take great care that if you use other people’s work or ideas in your assignment, you
properly reference them in your text and any bibliography.
 NOTE: If you are caught plagiarising, the University policies and procedures will
apply.

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Achievement Summary
Assoc. Prof. Dr. Nguyen
Pearson BTEC Level 5 HND Diploma in Assessor Thanh Hai
Qualification
Electrical & Electronic Engineering name

Unit Number Student

and title
Unit 20: Digital Principles name

Criteria To achieve the criteria the evidence must show that the Achieved?
Reference student is able to: (tick)

First IV
Rework
attempt Check
Explain and analyse simple combinational
LO 1 logic
Circuits
Explain and analyse the operation of a simple combinational
P1 logic circuit, making limited use of Truth Table, Boolean Algebra
and Karnaugh Map.
Analyse and optimise the operation of a combinational logic
M1 circuit making good use of Truth Table, Boolean Algebra and
Karnaugh Map.

Analyse, optimise and enhance combinational logic circuits,

D1 making best use of Truth Table, Boolean Algebra and Karnaugh
Map

Explain and analyse simple sequential logic

LO 2 circuits

Explain and analyse the operation of a simple sequential logic

P2 circuit, making use of Timing Diagrams

Analyse and optimise a simple sequential logic circuit, making

M2 use of Timing Diagrams.

Analyse, optimise and enhance a sequential logic circuit,

D2
making use of Timing Diagrams.

BTEC HND in Engineering 11

Higher Nationals - Summative Assignment Feedback Form

Student Name/ID
Unit Title Unit 20: Digital Principles

Assignment Number Assignment 1 Assessor Assoc. Prof. Dr. Nguyen Thanh Hai

Date Received
Submission Date
1st submission
Date Received 2nd
Re-submission Date
submission
Assessor Feedback:

Grade: Assessor Signature: Date:

Resubmission Feedback:

Grade: Assessor Signature: Date:

Internal Verifier’s Comments:

IV Signature & Date:

* Please note that grade decisions are provisional. They are only confirmed once internal and external
moderation has taken place and grades decisions have been agreed at the assessment board.

BTEC HND in Engineering 12