19-1559; Rev 0; 10/99

Low-Power, 12-Bit Voltage-Output DAC

with Serial Interface
__________________General Description Features

MAX5302
The MAX5302 combines a low-power, voltage-output, ♦ 12-Bit DAC with Configurable Output Amplifier
12-bit digital-to-analog converter (DAC) and a precision ♦ +5V Single-Supply Operation
output amplifier in an 8-pin µMAX package. It operates
from a single +5V supply, drawing less than 280µA of ♦ Low Supply Current: 0.28mA Normal Operation
supply current. 2µA Shutdown Mode
The output amplifier’s inverting input is available to the ♦ Available in 8-Pin µMAX
user, allowing specific gain configurations, remote sens- ♦ Power-On Reset Clears DAC Output to Zero
ing, and high output current capability. This makes the
MAX5302 ideal for a wide range of applications, includ- ♦ SPI/QSPI/MICROWIRE Compatible
ing industrial process control. Other features include a ♦ Schmitt-Trigger Digital Inputs for Direct
software shutdown and power-on reset. Optocoupler Interface
The serial interface is SPI™/QSPI™/MICROWIRE™ com-
patible. The DAC has a double-buffered input, organized
as an input register followed by a DAC register. A 16-bit
serial word loads data into the input register. The DAC
register can be updated independently or simultaneously
with the input register. All logic inputs are TTL/CMOS-
logic compatible and buffered with Schmitt triggers to
allow direct interfacing to optocouplers. Ordering Information
PART TEMP. RANGE PIN-PACKAGE
Applications
MAX5302CUA 0°C to +70°C 8 µMAX
Industrial Process Control
MAX5302EUA -40°C to +85°C 8 µMAX
Automatic Test Equipment
Digital Offset and Gain Adjustment
Motion Control
Remote Industrial Control
Microprocessor-Controlled Systems

Functional Diagram Pin Configuration

GND VDD REF TOP VIEW

FB

OUT
DAC
DAC OUT 1 8 VDD
REGISTER
CONTROL
CS 2 7 GND
MAX5302
INPUT
REGISTER DIN 3 6 REF

SCLK 4 5 FB
CS
16-BIT MAX5302
DIN SHIFT
REGISTER
µMAX
SCLK

SPI and QSPI are trademarks of Motorola, Inc.

MICROWIRE is a trademark of National Semiconductor Corp.

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For small orders, phone 1-800-835-8769.
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
ABSOLUTE MAXIMUM RATINGS
MAX5302

VDD to GND ..............................................................-0.3V to +6V Operating Temperature Ranges

REF, OUT, FB to GND ................................-0.3V to (VDD + 0.3V) MAX5302CUA ...................................................0°C to +70°C
Digital Inputs to GND ...............................................-0.3V to +6V MAX5302EUA ................................................-40°C to +85°C
Continuous Current into Any Pin.......................................±20mA Junction Temperature ......................................................+150°C
Continuous Power Dissipation (TA = +70°C) Storage Temperature Range .............................-65°C to +150°C
8-Pin µMAX (derate 4.10mW/°C above +70°C) .........330mW Lead Temperature (soldering, 10sec) .............................+300°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
(Circuit of Figure 8, VDD = +5V ±10%, VREF = +2.5V, RL = 5kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical val-
ues are at TA = +25°C. Output buffer connected in unity-gain configuration.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
STATIC PERFORMANCE—ANALOG SECTION
Resolution N 12 Bits
Differential Nonlinearity DNL Guaranteed monotonic ±1.0 LSB
Integral Nonlinearity (Note 1) INL ±4 LSB
Offset Error VOS ±0.3 ±8 mV
Offset-Error Tempco TCVOS 6 ppm/°C
Gain Error (Note 1) GE -0.3 ±3 LSB
Gain-Error Tempco 1 ppm/°C
Power-Supply Rejection Ratio PSRR 4.5V ≤ VDD ≤ 5.5V 800 µV/V
REFERENCE INPUT
Reference Input Range VREF 0 VDD - 1.4 V
Reference Input Resistance RREF Code dependent, minimum at code 1554 hex 14 20 kΩ
MULTIPLYING-MODE PERFORMANCE
Reference -3dB Bandwidth VREF = 0.67Vp-p 650 kHz
Reference Feedthrough Input code = all 0s, VREF = 3.6Vp-p at 1kHz -84 dB
Signal-to-Noise Plus
SINAD VREF = 1Vp-p at 25kHz, code = full scale 77 dB
Distortion Ratio
DIGITAL INPUTS
Input Voltage High VIH 2.4 V
Input Voltage Low VIL 0.8 V
Input Leakage Current IIN VIN = 0 or VDD 0.001 ±0.5 µA
Input Capacitance CIN 8 pF

2 _______________________________________________________________________________________
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
ELECTRICAL CHARACTERISTICS (continued)

MAX5302
(Circuit of Figure 8, VDD = +5V ±10%, VREF = +2.5V, RL = 5kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical val-
ues are at TA = +25°C. Output buffer connected in unity-gain configuration.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL INPUTS
DYNAMIC PERFORMANCE
Voltage Output Slew Rate SR 0.6 V/µs
Output Settling Time To ±1/2LSB, VSTEP = 2.5V 14 µs
Output Voltage Swing Rail-to-rail (Note 2) 0 to VDD V
Current into FB 0.001 ±0.1 µA
Start-Up Time 20 µs
Digital Feedthrough CS = VDD, DIN = 100kHz 5 nVs
POWER SUPPLIES
Supply Voltage VDD 4.5 5.5 V
Supply Current IDD (Note 3) 0.28 0.4 mA
Supply Current in Shutdown (Note 3) 4 20 µA
Reference Current in Shutdown 0.001 ±0.5 µA
TIMING CHARACTERISTICS (Figure 6)
SCLK Clock Period tCP 100 ns
SCLK Pulse Width High tCH 40 ns
SCLK Pulse Width Low tCL 40 ns
CS Fall to SCLK Rise Setup Time tCSS 40 ns
SCLK Rise to CS Rise Hold Time tCSH 0 ns
DIN Setup Time tDS 40 ns
DIN Hold Time tDH 0 ns
SCLK Rise to CS Fall Delay tCS0 40 ns
CS Rise to SCLK Rise Hold Time tCS1 40 ns
CS Pulse Width High tCSW 100 ns

Note 1: Guaranteed from code 11 to code 4095 in unity-gain configuration.

Note 2: Accuracy is better than 1LSB for VOUT = 8mV to (VDD - 100mV), guaranteed by a power-supply rejection test at the end
points.
Note 3: RL = ∞, digital inputs at GND or VDD.

_______________________________________________________________________________________ 3
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
MAX5302

__________________________________________Typical Operating Characteristics

(VDD = +5V, RL = 5kΩ, CL = 100pF, TA = +25°C, unless otherwise noted.)

INTEGRAL NONLINEARITY REFERENCE VOLTAGE INPUT SUPPLY CURRENT

vs. REFERENCE VOLTAGE FREQUENCY RESPONSE vs. TEMPERATURE
0.3 0 400
MAX5302 toc01

MAX5302 toc03
MAX5302 toc02
RL = ∞
0.2 380
-4 360
0.1

SUPPLY CURRENT (µA)

340
RELATIVE OUTPUT (dB)

0
-8 320
INL (LSB)

-0.1 300

-0.2 -12 280

260
-0.3
-16 240
-0.4
220
-0.5 -20 200
0.4 1.2 2.0 2.8 3.6 4.4 0 500k 1M 1.5M 2M 2.5M 3M -60 -20 20 60 100 140
REFERENCE VOLTAGE (V) FREQUENCY (Hz) TEMPERATURE (°C)

POWER-DOWN SUPPLY CURRENT SUPPLY CURRENT TOTAL HARMONIC DISTORTION

vs. TEMPERATURE vs. SUPPLY VOLTAGE PLUS NOISE vs. FREQUENCY
10 500 -50
MAX5302 toc05
MAX5302 toc04

MAX5302 toc06
9 450 VREF = 2.5VDC + 1Vp-p SINE
-55
POWER-DOWN SUPPLY CURRENT (µA)

CODE = FULL SCALE

8 400
-60
SUPPLY CURRENT (µA)

7 350
THD + NOISE (dB)

6 300 -65

5 250 -70
4 200
-75
3 150
-80
2 100

1 50 -85

0 0 -90
-60 -20 20 60 100 140 4.0 4.4 4.8 5.2 5.6 6.0 1 10 100
SUPPLY VOLTAGE (V) FREQUENCY (kHz)
TEMPERATURE (°C)

REFERENCE FEEDTHROUGH
OUTPUT FFT PLOT FULL-SCALE OUTPUT vs. LOAD AT 1kHz
0 2.49980 0
MAX5302 toc07

MAX5302-09a/09b
MAX5302 toc08

VREF = 3.6Vp-p
REFERENCE INPUT SIGNAL
CODE = FULL SCALE
fIN = 1kHz 2.49976
-20 -20
FULL-SCALE OUTPUT (V)
SIGNAL AMPLITUDE (dB)

SIGNAL AMPLITUDE (dB)

2.49972
-40 -40
2.49968
-60 -60
2.49964
OUTPUT FEEDTHROUGH
-80 -80
2.49960

-100 2.49956 -100

0.5 1.6 2.7 3.8 4.9 6.0 0.1k 1k 10k 100k 1M 0.5 1.6 2.7 3.8 4.9 6.0
FREQUENCY (kHz) LOAD (Ω) FREQUENCY (kHz)

4 _______________________________________________________________________________________
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
Typical Operating Characteristics (continued)

MAX5302
(VDD = +5V, RL = 5kΩ, CL = 100pF, TA = +25°C, unless otherwise noted.)

MAJOR-CARRY TRANSITION DIGITAL FEEDTHROUGH (fSCLK = 100kHz)

MAX5302 toc10

MAX5302 toc11
CS SCLK
5V/div 2V/div

OUT OUT
AC-COUPLED AC-COUPLED
100mV/div 10mV/div
CODE = 2048

10µs/div 2µs/div
CS = 5V

DYNAMIC RESPONSE
MAX5302 toc12

OUT
1V/div

GND

10µs/div

GAIN = 2, SWITCHING FROM CODE 0 TO 4020

_______________________________________________________________________________________ 5
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
_____________________Pin Description
MAX5302

FB

PIN NAME FUNCTION

R R R OUT
1 OUT DAC Output Voltage

2 CS Chip-Select Input. Active low. 2R 2R 2R 2R 2R

3 DIN Serial-Data Input MSB

4 SCLK Serial-Clock Input

REF
5 FB DAC Output Amplifier Feedback
AGND
6 REF Reference Voltage Input
7 GND Ground SHOWN FOR ALL 1s ON DAC

8 VDD Positive Power Supply Figure 1. Simplified DAC Circuit Diagram

Detailed Description In shutdown mode, the MAX5302’s REF input enters a

high-impedance state with a typical input leakage current
The MAX5302 contains a voltage-output digital-to-analog
of 0.001µA.
converter (DAC) that is easily addressed using a simple
3-wire serial interface. The IC includes a 16-bit shift The reference input capacitance is also code dependent
register, and has a double-buffered input composed of and typically ranges from 15pF (with an input code of
an input register and a DAC register (see Functional all 0s) to 50pF (at full scale).
Diagram). In addition to the voltage output, the amplifier’s The MAX873 +2.5V reference is recommended for the
negative input is available to the user. MAX5302.
The DAC is an inverted R-2R ladder network that converts
Output Amplifier
a digital input (12 data bits plus 1 sub-bit) into an
The MAX5302’s DAC output is internally buffered by a
equivalent analog output voltage in proportion to the
precision amplifier with a typical slew rate of 0.6V/µs.
applied reference voltage. Figure 1 shows a simplified
Access to the output amplifier’s inverting input provides
circuit diagram of the DAC.
the user greater flexibility in output gain setting/signal
Reference Inputs conditioning (see the Applications Information section).
The reference input accepts positive DC and AC signals. With a full-scale transition at the MAX5302 output, the
The voltage at the reference input sets the full-scale out- typical settling time to ±1/2LSB is 14µs when loaded
put voltage for the DAC. The reference input voltage with 5kΩ in parallel with 100pF (loads less than 2kΩ
range is 0 to (VDD - 1.4V). The output voltage (VOUT) is degrade performance).
represented by a digitally programmable voltage
The amplifier’s output dynamic responses and settling
source, as expressed in the following equation:
performances are shown in the Typical Operating Char-
acteristics.
VOUT = (VREF · NB / 4096) Gain
Shutdown Mode
where NB is the numeric value of the DAC’s binary The MAX5302 features a software-programmable shut-
input code (0 to 4095), VREF is the reference voltage, down that reduces supply current to a typical value of
and Gain is the externally set voltage gain. 4µA. Writing 111X XXXX XXXX XXXX as the input control
word puts the device in shutdown mode (Table 1).
The impedance at the reference input is code dependent,
ranging from a low value of 14kΩ when the DAC has an In shutdown mode, the amplifier’s output and the refer-
input code of 1554 hex, to a high value exceeding several ence input enter a high-impedance state. The serial
gigaohms (leakage currents) with an input code of interface remains active. Data in the input registers is
0000 hex. Because the input impedance at the reference retained in shutdown, allowing the MAX5302 to recall
pin is code dependent, load regulation of the reference the output state prior to entering shutdown. Exit shutdown
source is important. mode by either recalling the previous configuration or

6 _______________________________________________________________________________________
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
by updating the DAC with new data. When powering up

MAX5302
the device or bringing it out of shutdown, allow 20µs for
the output to stabilize.
SCLK SK
Serial-Interface Configurations
The MAX5302’s 3-wire serial interface is compatible
MICROWIRE with both MICROWIRE (Figure 2) and SPI/QSPI (Figure 3).
MAX5302 PORT The serial-input word consists of 3 control bits followed
DIN SO
by 12+1 data bits (MSB first), as shown in Figure 4. The
3-bit control code determines the MAX5302’s response
outlined in Table 1.
CS I/O
The MAX5302’s digital inputs are double buffered.
Depending on the command issued through the serial
interface, the input register can be loaded without
Figure 2. Connections for MICROWIRE affecting the DAC register, the DAC register can be
loaded directly, or the DAC register can be updated
from the input register (Table 1).

+5V Serial-Interface Description

The MAX5302 requires 16 bits of serial data. Table 1 lists
the serial-interface programming commands. For certain
commands, the 12+1 data bits are “don’t cares.” Data is
sent MSB first and can be sent in two 8-bit packets or
SS one 16-bit word (CS must remain low until 16 bits are
transferred). The serial data is composed of 3 control
DIN MOSI

SPI/QSPI MSB ..................................................................................LSB

MAX5302 SCLK SCK
PORT
16 Bits of Serial Data
Control Data Bits
CS I/O Bits MSB ................................LSB Sub-Bit
C2 C1 C0 D11 .....................................D0, S0
CPOL = 0, CPHA = 0 3 Control
12+1 Data Bits
Bits

Figure 3. Connections for SPI/QSPI Figure 4. Serial-Data Format

Table 1. Serial-Interface Programming Commands

16-BIT SERIAL WORD S0
D11...............D0 FUNCTION
C2 C1 C0 S0
MSB LSB
X 0 0 12 bits of data 0 Load input register; DAC register immediately updated (also exit shutdown).
X 0 1 12 bits of data 0 Load input register; DAC register unchanged.
Update DAC register from input register (also exit shutdown; recall previ-
X 1 0 XXXXXXXXXXXX X
ous state).
1 1 1 XXXXXXXXXXXX X Shutdown
0 1 1 XXXXXXXXXXXX X No operation (NOP)

X = Don’t care

_______________________________________________________________________________________ 7
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
MAX5302

CS

COMMAND
EXECUTED
SCLK
1 8 9 16

DIN C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 S0

Figure 5. Serial-Interface Timing Diagram

CS tCSW

tCSS tCH tCP tCSH

tCSO tCL tCS1

SCLK
tDS
tDH

DIN

Figure 6. Detailed Serial-Interface Timing Diagram

DIN

SCLK

CS1

CS2 TO OTHER
SERIAL DEVICES
CS3

CS CS CS

MAX5302 MAX5302 MAX5302

SCLK SCLK SCLK

DIN DIN DIN

Figure 7. Multiple MAX5302s Sharing Common DIN and SCLK Lines

8 _______________________________________________________________________________________
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
bits (C2, C1, C0), followed by the 12+1 data bits Figure 9 illustrates a Rail-to-Rail® output. This circuit

MAX5302
D11...D0, S0 (Figure 4). Set the sub-bit (S0) to zero. shows the MAX5302 with the output amplifier configured
The 3-bit control code determines the register to be with a closed-loop gain of +2 to provide a 0V to 5V full-
updated and the configuration when exiting shutdown. scale range when a 2.5V reference is used.
Figures 5 and 6 show the serial-interface timing require- Bipolar Output
ments. The chip-select (CS) pin must be low to enable The MAX5302 output can be configured for bipolar
the DAC’s serial interface. When CS is high, the inter- operation using Figure 10’s circuit according to the fol-
face control circuitry is disabled. CS must go low at lowing equation:
least tCSS before the rising serial-clock (SCLK) edge to
properly clock in the first bit. When CS is low, data is VOUT = VREF [(2NB / 4096) - 1]
clocked into the internal shift register through the serial-
data input pin (DIN) on SCLK’s rising edge. The maxi- where NB is the numeric value of the DAC’s binary
mum guaranteed clock frequency is 10MHz. Data is input code. Table 3 shows digital codes (offset binary)
latched into the MAX5302 input/DAC register on CS’s and the corresponding output voltage for Figure 10’s
rising edge. circuit.
Figure 7 shows a method of connecting several Using an AC Reference
MAX5302s. In this configuration, the clock and the data In applications where the reference has AC-signal com-
bus are common to all devices, and separate chip-select ponents, the MAX5302 has multiplying capability within
lines are used for each IC. the reference input range specifications. Figure 11
shows a technique for applying a sine-wave signal to
Applications Information the reference input where the AC signal is offset before
Unipolar Output being applied to REF. The reference voltage must
For a unipolar output, the output voltage and the refer- never be more negative than GND.
ence input have the same polarity. Figure 8 shows the The MAX5302’s total harmonic distortion plus noise
MAX5302 unipolar output circuit, which is also the typical (THD+N) is typically less than -77dB (full-scale code),
operating circuit. Table 2 lists the unipolar output given a 1Vp-p signal swing and input frequencies up to
codes. 25kHz. The typical -3dB frequency is 650kHz, as shown
in the Typical Operating Characteristics graphs.

Table 2. Unipolar Code Table

DAC CONTENTS
ANALOG OUTPUT
MSB LSB
+5V
 4095 
REF 1111 1111 1111 (0) +VREF  
 4096 
VDD
FB  2049 
MAX5302 1000 0000 0001 (0) +VREF  
 4096 
DAC  2048  + VREF
OUT 1000 0000 0000 (0) +VREF   =
 4096  2

GND  2047 
0111 1111 1111 (0) +VREF  
 4096 

 1 
0000 0000 0001 (0) +VREF  
 4096 

0000 0000 0000 (0) 0V

Figure 8. Unipolar Output Circuit Note: ( ) are for sub-bit.

Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.

_______________________________________________________________________________________ 9
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
MAX5302

R1 R2
REF
+5V +5V
REF
VDD
VDD 10k V+
FB
FB
MAX5302
10k VOUT
DAC DAC
OUT OUT
V-
GND
MAX5302
GND

R1 = R2 = 10kΩ ±0.1%

Figure 9. Unipolar Rail-to-Rail Output Circuit Figure 10. Bipolar Output Circuit

Digitally Programmable Current Source Table 3. Bipolar Code Table

The circuit of Figure 12 places an NPN transistor (2N3904
or similar) within the op amp feedback loop to implement DAC CONTENTS
a digitally programmable, unidirectional current source. ANALOG OUTPUT
MSB LSB
The output current is calculated with the following
equation:  2047 
1 1 1 1 1 1 1 1 11 1 1 ( 0 ) +VREF  
 2048 
IOUT = (VREF / R) (NB / 4096)
 1 
where NB is the numeric value of the DAC’s binary input 1 0 0 0 0 0 0 0 00 0 1 ( 0 ) +VREF  
 2048 
code, and R is the sense resistor shown in Figure 12.
1 0 0 0 0 0 0 0 00 0 0 ( 0 ) 0V
Power-Supply Considerations
On power-up, the input and DAC registers are cleared  1 
0 1 1 1 1 1 1 1 11 1 1 ( 0 ) -VREF  
(set to zero code).  2048 
For rated MAX5302 performance, VREF must be at least
 2047 
1.4V below VDD. Bypass VDD with a 4.7µF capacitor in 0 0 0 0 0 0 0 0 00 0 1 ( 0 ) -VREF  
 2048 
parallel with a 0.1µF capacitor to GND. Use short lead
lengths and place the bypass capacitors as close to  2048 
the supply pins as possible. 0 0 0 0 0 0 0 0 00 0 0 ( 0 ) -VREF   = - VREF
 2048 
Grounding and Layout Considerations Note: ( ) are for sub-bit.
Digital or AC transient signals on GND can create noise
at the analog output. Connect GND to the highest-quality
ground available.
Good PC board ground layout minimizes crosstalk
between the DAC output, reference input, and digital
input. Reduce crosstalk by keeping analog lines away
from digital lines. Wire-wrapped boards are not recom-
mended.

10 ______________________________________________________________________________________
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface

MAX5302
+5V
+5V
26k MAX495 +5V REF
AC
REFERENCE
INPUT VDD
VL
MAX5302
IOUT
DAC
10k
500mVp-p REF VDD OUT
2N3904

DAC FB
OUT

GND
R
MAX5302
GND

Figure 11. AC Reference Input Circuit Figure 12. Digitally Programmable Current Source

Chip Information
TRANSISTOR COUNT: 3053
SUBSTRATE CONNECTED TO AGND

______________________________________________________________________________________ 11
 Low-Power, 12-Bit Voltage-Output DAC
with Serial Interface
Package Information
MAX5302

8LUMAXD.EPS

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

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