Vlsi&Es Syllabus
Vlsi&Es Syllabus
Vlsi&Es Syllabus
COURSE STRUCTURE
For
II Semester
IV Semester
Faults classes and models, fault diagnosis and testing, fault detection test, test generation, testing
process, obtaining a minimal complete test set, circuit under test methods- Path sensitization
method, Boolean difference method, properties of Boolean differences, Kohavi algorithm, faults
in PLAs, DFT schemes, built in self-test.
Fault detection and location in sequential circuits, circuit test approach, initial state
identification, Haming experiments, synchronizing experiments, machine identification,
distinguishing experiment, adaptive distinguishing experiments.
TEXT BOOKS:
REFERENCE BOOKS:
1. Fundamentals of Logic Design – Charles H. Roth, 5th Ed., Cengage Learning.
2. Digital Systems Testing and Testable Design – MironAbramovici, Melvin A.
Breuer and Arthur D. Friedman- John Wiley & Sons Inc.
L P C
I Year I Semester
4 0 3
UNIT-I:
VLSI Technology: Fundamentals and applications, IC production process, semiconductor
processes, design rules and process parameters, layout techniques and process parameters.
VLSI Design: Electronic design automation concept, ASIC and FPGA design flows, SOC
designs, design technologies: combinational design techniques, sequential design techniques,
state machine logic design techniques and design issues.
UNIT-II:
CMOS VLSI Design: MOSTechnology and fabrication process of pMOS, nMOS, CMOS and
BiCMOS technologies, comparison of different processes.
VLSI Design Issues: Design process, design for testability, technology options, power
calculations, package selection, clock mechanisms, mixed signal design.
UNIT-III:
Basic electrical properties of MOS and BiCMOS circuits, MOS and BiCMOS circuit design
processes, Basic circuit concepts, scaling of MOS circuits-qualitatitive and quantitative analysis
with proper illustrations and necessary derivations of expressions.
UNIT-IV:
Subsystem Design and Layout: Some architectural issues, switch logic, gate logic, examples of
structured design (combinational logic), some clocked sequential circuits, other system
considerations.
TEXT BOOKS:
1. Essentials of VLSI Circuits and Systems, K. Eshraghian, Douglas A. Pucknell,
SholehEshraghian, 2005, PHI Publications.
2. Modern VLSI Design-Wayne Wolf, 3rd Ed., 1997, Pearson Education.
3. VLSI Design-Dr.K.V.K.K.Prasad, KattulaShyamala, Kogent Learning Solutions Inc.,
2012.
REFERENCE BOOKS:
1. VLSI Design Technologies for Analog and Digital Circuits, Randall L.Geiger, Phillip
E.Allen, Noel R.Strader, TMH Publications, 2010.
2. Introduction to VLSI Systems: A Logic, Circuit and System Perspective- Ming-BO Lin,
CRC Press, 2011.
3. Principals of CMOS VLSI Design-N.H.E Weste, K. Eshraghian, 2nd Edition, Addison
Wesley.
L P C
I Year I Semester
4 0 3
The MOS Transistor, Passive Components- Capacitor & Resistor, Integrated circuit Layout,
CMOS Device Modeling - Simple MOS Large-Signal Model, Other Model Parameters, Small-
Signal Model for the MOS Transistor, Computer Simulation Models, Sub-threshold MOS
Model.
MOS Switch, MOS Diode, MOS Active Resistor, Current Sinks and Sources, Current Mirrors-
Current mirror with Beta Helper, Degeneration, Cascode current Mirror and Wilson Current
Mirror, Current and Voltage References, Band gap Reference.
TEXT BOOKS:
1. CMOS Analog Circuit Design - Philip E. Allen and Douglas R. Holberg, Oxford
University Press, International Second Edition/Indian Edition, 2010.
2. Analysis and Design of Analog Integrated Circuits- Paul R. Gray, Paul J. Hurst, S. Lewis
and R. G. Meyer, Wiley India, Fifth Edition, 2010.
REFERENCE BOOKS:
1. Analog Integrated Circuit Design- David A.Johns, Ken Martin, Wiley Student Edn, 2016.
2. Design of Analog CMOS Integrated Circuits- BehzadRazavi, TMH Edition.
3. CMOS: Circuit Design, Layout and Simulation- Baker, Li and Boyce, PHI.
L P C
I Year I Semester
4 0 3
UNIT-I:
Hardware software synthesis algorithms: hardware – software partitioning distributed system co-
synthesis.
UNIT-II:
Target Architectures
UNIT-III:
UNIT-IV:
System-level specification, design representation for system level synthesis, system level
specification languages.
Heterogeneous specifications and multi language co-simulation, the cosyma system and lycos
system.
TEXT BOOKS:
1. Hardware / Software Co- Design Principles and Practice – Jorgen Staunstrup, Wayne
Wolf – 2009, Springer.
2. Hardware / Software Co- Design - Giovanni De Micheli, Mariagiovanna Sami, 2002,
Kluwer Academic Publishers.
REFERENCE BOOKS:
(ELECTIVE -I)
UNIT-I:
Introduction, Basic techniques for reading from port pins, Example: Reading and writing bytes,
Example: Reading and writing bits (simple version), Example: Reading and writing bits (generic
version), The need for pull-up resistors, Dealing with switch bounce, Example: Reading switch
inputs (basic code), Example: Counting goats, Conclusions
Introduction, Object-oriented programming with C, The Project Header (MAIN.H), The Port
Header (PORT.H), Example: Restructuring the ‘Hello Embedded World’ example, Example:
Restructuring the goat-counting example, Further examples, Conclusions
Introduction, Creating ‘hardware delays’ using Timer 0 and Timer 1, Example: Generating a
precise 50 ms delay, Example: Creating a portable hardware delay, Why not use Timer 2?, The
need for ‘timeout’ mechanisms, Creating loop timeouts, Example: Testing loop timeouts,
Example: A more reliable switch interface, Creating hardware timeouts, Example: Testing a
hardware timeout, Conclusions
REFERENCE BOOKS:
1. PIC MCU C-An introduction to programming, The Microchip PIC in CCS C - Nigel
Gardner.
L P C
I Year I Semester
4 0 3
CMOS DIGITAL IC DESIGN
(ELECTIVE -I)
Pseudo NMOS Logic – Inverter, Inverter threshold voltage, Output high voltage, Output Low
voltage, Gain at gate threshold voltage, Transient response, Rise time, Fall time, Pseudo NMOS
logic gates, Transistor equivalency, CMOS Inverter logic.
MOS logic circuits with NMOS loads, Primitive CMOS logic gates – NOR & NAND gate,
Complex Logic circuits design – Realizing Boolean expressions using NMOS gates and CMOS
gates , AOI and OIA gates, CMOS full adder, CMOS transmission gates, Designing with
Transmission gates.
Behaviour of bistable elements, SR Latch, Clocked latch and flip flop circuits, CMOS D latch
and edge triggered flip-flop.
Basic principle, Voltage Bootstrapping, Synchronous dynamic pass transistor circuits, Dynamic
CMOS transmission gate logic, High performance Dynamic CMOS circuits.
Types, RAM array organization, DRAM – Types, Operation, Leakage currents in DRAM cell
and refresh operation, SRAM operation Leakage currents in SRAM cells, Flash Memory- NOR
flash and NAND flash.
TEXT BOOKS:
1. Digital Integrated Circuit Design – Ken Martin, Oxford University Press, 2011.
2. CMOS Digital Integrated Circuits Analysis and Design – Sung-Mo Kang, Yusuf Leblebici,
TMH, 3rd Ed., 2011.
REFERENCE BOOKS:
1. Introduction to VLSI Systems: A Logic, Circuit and System Perspective – Ming-BO Lin,
CRC Press, 2011
2. Digital Integrated Circuits – A Design Perspective, Jan M. Rabaey, AnanthaChandrakasan,
BorivojeNikolic, 2nd Ed., PHI.
L P C
I Year I Semester
4 0 3
SOFT COMPUTING TECHNIQUES
(ELECTIVE -I)
UNIT –I:
Introduction:
UNIT –II:
Concept of Artificial Neural Networks and its basic mathematical model, McCulloch-Pitts
neuron model, simple perceptron, Adaline and Madaline, Feed-forward Multilayer Perceptron,
Learning and Training the neural network, Data Processing: Scaling, Fourier transformation,
principal-component analysis and wavelet transformations, Hopfield network, Self-organizing
network and Recurrent network, Neural Network based controller.
UNIT –III:
Introduction to crisp sets and fuzzy sets, basic fuzzy set operation and approximate reasoning,
Introduction to fuzzy logic modeling and control, Fuzzification, inferencing and defuzzification,
Fuzzy knowledge and rule bases, Fuzzy modeling and control schemes for nonlinear systems,
Self-organizing fuzzy logic control, Fuzzy logic control for nonlinear time delay system.
UNIT –IV:
Genetic Algorithm:
Basic concept of Genetic algorithm and detail algorithmic steps, Adjustment of free parameters,
Solution of typical control problems using genetic algorithm, Concept on some other search
techniques like Tabu search and anD-colony search techniques for solving optimization
problems.
UNIT –V:
Applications:
GA application to power system optimisation problem, Case studies: Identification and control
of linear and nonlinear dynamic systems using MATLAB-Neural Network toolbox, Stability
analysis of Neural-Network interconnection systems, Implementation of fuzzy logic controller
using MATLAB fuzzy-logic toolbox, Stability analysis of fuzzy control systems.
TEXT BOOKS:
REFERENCE BOOKS:
1. Fuzzy Sets, Uncertainty and Information - Klir G.J. &Folger T.A., Prentice-Hall of India
Pvt. Ltd., 1993.
2. Fuzzy Set Theory and Its Applications - Zimmerman H.J. Kluwer Academic Publishers,
1994.
3. Introduction to Fuzzy Control - Driankov, Hellendroon, Narosa Publishers.
4. Artificial Neural Networks - Dr. B. Yagananarayana, 1999, PHI, New Delhi.
5. Elements of Artificial Neural Networks - KishanMehrotra, Chelkuri K. Mohan,
Sanjay Ranka, Penram International.
6. Artificial Neural Network –Simon Haykin, 2nd Ed., Pearson Education.
7. Introduction Neural Networks Using MATLAB 6.0 - S.N. Shivanandam, S. Sumati, S. N.
Deepa,1/e, TMH, New Delhi.
L P C
I Year I Semester
4 0 3
CYBER SECURITY
(ELECTIVE -I)
L P C
I Year I Semester
4 0 3
Overview of computer system hardware, Instruction execution, I/O function, Interrupts, Memory
hierarchy, I/O Communication techniques, Operating system objectives and functions,
Evaluation of operating System
Basic Commands & Command Arguments, Standard Input, Output, Input / Output Redirection,
Filters and Editors, Shells and Operations
UNIT –III:
System Calls:System calls and related file structures, Input / Output, Process creation &
termination.
Inter Process Communication:Introduction, File and record locking, Client – Server example,
Pipes, FIFOs, Streams & Messages, Name Spaces, Systems V IPC, Message queues,
Semaphores, Shared Memory, Sockets & TLI.
UNIT –IV:
Layered protocols, ATM networks, Client - Server model, Remote procedure call and Group
communication.
UNIT –V:
Clock synchronization, Mutual exclusion, E-tech algorithms, Bully algorithm, Ring algorithm,
Atomic transactions
Deadlocks:
Dead lock in distributed systems, Distributed dead lock prevention and distributed dead
lock detection.
TEXT BOOKS:
1. The Design of the UNIX Operating Systems – Maurice J. Bach, 1986, PHI.
2. Distributed Operating System - Andrew. S. Tanenbaum, 1994, PHI.
3. The Complete Reference LINUX – Richard Peterson, 4th Ed., McGraw – Hill.
REFERENCE BOOKS:
1. Operating Systems: Internal and Design Principles - Stallings, 6th Ed., PE.
2. Modern Operating Systems - Andrew S Tanenbaum, 3rd Ed., PE.
3. Operating System Principles - Abraham Silberchatz, Peter B. Galvin, Greg Gagne, 7th
Ed., John Wiley
4. UNIX User Guide – Ritchie & Yates.
5. UNIX Network Programming - W.Richard Stevens, 1998, PHI.
L P C
I Year I Semester
4 0 3
UNIT-II: Processors
Introduction , Processor Selection for SOC, Basic concepts in Processor Architecture, Basic
concepts in Processor Micro Architecture, Basic elements in Instruction handling. Buffers:
minimizing Pipeline Delays, Branches, More Robust Processors, Vector Processors and Vector
Instructions extensions, VLIW Processors, Superscalar Processors.
TEXT BOOKS:
1. Computer System Design System-on-Chip - Michael J. Flynn and Wayne Luk, Wiely
India Pvt. Ltd.
2. ARM System on Chip Architecture – Steve Furber –2nd Ed., 2000, Addison Wesley
Professional.
REFERENCE BOOKS:
1. Design of System on a Chip: Devices and Components – Ricardo Reis, 1st Ed., 2004,
Springer
2. Co-Verification of Hardware and Software for ARM System on Chip Design (Embedded
Technology) – Jason Andrews – Newnes, BK and CDROM.
3. System on Chip Verification – Methodologies and Techniques –PrakashRashinkar, Peter
Paterson and Leena Singh L, 2001, Kluwer Academic Publishers.
L P C
I Year I Semester
4 0 3
UNIT-II:
Modern Techniques:
Simplified DES, Block Cipher Principles, Data Encryption standard, Strength of DES,
Differential and Linear Cryptanalysis, Block Cipher Design Principles and Modes of operations.
Algorithms:
Triple DES, International Data Encryption algorithm, Blowfish, RC5, CAST-128, RC2,
Characteristics of Advanced Symmetric block cifers.
Conventional Encryption:
Principles, RSA Algorithm, Key Management, Diffie-Hellman Key exchange, Elliptic Curve
Cryptography.
UNIT-III:
Number Theory:
Prime and Relatively prime numbers, Modular arithmetic, Fermat’s and Euler’s theorems,
Testing for primality, Euclid’s Algorithm, the Chinese remainder theorem, Discrete logarithms.
UNIT-V:
IP Security: Overview, Architecture, Authentication, Encapsulating Security Payload,
Combining security Associations, Key Management.
Web Security: Web Security requirements, Secure sockets layer and Transport layer security,
Secure Electronic Transaction.
TEXT BOOKS:
1. Cryptography and Network Security: Principles and Practice - William Stallings, 2000, PE.
REFERENCE BOOKS:
• The students are required to design the logic circuit to perform the following
experiments using necessary simulator (Xilinx ISE Simulator/ Mentor Graphics
Questa Simulator) to verify the logical /functional operation and to perform the
analysis with appropriate synthesizer (Xilinx ISE Synthesizer/Mentor Graphics
Precision RTL) and then verify the implemented logic with different hardware
modules/kits (CPLD/FPGA kits).
• The students are required to acquire the knowledge in both the Platforms (Xilinx
and Mentor graphics) by perform at least SIX experiments on each Platform.
List of Experiments:
2. Parity Encoder.
3. Random Counter
4. Synchronous RAM.
5. ALU.
6. UART Model.
• The students are required to design and implement the Layout of the following
experiments of any FOUR using CMOS 130nm Technology withMentor Graphics
Tool.
List of Experiments:
1. Inverter Characteristics.
2. Full Adder.
3. RS-Latch, D-Latch and Clock Divider.
4. Synchronous Counter and Asynchronous Counter.
5. Static and Dynamic RAM.
6. ROM
7. Digital-to-Analog-Converter.
8. Analog-to-Digital Converter.
Lab Requirements:
Software:Xilinx ISE Suite 13.2 Version, Mentor Graphics-Questa Simulator, Mentor Graphics-
Precision RTL, Mentor Graphics Back End/Tanner Software tool.
UNIT-I: Introduction
Embedded hardware building blocks, Embedded Processors – ISA architecture models, Internal
processor design, processor performance, Board Memory – ROM, RAM, Auxiliary Memory,
Memory Management of External Memory, Board Memory and performance.
Embedded board Input / output – Serial versus Parallel I/O, interfacing the I/O components, I/O
components and performance, Board buses – Bus arbitration and timing, Integrating the Bus with
other board components, Bus performance.
Device drivers, Device Drivers for interrupt-Handling, Memory device drivers, On-board bus
device drivers, Board I/O drivers, Explanation about above drivers with suitable examples.
Embedded system design and development lifecycle model, creating an embedded system
architecture, introduction to embedded software development process and tools- Host and Target
machines, linking and locating software, Getting embedded software into the target system,
issues in Hardware-Software design and co-design.
Implementing the design-The main software utility tool, CAD and the hardware, Translation
tools, Debugging tools, testing on host machine, simulators, Laboratory tools, System Boot-Up.
UNIT-V: Embedded System Design-Case Studies
Case studies- Processor design approach of an embedded system –Power PC Processor based
and Micro Blaze Processor based Embedded system design on Xilinx platform-NiosII Processor
based Embedded system design on Altera platform-Respective Processor architectures should be
taken into consideration while designing an Embedded System.
TEXT BOOKS:
REFERENCE BOOKS:
Introduction to Switched Capacitor circuits- basic building blocks, Operation and Analysis, Non-
ideal effects in switched capacitor circuits, Switched capacitor integrators first order filters,
Switch sharing, biquad filters.
Basic PLL topology, Dynamics of simple PLL, Charge pump PLLs-Lock acquisition,
Phase/Frequency detector and charge pump, Basic charge pump PLL, Non-ideal effects in PLLs-
PFD/CP non-idealities, Jitter in PLLs, Delay locked loops, applications.
DC and dynamic specifications, Quantization noise, Nyquist rate D/A converters- Decoder based
converters, Binary-Scaled converters, Thermometer-code converters, Hybrid converters
Noise shaping modulators, Decimating filters and interpolating filters, Higher order modulators,
Delta sigma modulators with multibitquantizers, Delta sigma D/A
TEXT BOOKS:
REFERENCE BOOKS:
UNIT-I: Introduction
OS Services, Process Management, Timer Functions, Event Functions, Memory Management,
Device, File and IO Systems Management, Interrupt Routines in RTOS Environment and
Handling of Interrupt Source Calls, Real-Time Operating Systems, Basic Design Using an
RTOS, RTOS Task Scheduling Models, Interrupt Latency and Response of the Tasks as
Performance Metrics, OS Security Issues.
Testing Philosophy, Role of Testing, Digital and Analog VLSI Testing, VLSI Technology
Trends affecting Testing, Types of Testing, Fault Modeling: Defects, Errors and Faults,
Functional Versus Structural Testing, Levels of Fault Models, Single Stuck-at Fault.
Simulation for Design Verification and Test Evaluation, Modeling Circuits for Simulation,
Algorithms for True-value Simulation, Algorithms for Fault Simulation.
SCOAP Controllability and Observability, High Level Testability Measures, Digital DFT and
Scan Design: Ad-Hoc DFT Methods, Scan Design, Partial-Scan Design, Variations of Scan.
The Economic Case for BIST, Random Logic BIST: Definitions, BIST Process, Pattern
Generation, Response Compaction, Built-In Logic Block Observers, Test-Per-Clock, Test-Per-
Scan BIST Systems, Circular Self Test Path System, Memory BIST, Delay Fault BIST.
Motivation, System Configuration with Boundary Scan: TAP Controller and Port, Boundary
Scan Test Instructions, Pin Constraints of the Standard, Boundary Scan Description Language:
BDSL Description Components, Pin Descriptions.
TEXT BOOKS:
1. Essentials of Electronic Testing for Digital, Memory and Mixed Signal VLSI Circuits -
M.L. Bushnell, V. D. Agrawal, Kluwer Academic Pulishers.
REFERENCE BOOKS:
1. Digital Systems and Testable Design - M. Abramovici, M.A.Breuer and A.D Friedman,
Jaico Publishing House.
2. Digital Circuits Testing and Testability - P.K. Lala, Academic Press.
L P C
I Year II Semester
4 0 3
UNIT-I:
Number formats for signals and coefficients in DSP systems, Dynamic Range and Precision,
Sources of error in DSP implementations, A/D Conversion errors, DSP Computational errors,
D/A Conversion Errors, Compensating filter.
UNIT-II:
Basic Architectural features, DSP Computational Building Blocks, Bus Architecture and
Memory, Data Addressing Capabilities, Address Generation UNIT, Programmability and
Program Execution, Speed Issues, Features for External interfacing.
UNIT-III:
Programmable Digital Signal Processors
UNIT-IV:
Analog Devices Family of DSP Devices – ALU and MAC block diagram, Shifter Instruction,
Base Architecture of ADSP 2100, ADSP-2181 high performance Processor.
Introduction to Black fin Processor - The Black fin Processor, Introduction to Micro Signal
Architecture, Overview of Hardware Processing Units and Register files, Address Arithmetic
Unit, Control Unit, Bus Architecture and Memory, Basic Peripherals.
UNIT-V:
Memory space organization, External bus interfacing signals, Memory interface, Parallel I/O
interface, Programmed I/O, Interrupts and I/O, Direct memory access (DMA).
TEXT BOOKS:
1. Digital Signal Processing – Avtar Singh and S. Srinivasan, Thomson Publications, 2004.
2. A Practical Approach To Digital Signal Processing - K Padmanabhan, R. Vijayarajeswaran,
Ananthi. S, New Age International, 2006/2009
3. Embedded Signal Processing with the Micro Signal Architecture: Woon-SengGan, Sen M.
Kuo, Wiley-IEEE Press, 2007
REFERENCE BOOKS:
(ELECTIVE -III)
TEXT BOOKS:
1. CMOS Digital Integrated Circuits – Analysis and Design – Sung-Mo Kang, Yusuf
Leblebici, TMH, 2011.
2. Low-Voltage, Low-Power VLSI Subsystems – Kiat-Seng Yeo, Kaushik Roy, TMH
Professional Engineering.
REFERENCE BOOKS:
UNIT-I:
Introduction to DSP
Typical DSP algorithms, DSP algorithms benefits, Representation of DSP algorithms
Retiming
Introduction – Definitions and Properties – Solving System of Inequalities – Retiming
Techniques
UNIT-II:
Folding: Introduction -Folding Transform - Register minimization Techniques – Register
minimization in folded architectures – folding of multirate systems
Unfolding: Introduction – An Algorithm for Unfolding – Properties of Unfolding – critical Path,
Unfolding and Retiming – Applications of Unfolding
UNIT-III:
Systolic Architecture Design
Introduction – Systolic Array Design Methodology – FIR Systolic Arrays – Selection of
Scheduling Vector – Matrix Multiplication and 2D Systolic Array Design – Systolic Design for
Space Representations contain Delays
UNIT-IV:
Fast Convolution
Introduction – Cook-Toom Algorithm – Winogard algorithm – Iterated Convolution – Cyclic
Convolution – Design of Fast Convolution algorithm by Inspection
UNIT-V:
Low Power Design
Scaling Vs Power Consumption –Power Analysis, Power Reduction techniques – Power
Estimation Approaches
Programmable DSP: Evaluation of Programmable Digital Signal Processors, DSP Processors for
Mobile and Wireless Communications, Processors for Multimedia Signal Processing.
TEXT BOOKS:
1. VLSI Digital Signal Processing- System Design and Implementation – Keshab K. Parhi,
1998, Wiley Inter Science.
2. VLSI and Modern Signal Processing – Kung S. Y, H. J. While House, T. Kailath, 1985,
Prentice Hall.
REFERENCE BOOKS:
1. Design of Analog – Digital VLSI Circuits for Telecommunications and Signal
Processing – Jose E. France, YannisTsividis, 1994, Prentice Hall.
2. VLSI Digital Signal Processing – Medisetti V. K, 1995, IEEE Press (NY), USA.
L P C
I Year II Semester
4 0 3
MICRO ELECTRO MECHANICAL SYSTEM (MEMS) DESIGN
(ELECTIVE-IV)
UNIT-I: Introduction
Basic structures of MEM devices – (Canti-Levers, Fixed Beams diaphragms).Broad Response of
Micro electromechanical systems (MEMS) to Mechanical (Force, pressure etc.)Thermal,
Electrical, optical and magnetic stimuli, compatibility of MEMS from the point of power
dissipation, leakage etc.
UNIT-II: Review
Review of mechanical concepts like stress, strain, bending moment, deflection curve.
Differential equations describing the deflection under concentrated force, Distributed force,
distributed force, Deflection curves for canti-levers- fixed beam. Electrostatic excitation –
columbic force between the fixed and moving electrodes.Deflection with voltage in C.L,
Deflection Vs Voltage curve, critical fringe field – field calculations using Laplace
equation.Discussion on the approximate solutions – Transient response of the MEMS.
UNIT-III: Types
Two terminal MEMS - capacitance Vs voltage Curve – Variable capacitor.Applications of
variable capacitors.Two terminal MEM structures.Three terminal MEM structures – Controlled
variable capacitors – MEM as a switch and possible applications.
TEXT BOOKS:
1. MEMS Theory, Design and Technology - GABRIEL. M.Review, R.F.,2003, John
wiley& Sons. .
2. Strength of Materials –ThimoShenko, 2000, CBS publishers & Distributors.
3. MEMS and NEMS, Systems Devices; and Structures - ServeyE.Lyshevski, 2002, CRC
Press.
REFERENCE BOOKS:
1. Sensor Technology and Devices - Ristic L. (Ed) , 1994, Artech House, London.
L P C
I Year II Semester
4 0 3
CPLD AND FPGA ARCHITECURES AND APPLICATIONS
(ELECTIVE -IV)
Introduction, Programming Technology, Device Architecture, TheActel ACT1, ACT2 and ACT3
Architectures.
General Design Issues, Counter Examples, A Fast Video Controller, A Position Tracker for a
Robot Manipulator, A Fast DMA Controller, Designing Counters with ACT devices, Designing
Adders and Accumulators with the ACT Architecture.
TEXT BOOKS:
1. Field Programmable Gate Arrays - John V. Oldfield, Richard C. Dorf, Wiley India.
2. Digital Design Using Field Programmable Gate Arrays - Pak K. Chan/SamihaMourad,
Pearson Low Price Edition.
3. Digital Systems Design with FPGAs and CPLDs - Ian Grout, Elsevier, Newnes.
4. FPGA based System Design - Wayne Wolf, Prentice Hall Modern Semiconductor Design
Series.
L P C
I Year II Semester
4 0 3
TEXT BOOKS:
1. Semiconductor Memories Technology – Ashok K. Sharma, 2002, Wiley.
2. Advanced Semiconductor Memories – Architecture, Design and Applications - Ashok K.
Sharma- 2002, Wiley.
3. Modern Semiconductor Devices for Integrated Circuits – Chenming C Hu, 1st Ed.,
Prentice Hall.
L P C
I Year II Semester
0 3 2
EMBEDDED SYSTEM DESIGN LABORATORY
• The Students are required to write the programs using C-Language according to the
Experiment requirements using RTOS Library Functions and macros ARM-926
developer kits and ARM-Cortex.
• The following experiments are required to develop the algorithms, flow diagrams,
source code and perform the compilation, execution and implement the same using
necessary hardware kits for verification. The programs developed for the
implementation should be at the level of an embedded system design.
• The students are required to perform at least SIX experiments from Part-I and
TWO experiments from Part-II.
List of Experiments:
(Coo-Cox-Software-Platform)
2. Interface ADC and DAC ports with the Input and Output sensitive devices.
3. Simulate the temperature DATA Logger with the SERIAL communication with PC.
4. Implement the developer board as a modem for data communication using serial port
communication between two PC’s.
Lab Requirements:
Software:
(v) Eclipse IDE for C and C++ (YAGARTO Eclipse IDE), Perfect RTOS Library,
COO-COX Software Platform, YAGARTO TOOLS, and TFTP SERVER.
(vi) LINUX Environment for the compilation using Eclipse IDE & Java with latest
version.
Hardware: