IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO.

7, JULY 2007 1529

A CMOS Chopper Offset-Stabilized Opamp

Johan F. Witte, Member, IEEE, Kofi A. A. Makinwa, Senior Member, IEEE, and Johan H. Huijsing, Fellow, IEEE

Abstract—In this paper, an offset-stabilized operational ampli- white noise characteristic of their input stage, but shift their
fier is described. The amplifier employs a chopper amplifier in a input offset and 1/ noise to the chopper frequency, thereby cre-
low frequency path to cancel the offset of a wide-bandwidth ampli- ating large amounts of ripple at their output, which then has to
fier. A sample-and-hold circuit is used to reduce the chopper ripple,
and the low frequency path is also offset-stabilized to further re- be filtered out, making them unsuitable for high bandwidth ap-
duce the residual offset. The amplifier has less than 1.5 V offset plications. Auto-zero amplifier topologies also reduce the 1/
at a 16-kHz chopper frequency, a unity gain frequency of 1.3 MHz noise, but suffer from increased noise at low frequencies, since
with a 50-pF load, and draws 700 A from a 5-V supply. The am- wideband noise is effectively under-sampled and folded back to
plifier was realized in a 0.7 m CMOS process, and has an effective DC. Furthermore, the sampling action inherent to auto-zeroing
chip area of 3.6 mm2 .
means that it is not suitable for continuous time operation, un-
Index Terms—Choppers, CMOS analog integrated circuits, low- less a ping-pong architecture is used [6].
offset, operational amplifiers.
A dynamic offset cancellation technique that reduces offset
and enables wide bandwidth is the continuous-time auto-zero
I. INTRODUCTION [4], or, as we shall call it, the offset-stabilization technique, in
which the offset of a wideband main amplifier is measured and
OW-OFFSET amplifiers are widely applied in measure-
L ment systems. Typical applications include the electronic
readout of strain gauges, thermocouples, piezoelectric sensors,
corrected by a low-offset compensation amplifier. The main fea-
ture of an offset-stabilized amplifier is that no sampling or mod-
ulation is employed in the main amplifier, and thus its full band-
Hall sensors or photo diodes [1]–[3]. From an economical width is available for signal amplification. This technique is ap-
point of view, CMOS is the preferred technology, since it is plied in the presented design. In Table I, the performance of var-
relatively low-cost and enables the integration of digital signal ious DOC techniques is summarized.
processing. This, in turn, makes the realization of complex In the next section, two methods of offset stabilization are
mixed-signal systems feasible. However, the offset of typical discussed. In Section III, the implemented chopper offset-stabi-
CMOS amplifiers is at the millivolt level, which, considering lized amplifier is presented. In Section IV, additional circuitry is
the current trend towards lower supply voltages, severely presented to reduce chopper ripple, and in Section V additional
limits their accuracy and dynamic range. Although the offset circuitry is presented to reduce residual offset. In Section VI, the
of CMOS amplifiers can be reduced to a few hundred micro- amplifier’s multi-path frequency compensation scheme is de-
volts by trimming, the residual offset will then drift with time scribed. Experimental results are presented in Section VII. The
and temperature. Lower, more stable residual offsets can be paper ends with conclusions in Section VIII.
achieved by using dynamic offset cancellation (DOC) tech-
niques such as chopping and auto-zeroing. Furthermore, unlike II. OFFSET-STABILIZATION
trimming, DOC techniques also suppress drift and 1/ noise. Fig. 1 shows an offset-stabilized amplifier in a negative feed-
Typical sensor output signals are in the microvolt range back configuration. Here amplifier is used as a compensa-
and have bandwidths ranging from DC up to a few kilo- tion amplifier for the main amplifier . In this configuration,
hertz. Boosting such signals to levels compatible with typical the main amplifier’s differential input voltage will be substan-
analog-to-digital converters requires low-offset operational tially equal to its offset. The compensation amplifier measures
amplifiers (opamps) with gain-bandwidth (GBW) products this voltage and drives it towards zero by applying a compen-
of a few megahertz. For example, implementing an amplifier sation voltage to an auxiliary input of the main amplifier. The
with a closed-loop gain of 40 dB, a gain accuracy of 1% and a equivalent input offset voltage of this topology can be derived
bandwidth of 1 kHz, calls for a low-offset opamp with a GBW as
product of at least 10 MHz. Achieving such GBW products in
combination with microvolt-level offset is not straightforward, (1)
since both chopping and auto-zeroing effectively trade band-
width for low offset [4]. where , and are the DC voltage gains of the com-
The design trade-offs for chopper and auto-zero amplifier pensating amplifier, the main amplifier, and the gain between
topologies are known [4], [5]. Chopper amplifiers maintain the the auxiliary input and the output of the main amplifier, respec-
tively. It is important to note, however, that this technique only
Manuscript received November 20, 2006; revised February 23, 2007. This works in negative feedback configurations, and will not work in
work was supported by the Dutch Technology Foundation STW. open-loop configurations, such as comparators.
The authors are with the Electronic Instrumentation Laboratory, DIMES, Offset stabilization should usually be implemented in com-
Delft University of Technology, 2628 CD Delft, The Netherlands (e-mail:
[email protected]). bination with chopping or auto-zeroing since the compensation
Digital Object Identifier 10.1109/JSSC.2007.899080 amplifier needs to have a low offset. So two offset-stabilization
0018-9200/$25.00 © 2007 IEEE
1530 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007

TABLE I
SUMMARIZED PERFORMANCE OF VARIOUS DOC TECHNIQUES

(a)
Fig. 1. Basic offset stabilization concept.

methods can be distinguished: auto-zero offset stabilization and

chopper offset stabilization.

A. Auto-Zero Offset-Stabilization
A diagram of a system using auto-zero offset stabilization [4], (b)
[7], [8] is shown in Fig. 2(a). In the time domain, this circuit has
two phases. In phase 1, switches S1a and S1b are closed and S2a Fig. 2. (a) Auto-zero offset stabilization. (b) Chopper offset stabilization.
and S2b are opened. In this phase, compensation amplifier
will measure its own offset voltage, and stores an offset-com-
pensating voltage on capacitor C1. In phase 2, switches S2a and stabilized amplifier, which uses a chopped compensation ampli-
S2b are closed and S1a and S1b are opened. Thus, compensa- fier, has been proposed in [9]. The patented topology described
tion amplifier will measure the offset voltage of the main in [10] uses a chopper amplifier, which is also chopper offset-
amplifier , and stores an offset compensating voltage on stabilized. Recently, a chopper offset-stabilized amplifier has
capacitor C2. The resulting input referred offset than can be de- been presented [11], in which a GmC integrator and a switched-
rived as [4] capacitor filter are used to reduce chopper residuals [12].
In the chopper offset-stabilized amplifier shown in Fig. 2(b),
the chopper amplifier composed of chopper CH2, amplifier
(2)
and chopper CH1, senses the offset of the main amplifier .
A low-pass filter removes chopper residuals that are caused by
where , , and are the DC voltage gains of the the offset of . The residual offset is then given by (1).
compensating amplifier, the main amplifier and the gains from Since it cannot distinguish between the two, the compensa-
their auxiliary inputs to their respective outputs. Compared to tion loop of an offset-stabilized amplifier will reduce the main
the ideal circuit, an additional source of residual offset is the amplifiers’ 1/ noise as well as its offset. For effective sup-
finite gain and offset of the compensation amplifier. pression of 1/ noise, the bandwidth of the compensation loop
Also, the noise aliasing associated with auto-zeroing will give should, therefore, be larger than the main amplifier’s 1/ noise
rise to a higher input-referred noise voltage at low frequencies corner frequency. The offset and 1/ noise of the compensation
[4]. A drawback of this circuit is that the charge injected by the amplifier itself are modulated to the chopping frequency, and
switches S1b and S2b is also stored on the capacitors C1 and will be removed by the low-pass filter. At low frequencies, the
C2. This causes additional residual offset, and therefore these input-referred noise of an offset-stabilized amplifier will then
capacitors generally need to be large. be determined by the white noise of the compensation amplifier
. In Fig. 3, the noise spectrum of a chopper offset-stabilized
B. Chopper Offset-Stabilization amplifier is shown, in which the transconductance of is
Most so-called chopper-stabilized amplifiers, e.g., [7], use smaller than that of . In contrast, the white noise at low fre-
auto-zeroed compensation amplifiers and are, therefore, actually quencies of a similarly dimensioned auto-zero offset-stabilized
auto-zero offset-stabilized amplifiers. A true chopper offset- amplifier would be significantly higher due to noise aliasing.
WITTE et al.: CMOS CHOPPER OFFSET-STABILIZED OPAMP 1531

Fig. 3. Noise in a chopper offset-stabilized amplifier.

Fig. 5. Chopper offset stabilization using an active integrator with a sample-

and-hold to filter the triangular wave and an integrator offset stabilization loop.

where is the initial offset of the amplifier consisting of

, , and , and , 3, 4, 5, 6, are the DC voltage
gains of the appropriate amplifier stages. This means that, in
order to reduce the offset of the main amplifier from, say, 10 mV
to 1 V, the gain of the compensating loop should be at least
80 dB higher than the gain of the main amplifier’s input stage.
Fig. 4. Chopper offset stabilization using an active integrator. The modulated offset of gives rise to ripple, in the form of
a triangular wave at the output of , which, in turn, gives rise
to a triangular wave at the input of the whole amplifier. The input-
In conclusion, compared to the use of auto-zero offset stabi- referred peak-to-peak voltage of this triangular wave is given by
lization, the use of chopper offset stabilization should lead to
better performance with respect to noise and offset. To demon- (4)
strate this, a chopper-stabilized amplifier has been implemented,
which is discussed in the next section.
where is the offset of , is the chopper frequency and
is the integrator capacitance. For use as a general-purpose
III. THE IMPLEMENTED CIRCUIT opamp, the amplitude of this ripple should be reduced below
The topology used in the implemented circuit is shown in the noise floor.
Fig. 4. It is intended to be a high-gain general-purpose opamp,
and consists of an offset-stabilized input stage , a second IV. RIPPLE-REDUCTION CIRCUITRY
summing stage , and a class AB output stage . The ca- From (4), the amplitude of the ripple can be minimized by
pacitors , , , , , and are used for fre- minimizing the transconductance of and maximizing the
quency compensation, and will be discussed in Section V. The capacitance of and . However, decreasing will also
compensation loop around consists of a chopper ampli- increase the amplifier’s input-referred noise. Another alterna-
fier, an integrator, and . The chopper amplifier consists of tive is to increase the chopping frequency, however, this causes
chopper CH2, and CH1, while the integrator is composed more residual offset due to the effect of charge injection in the
of and capacitors and ; acts as the auxil- chopper switches [1], [4], [5].
iary input of . The offset of appears at the input of The chosen solution is to implement a sample-and-hold circuit
chopper CH2. The modulated offset voltage is converted into a after the integrator, as shown in Fig. 5. The circuit samples the
current and then demodulated by the sense amplifier and triangular wave at the integrator output, thereby eliminating the
chopper CH1, respectively. The current is integrated by , ripple. The timing of the sample moments is not critical, however,
which then applies an offset compensating current to the output the integrator’s dynamic range is optimally used when the trian-
of via . All the choppers operate at the same clock gular wave is sampled exactly at the zero crossings. To achieve
frequency. Without taking charge injection effects into account, a continuous output signal, two sample-and-hold circuits have
the residual offset can then be expressed by been used. Their timing is arranged so that while one sample-
and-hold circuit is sampling, the other is driving . The timing
(3) diagram of a single sample-and-hold is shown in Fig. 6.
1532 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007

Fig. 6. Timing diagram of the circuit of Fig. 5.

V. RESIDUAL OFFSET REDUCTION CIRCUITRY

The offset of influences the residual offset. This is

because it appears as a chopped voltage that charges and dis-
charges the parasitic output capacitance of . The required
current is provided by , which means that a voltage must
be present at its input, and hence there will be a residual offset
at the input of the amplifier. This residual offset is given by Fig. 7. Chip micrograph.

(5)

where is the parasitic output capacitance of . To

minimize this offset, the transconductance of should be
maximized while its parasitic capacitance should be mini-
mized. However, as can be seen from (4), maximizing
will increase the ripple. Another possibility, which does not Fig. 8. Bode plots of the conditionally stable multipath structure and the hybrid
have conflicting trade-offs, is to cancel the integrator’s offset. nested Miller compensation structure.
In order to do this, a nested offset stabilization loop has been
implemented around the integrator. The realized circuit is
shown in Fig. 5. VI. FREQUENCY COMPENSATION
The offset of appears at the input of chopper CH1 as
a square wave. This signal is converted into a current and then The circuit shown in Fig. 4 can be considered as a multi-
demodulated by the sense amplifier and chopper CH3 re- path amplifier in which the cascaded amplifiers , , and
spectively. This current will be integrated by , which then form the low-gain/high-frequency path, while the cascaded
applies an offset compensating current to via . All the amplifiers , , , , and form the high-gain/
choppers operate at the same clock frequency. low-frequency path. The amplifier’s high-frequency behavior is
The offset of also needs to be reduced, because it is dominated by the behavior of the low-gain/high-frequency path.
a source of additional residual offset and output ripple. For This path is stabilized by capacitors , , , and ,
this reason the multiplexer M1, integrator and are which implement nested Miller compensation [13].
added, which auto-zeros at half the clock frequency. At low frequencies, the amplifier’s behavior depends on the
The system has a class AB output stage consisting of a folded- high-gain/low-frequency path. Compared to the compensated
cascode and [13]. The input stage and the com- high-frequency path, this path contains an extra low-frequency
pensating amplifiers and are implemented as folded pole due to the presence of the integrator. At low frequencies,
cascode amplifiers. Integrators , and are two- the amplifier’s open-loop frequency response will therefore
stage class A amplifiers to provide at least 80 dB DC voltage have a 40 dB/decade roll-off (Fig. 8). As a result, the amplifier
gain over temperature and corners. Amplifiers , , and is only conditionally stable, i.e., to ensure stability without
are implemented as auxiliary input stages for respectively external frequency compensation, the closed loop gain must
, , and while the multiplexer M1 operates on half be limited below a certain value. This is not desirable in a
the clock frequency. The chip was implemented in a 0.7- m general-purpose opamp.
CMOS process, and the chip micrograph is shown in Fig. 7. To circumvent this problem, multi-path hybrid nested Miller
The chip has an area of 3.6 mm and draws 700 A from a 5-V compensation [14], [15] has been implemented by placing two
supply. The output stage and intermediate stage con- extra capacitors and in the circuit; these can be seen
sume 50% of the total current, the input stage consumes in Fig. 4. This effectively adds a low-frequency zero to the am-
30%, the other input stage uses only 0.3%, the integrators plifier’s response, thereby cancelling one of the low-frequency
, , and use 5.5% each, and the rest of the circuit poles. The Bode plots of the amplifier with and without these
consumes the remaining 2.7% of the total current. capacitors are shown in Fig. 8.
WITTE et al.: CMOS CHOPPER OFFSET-STABILIZED OPAMP 1533

Fig. 9. Bode plot at a DC gain of 80 dB with a 50-pF load.

VII. MEASUREMENT RESULTS

A. Frequency Compensation
In Fig. 9, the measured frequency response of the complete
amplifier is shown. With a 50-pF load, the unity-gain frequency
is 1.3 MHz with a 56 degree phase margin. The circuit is also
stable with a closed-loop DC gain of 80 dB, and has a 20 dB
per decade roll off, demonstrating the efficacy of the multi-path Fig. 10. Spectrum of the output noise of (a) the amplifier without offset sta-
hybrid nested Miller compensation. bilization; (b) the chopper (4 kHz) offset-stabilized amplifier; (c) the chopper
(4 kHz) offset-stabilized amplifier with the sample-and-hold (2 kHz) and nested
B. Noise stabilization loop turned on.

The noise spectrum was measured at the output of the am-

plifier. For these measurements, the amplifier was used in an activated, in order to realize the circuit of Fig. 6, but without
inverting configuration with a DC gain of 40 dB and a 3 dB the sample-and-hold. Finally, the sample-and-hold was also
bandwidth of 10 kHz. The output noise spectrum of the ampli- enabled. The measurements were made on 19 samples using
fier with the offset stabilization turned off is shown in Fig. 10(a). an external clock generator. The measurement results are
Low-frequency 1/ noise can clearly be seen. The output noise summarized in Table II.
spectrum of the amplifier with the chopper offset stabilization First, the amplifier’s offset without offset stabilization is pre-
turned on is shown in Fig. 10(b). The 1/ noise is now sup- sented. A histogram of all 19 samples is shown in Fig. 11. A
pressed by the chopper amplifier, and an increased white-noise 0.1 mV average offset with a 1.5 mV average absolute deviation
level at low frequencies can be observed since the compensation was measured. The average absolute deviation of the mean was
loop is noisier than the main amplifier. The chopper frequency used as a figure of merit for the spread in offset voltage, because
is 4 kHz and is visible as a peak in Fig. 10(b). In Fig. 10(c), the the measured offset distribution was not truly Gaussian.
output noise spectrum of the chopper offset-stabilized amplifier Second, the chopper offset-stabilization loop was activated,
is shown with the sample-and-hold and nested compensation but with both the integrator offset-stabilization loop and
loop turned on. The sample-and-hold runs at 2 kHz. It can be sample-and-hold switched off. With an externally applied clock
seen that the chopper ripple is now effectively suppressed. How- frequency of 16 kHz, a 16 V average offset with a 30 V
ever, since the sample-and-hold under-samples the compensa- average absolute deviation was measured. So the spread is 50
tion loop’s wideband noise, the total noise increases somewhat. times lower than without compensation. The main cause of
residual offset is the offset of the integrator. This corresponds
C. Offset
with the results of simulation.
First, the amplifier’s initial offset was measured without Third, the integrator’s offset stabilization loop was activated.
activating any offset stabilization circuits. Second, the chopper A 1.4 V average offset with a 0.5 V average absolute devi-
offset-stabilization circuit was activated, resulting in the circuit ation was measured. A histogram is presented in Fig. 12. This
of Fig. 4. Next, the integrator’s offset-stabilization loop was shows that this circuit lowers the offset by more than a factor of
1534 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 42, NO. 7, JULY 2007

TABLE II
OFFSET MEASUREMENT STATISTICS

Fig. 13. Offset of a chopper offset-stabilized opamp according to Fig. 5 in-

cluding the sample-and-hold.

With a 4-kHz clock frequency, an average offset plus average

absolute deviation of less than 1 V was achieved. From
Table II, it can also be seen that the offset spread increases
with the clock frequency. Therefore, it can be concluded that
clock-frequency-dependent capacitive cross-talk and charge
injection are the main sources of the remaining residual offset.

VIII. CONCLUSION
A chopper offset-stabilized amplifier with a GBW product
of 1.3 MHz and an offset of less than 1 V at a 4-kHz clock
frequency, or an offset of less than 1.5 V at a 16-kHz clock
frequency, has been presented. The circuit was implemented in
a 0.7- m CMOS process. It was shown that the use of nested
offset-stabilization loops significantly reduces the residual
offset of the amplifier, and that the use of a sample-and-hold
Fig. 11. Initial offset without any stabilization.
reduces the chopper residuals below the noise floor.

ACKNOWLEDGMENT
The authors would like to thank Europractice and particularly
G. Milczanowska and N. Beylemans for help in the realization.

REFERENCES
[1] C. Menolfi and Q. Huang, “A fully integrated, untrimmed CMOS in-
strumentation amplifier with submicrovolt offset,” IEEE J. Solid-State
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[2] J. C. van der Meer, F. R. Riedijk, E. van Kampen, K. A. A. Makinwa,
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µT 3σ offset for compass applications,” in IEEE Int. Solid-State Cir-
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[3] K. A. A. Makinwa and J. H. Huijsing, “A smart CMOS wind sensor,” in
Fig. 12. Offset of a chopper offset-stabilized opamp according to Fig. 5 ex- IEEE Int. Solid-State Circuits Conf. (ISSCC) Dig. Tech. Papers, 2002,
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[4] C. C. Enz and G. C. Temes, “Circuit techniques for reducing the effects
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10 and reduces the offset spread by a factor of 60. The ampli- Nov. 1996.
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strumentation amplifier with 100-nV offset,” IEEE J. Solid-State Cir-
can be as high as 250 V.
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[6] A. T. K. Tang, “A 3 µV-offset operational amplifier with 20 nV/ Hz
measurements were made at three different clock frequen- input noise PSD at DC employing both chopping and autozeroing,” in
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sample-and-hold action. However, due to the reduction of [7] AD8551/AD8552/AD8554 Datasheet. Analog Devices, Nov. 2002
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WITTE et al.: CMOS CHOPPER OFFSET-STABILIZED OPAMP 1535

[9] C. I. Menolfi, Low Noise CMOS Chopper Instrumentation Amplifiers Johan H. Huijsing (SM’81–F’97) received the
for Thermoelectric Microsensors, 1st ed. Konstanz, Germany: Har- M.Sc. degree in electrical engineering from the Delft
tung-Gorre Verlag, 2000, ch. 5. University of Technology, Delft, The Netherlands, in
[10] J. H. Huijsing and M. J. Fonderie, “Chopper chopper-stabilized opera- 1969, and the Ph.D. degree from the same university
tional amplifiers and methods,” U.S. Patent 6,734,723, May 11, 2004. in 1981 for his thesis on operational amplifiers.
[11] R. Burt and J. Zhang, “A micropower chopper-stabilized operational He has been an Assistant and Associate Professor
amplifier using SC notch filter with synchronous integration inside the in electronic instrumentation with the Faculty of
continuous-time signal path,” IEEE J. Solid-State Circuits, vol. 41, no. Electrical Engineering of the Delft University of
12, pp. 2729–2736, Dec. 2006. Technology since 1969, where he became a full
[12] A. Bakker and J. H. Huijsing, “A CMOS chopper opamp with inte- Professor in the Chair of Electronic Instrumentation
grated low-pass filter,” in Proc. ESSCIRC, 1997, pp. 200–203. in 1990, and has been Professor Emeritus since
[13] J. H. Huijsing, M. J. Fonderie, and B. Shahi, “Frequency stabilization of 2003. From 1982 through 1983, he was a Senior Scientist at Philips Research
chopper-stabilized amplifiers,” U.S. Patent 7,209,000, Apr. 24, 2007. Laboratories in Sunnyvale, CA. From 1983 until 2005, he was a consultant for
[14] J. H. Huijsing, Operational Amplifiers Theory and Design. Norwell, Philips Semiconductors, Sunnyvale, CA, and since 1998 also a consultant for
MA: Kluwer Academic, 2001, p. 316. Maxim, Sunnyvale, CA.
[15] R. G. H. Eschauzier, R. Hogervorst, and J. H. Huijsing, “A pro- His research work is focused on the systematic analysis and design of opera-
grammable 1.5 V CMOS class-AB operational amplifier with hybrid tional amplifiers, analog-to-digital converters, and integrated smart sensors. He
nested Miller compensation for 120 dB gain and 6 MHz UGF,” IEEE is author or co-author of some 250 scientific papers, 40 patents and 13 books,
J. Solid-State Circuits, vol. 29, no. 12, pp. 1497–1504, Dec. 1994. and co-editor of 13 books. He is a Fellow of IEEE for contributions to the design
and analysis of analog integrated circuits. He was awarded the title of Simon
Stevin Meester for Applied Research by the Dutch Technology Foundation.

Johan F. Witte (S’02–M’03) received the M.Sc. de-

gree in electrical engineering (cum laude) from Delft
University of Technology, Delft, The Netherlands,
in 2003. He is currently working toward the Ph.D.
degree at the Electronic Instrumentation Laboratory
of the same university, on the subject of low-offset
CMOS amplifiers.
In 2003, he was an intern with Philips Semicon-
ductors, San Jose, CA, working on analog design. His
professional interests include sensors and analog and
mixed-signal design.

Kofi A. A. Makinwa (M’97–SM’05) received the

B.Sc. and M.Sc. degrees from Obafemi Awolowo
University, Nigeria, in 1985 and 1988, respectively.
In 1989, he received the M.E.E. degree from the
Philips International Institute, The Netherlands, and
in 2004, the Ph.D. degree from Delft University
of Technology, The Netherlands, for a thesis on
electrothermal sigma-delta modulators.
From 1989 to 1999, he was a Research Scientist
at Philips Research Laboratories, where he designed
sensor systems for interactive displays and analog
front-ends for optical and magnetic recording systems. In 1999, he joined
Delft University of Technology, where he is currently an Associate Professor
in the Faculty of Electrical Engineering, Computer Science and Mathematics.
His main research interests are in the design of precision analog circuitry,
sigma-delta modulators and sensor interfaces. His research has resulted in nine
U.S. patents and over 40 technical papers.
Dr. Makinwa is on the program committees of several international con-
ferences, including the IEEE International Solid-State Circuits Conference
(ISSCC) and the International Solid-State Sensors and Actuators Conference
(Transducers). He has presented tutorials at many conferences, including the
ISSCC. He was a co-recipient of the ISSCC 2006 Jan van Vessem Award for
Best European Paper, the IEEE JOURNAL OF SOLID-STATE CIRCUITS 2005 Best
Paper Award, and the ISSCC 2005 Jack Kilby Award for Best Student Paper.
In 2005, he received a Veni Award from the Netherlands Organization for
Scientific Research and the Simon Stevin Gezel Award from the Technology
Foundation STW.