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CA 1st Lec

This document provides information about a computer architecture course, including the instructor's contact details, course content, textbooks, and grading scheme. The course will cover topics such as computer evolution, CPU structure, instruction sets, and digital logic. Students will be evaluated based on a midterm exam, sessional assignments, and a final exam. They must achieve an overall mark of at least 80% to pass the course.

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Touseef sultan
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48 views22 pages

CA 1st Lec

This document provides information about a computer architecture course, including the instructor's contact details, course content, textbooks, and grading scheme. The course will cover topics such as computer evolution, CPU structure, instruction sets, and digital logic. Students will be evaluated based on a midterm exam, sessional assignments, and a final exam. They must achieve an overall mark of at least 80% to pass the course.

Uploaded by

Touseef sultan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Architecture

Course Information
• Instructor: Arslan Tariq
• Email: [email protected]
• Course information and updates will be
posted on Google Classroom
— Schedule
— News and announcements
— Lecture Slides
— Assignments
— etc.
• Google Classroom is 6tzpjg1
• Using Gmail account
Course Content
• Introduction to C.A
• Computer Evolution and Performance
• Computer Interconnection Structures
• Internal Memory
• External Memory
• Input/output
• Operating Systems Support
• Computer Arithmetic
• Instruction Sets
Course Content
• CPU Structure and Function
• Reduced Instruction Set Computers
• Superscalar Processors
• Control Unit Operation
• Microprogrammed Control
• Multiprocessors and Vector Processing
• Digital Logic
Textbooks
• Computer Organization and Architecture,
Designing for
Performance
— By Walliam Stalling
— 8th edition
Grading Scheme
• Midterm 30%
• Sessional 30%
• Final 40%

• Students must achieve an overall mark of


at least 80% in order to pass the course
William Stallings
Computer Organization
and Architecture
8th Edition

Chapter 1
Introduction
Why Study Architecture?
• you want to be a computer scientist
• it makes you a better programmer
• How to increase performance
• it's fun to learn how things work
• you may need to buy a computer
someday
Aspects of Design

User Applications
Everything
Influences Language Subsystem Utilities
everything Compiler OS
Instruction Set Architecture S/W

Hardware Organization H/W


Memo
CPU I/O Coprocessor
ry

Implementation
Power Packaging
VLSI Logic Coolin
COMM
g
Objectives of CA
• High performance
• Low cost
• Ease of integration
• Reliability
• Fault tolerant
Architecture & Organization 1
• Architecture is those attributes visible to
the programmer
— Instruction set, number of bits used for data
representation, I/O mechanisms, addressing
techniques.
• Organization is how features are
implemented
— Control signals, interfaces, memory
technology.
Architecture & Organization 2
• All Intel x86 family share the same basic
architecture

• The IBM System/370 family share the


same basic architecture

• Organization differs between different


versions
Structure & Function
• Structure is the way in which components
relate to each other

• Function is the operation of individual


components as part of the structure
Function
• All computer functions are:
— Data processing
— Data storage
— Data movement
— Control
Functional View
Operations (a) Data movement
Operations (b) Storage
Operation (c) Processing from/to storage
Operation (d)
Processing from storage to I/O
Structure - Top Level

Peripherals Computer

Central Main
Processing Memory
Unit

Computer
Systems
Interconnection

Input
Output
Communication
lines
Structure - The CPU

CPU

Computer Arithmetic
Registers and
I/O Login Unit
System CPU
Bus
Internal CPU
Memory Interconnection

Control
Unit
Structure - The Control Unit

Control Unit

CPU
Sequencing
AL
U
Login
Control
Internal
Unit
Bus
Control Unit
Registers Registers and
Decoders

Control
Memory

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