4 Way Security System Major Corrected
4 Way Security System Major Corrected
Contents
2. Block Diagram…………………………………………..3-4
3. Working Principle……………………………………....4-6
4.Components Details………………………………………6-7
7.Conclusion………………………………………………72-72
8.Reference………………………………………………….73
Abstract
Introduction :-
The security system is one of the major focus areas in the present social and
1
important part. The growth and economy all depends on this. The traditional
security system is not at all full proof and also very much expensive. To safe guard
the industrial area, the most important aspect to be considered is the trace passing.
It is also required to safe guard the industry ,Home, Bank and office. In certain
industries it is required to protect the raw material from theft . In this project the
care is taken to design an general purpose security system for general application,
this can be installed at small office home and general areas, in which a security
sensor is designed with a principle of Infra Red signal. There are four sensors
connected to the system if there is a security detection at any of the channel the
automatically the system detect the same and gives indication to the local
indicators and alarms. The system is interfaced to a computer to keep the log of
the security brakes. In these systems the security break is not only available to
local access but also this can be accessed from the remote terminals through
Internet or local area network. This type of security system is quit useful in the
small office, home, industries the different sensors can be implemented to make the
This type of devices are designed and marketed by the different multinational
companies.
2
Four way security system with person counting project consist
of three basic modules. First is IR transmitter and receiver
module which works for the safety of doors at night or in case
we are out of home. When the IR sensors are interrupted, a
buzzer is turned ON that’s indicating someone is entered into
house. By the help of this project we can secure office,
industries, bank and Home easily through electronics security
system.
3
****BLOCK DIAGRAM OF FOUR WAY SECURITY
SYSTEM*****
Fig-1
Working Principle:-
Four way security system with person counting project consist
of three basic Sections. First is IR transmitter , IR receiver
Section and Mother Board Section which works for the safety of
doors at night or in case we are out of home. This project works
in two mode i.e
1.Normal Condition
4
2.Faulty Condition.
1.Normal Condition:-
In this mode the output of this project is Normal that means here
we used IR transmitter and IR receiver these two section act as a
sensor section which sense the someone enter the gate .But in
normal condition suppose anyone doesn’t enter through gate
then IR transmitter transmits the IR beam to IR receiver so that
receiver output is zero which indicate anyone doesn’t enter
through gate ,if sensor output is zero then indicator and buzzer
are OFF condition that indicate right now Normal condition
occurs.
2.Faulty Condition:-
In this mode the output of this project is ON that means here we
used IR transmitter and IR receiver these two section acts as a
sensor section which sense the someone enter the gate .But in
this condition suppose anyone enter through gate then IR
transmitter transmits the IR beam to IR receiver but due to
obstacle receiver cannot receive the IR beam so that receiver
output is one /High which indicate anyone enter through gate ,if
sensor output is one/High then indicator and buzzer are ON
condition that indicate right now Faulty condition occurs also at
that moment calculator counts how many peoples are enter to
the restricted place.
COMONENTS DETAILS
COMPONENTS USED IN POWER SUPPLY CIRCUIT
COMPONENTS NAME SPECIFICATION
5
Diode IN4007
Capacitor 1000µf,25V
Resistor 1.5k Ω quarter watt
Regulator IC 7812,7805
RELAY
COMPONENTS NAME SPECIFICATION
Relay 12v,10amp
6
TRANSFORMER
COMPONENTS NAME SPECIFICATION
Transformer Step down 230V-12V
0-12,1A
CIRCUIT DESCRIPTION
forward bias of the diodes and diodes D1 & D3 does not conduct
due to the reversed bias of the diodes. Similarly during the –VE
forward bias of the diodes and the diodes D2 & D4 does not
o/p of the diodes (D2 & D3), which removes the unwanted ac
The o/p of the IC regulator (7805 & 7812) is given to the LED
of the LED, the LED glows ON state, and the o/p are obtained .
Fig-2
9
FIG- POWER SUPPLY CIRCUIT
DIAGRAM
Fig-3
glow the light emitting diode. Here the driver circuit is required
10
for the following functionality. The Microcontroller cannot
the Microcontroller.
Fig-4
11
IR TRANSMITTER (transmitter zone)
12
the receiver end the photodiode will receive the IR signal. if
somebody tries to interrupt the IR signal at the transmitter
end, the receiver will decide the absence of the IR signal at
the receiver end.
Operation
DATA SHEET
13
14
When a diode is reversed biased, minute current flows in the diode due to minority carriers. These carriers
exit because of thermal energy which dislodges the valence electrons from their orbits producing free
electronics and holes in the process.
When light energy falls (or bombards) on a PN junction, it also imparts energy to dislodge valence
electrons. In other words, the amount of light striking the junction can control the reverse current in a
diode.
In photodiodes a window is provided in the package which allows the light to fall
on the junction. The magnitude of the reverse current depends upon the intensity of light falling on the
junction i.e. stronger the light larger the reverse current.
TRESSPASSING ALARM:
In this section, the IR detector is configured as a voltage divider network and a high gain
amplifier which is configured as a Comparator and a LED indicator as shown in below figure.
V c c +
P H O T O
D IO D E
V o
R 2
1 0 0 K
PHOTO DETECTOR
15
PHOTO DETECTOR:
As shown in the above figure calculate the voltage (Vth) across the photodiode, assuming the
internal resistance (10k) at the maximum light/ IR signal and (50k) at the minimum light / IR signal .
Because the photo diode sensor which has an internal resistance according to the incident light
on it. When the maximum light / IR signal is incident on it, its resistance decreases (say 10kΩ) and thus
its reverse current increases (say 100µA).
V=I*R
= 100µA * 10kΩ = 1v
V = 1v.
Similarly, when the minimum light / IR signal is incident on it, it’s internal resistance increases (say
50kΩ) and thus its reverse current decreases (say 10µA).
V=I*R
V = 0.5v.
VOLTAGE COMPARATOR:
Comparator is nothing but which compares the two voltage at the input i.e. inverting (-) and non-
inverting (+). If the inverting (-) terminal is greater than the non-inverting (+) terminal, the output of the
comparator goes to – Vsat (0V). Similarly, if the non-inverting (+) terminal is greater than the inverting
(-) terminal, the output of the comparator goes to V cc = + 12 v
+ Vsat (12V).
8
3
V 1
V +
+
1
16 O U T V o
2
V 2
V -
-
L M 393
4
If V1 > V2, Vo = +Vsat = 12V
Ckt Operation:
V cc = + 12v
10k
P H O T O
D IO D E
LED
10k
15k
8
3
+
V +
1
15k
V cc = + 12v O U T B C 547
100K
2
-
V -
L M 393
10K
OUTPUT
4
17
At normal condition, the incident light / IR signal is falling on the photo detector which detects
the signal / light / IR availability at the input. Here the photo detector section is configured as a voltage
divider; say at normal condition the voltage at the detector stage is 10V. That output voltage is fed to the
one terminal i.e. non-inverting terminal (+) of the comparator which is a reference voltage (say 10V) and
another terminal i.e. inverting terminal (-) of the comparator which is a set voltage (5v). Here at normal
condition, the output of the comparator goes to +Vsat (ON i.e.12v) state because here non-inverting
terminal (+) is greater than the inverting terminal (-), the output remains high as long as the signal / IR is
incident on it. That output signal is fed to the LED indicator, to indicate the availability of the signal.
Similarly if somebody tries to interrupt / breaks the signal / light / IR means at abnormal
condition, the incident light / IR signal does not fall on the photo detector which detects the signal / light /
IR unavailability at the input. Here the photo detector section is configured as a voltage divider; say at
abnormal condition the voltage at the detector stage is 1V. That output voltage is fed to the one terminal
i.e. non-inverting terminal (+) of the comparator which is a reference voltage (say 1V) and another
terminal i.e. inverting terminal (-) of the comparator which is a set voltage (5v). Here at abnormal
condition, the output of the comparator goes to -Vsat (OFF i.e.0v) state because here inverting terminal
(-) is greater than the non-inverting terminal (+), the output remains LOW as long as the signal / IR is
interrupted/breaks on it. That output signal is fed to the LED indicator, to indicate the unavailability of the
signal.
18
When a diode is reversed biased, minute current flows in the diode due to
minority carriers. These carriers exit because of thermal energy which dislodges the valence electrons
from their orbits producing free electronics and holes in the process.
When light energy falls (or bombards) on a PN junction, it also imparts energy to dislodge valence
electrons. In other words, the amount of light striking the junction can control the reverse current in a
diode.
In photodiodes a window is provided in the package which allows the light to fall
on the junction. The magnitude of the reverse current depends upon the intensity of light falling on the
junction i.e. stronger the light larger the reverse current.
In this section, the IR detector is configured as a voltage divider network and a high gain
amplifier which is configured as a Comparator and a LED indicator as shown in below figure.
V c c +
P H O T O
D IO D E
V o
R 2
1 0 0 K
PHOTO DETECTOR
PHOTO DETECTOR:
As shown in the above figure calculate the voltage (Vth) across the photodiode, assuming the
internal resistance (10k) at the maximum light/ IR signal and (50k) at the minimum light / IR signal .
19
Vth = R2 / R1 + R2 (Vcc)
Because the photo diode sensor which has an internal resistance according to the incident light
on it. When the maximum light / IR signal is incident on it, its resistance decreases (say 10kΩ) and thus
its reverse current increases (say 100µA).
V=I*R
= 100µA * 10kΩ = 1v
V = 1v.
Similarly, when the minimum light / IR signal is incident on it, it’s internal resistance increases (say
50kΩ) and thus its reverse current decreases (say 10µA).
V=I*R
V = 0.5v.
VOLTAGE COMPARATOR:
Comparator is nothing but a high gain amplifier which compares the two voltage signal at the
input i.e. inverting (-) and non-inverting (+). If the inverting (-) terminal is greater than the non-inverting
(+) terminal, the output of the comparator goes to –Vsat (0V). Similarly, if the non-inverting (+) terminal
is greater than the inverting (-) terminal, the output of the comparator goes to +Vsat (12V).
V cc = + 12 v
3
V 1
V +
+
If V2 > V1, Vo = -Vsat = 0V 1
O U T V o
2
V 2
V -
-
L M 393
4
20
Ckt Operation:
V cc = + 12v
10k
P H O T O
D IO D E
L ED
10k
15k
8
2
V +
-
1
15k
V cc = + 12v O U T B C 547
100K
3 V -
+
L M 393
OUTPUT
10K
At normal condition, the incident light / IR signal is falling on the photo detector which detects
the normal light / day light at the input. Here the photo detector section is configured as a voltage divider
as shown in the above diagram; say at normal condition say day light (6AM), the internal resistance of the
diode decreases and thus voltage at the detector stage is increases (say10V). That output voltage is fed to
the one terminal i.e. inverting terminal (-) of the comparator which is a reference voltage (say 10V) and
another terminal i.e. non-inverting terminal (+) of the comparator which is a set voltage (5v).
Here at normal condition i.e. day light, the output of the comparator goes to -Vsat (OFF i.e.0v)
state because here inverting terminal (-) is greater than the non-inverting terminal (+), the output remains
21
LOW as long as the normal light / day light is incident on it. That output signal is fed to the LED
indicator, to indicate the availability of the day light.
Similarly, if the normal light / day light fades (during night) or decreases (6PM) means at abnormal
condition, in which the photo detector internal resistance increases thus the voltage decreases (say 1V) at
the input. Here the photo detector section is configured as a voltage divider; say at abnormal condition the
voltage at the detector stage is 1V. That output voltage is fed to the one terminal i.e. inverting terminal (-)
of the comparator which is a reference voltage (say 1V) and another terminal i.e. non-inverting terminal
(+) of the comparator which is a set voltage (5v). Here at abnormal condition, the output of the
comparator goes to +Vsat (ON i.e.12v) state because here non-inverting terminal (+) is greater than the
inverting terminal (-), the output remains HIGH as long as the light fades (during night) falls on it. That
output signal is fed to the LED indicator, to indicate the unavailability of the light.
4.2. IR RECEIVER
Introduction
23
VCC VCC
R D1
D1 Vout R Vout
Fig.1 Fig.2
Operation
In this project in the data receiving section, the photodiode is
used as signal (data) detector purpose to detect the IR signal
(data) from the IR transmitter LED section.
Whenever the signal is transmitted from the IR transmitter LED,
the signal is received at the photodiode receiving section. The
receiving signal is very weak in strength, for that we used an
24
amplifier. The output of the photodiode is given as input to the
amplifier
(Op-amp LM351) through a filtering capacitor (0.01uF) which is
configured as an comparator and the reference voltage is set at
non-inverting terminal of the operational amplifier. There is a
10K variable resistor which is connected between +5 Volt and
Ground and the variable terminal are connected to the OP-AMP
for providing the threshold value.
Fig-5
Operation
27
NOT GATE
Fig-6
NOT GATE
28
SIGNAL CONDITIONING
The output form the input signal i.e. comparator or any other
external circuit must be compatible with the -controller, because the
-controller can takes 5V as input voltage and gives a 5V as output
voltage. That for we need a signal conditioning circuit as given in the
below figure.
INPUT 10k
1.5k OUTPUT
BC547 INPUT
1.5k
BC547
OUTPUT
10k
(1:1) (1:0)
(SIGNAL CONDITIONING)
Fig-7
29
- controller or any other circuit which needs a compatible (5V)
voltage. Similarly, whenever the base voltage is LOW the emitter current
flows from the emitter junction of the transistor, which gives a low
voltage at the output corresponding to GND. The output is taken from
the emitter junction through a current limiting resistance and the output
signal is given to the - controller or any other circuit which needs a
compatible (5V) voltage.
fig..1:0
30
VCC
10K
DATA 1.5K
INPUT BC547
V cc = +5V
Vi Vc
Rc
5v 5v
O UT
0v Rb Q 1 0v
t IN t
31 B C 547
(a)
IC (mA)
IB = 80µA
IC sat = 6mA
IB = 60µA
IB = 40µA
IB = 20µA
IB = 10µA
IB = 0µA
VCE
Vcc = 5V
(b)
Fig-8
OPERATION:-
Proper design for the inversion process requires that the operating points
switch from cut-off to saturation along the load line depicted in above
32
figure (b). For our proposes we will assume that I C = ICEO = 0mA, when
When Vi = 5v, the transistor will be “ON” and design must insured that
The saturation level for the collector current for the circuit is defined by,
IC = VCC / RC
The level of IB in the active region just before saturation results can be
approximated by the following equation,
IB max ≈ IC sat / βdc
For the saturation level we must therefore insure that the following
condition is satisfied:
33
For the network of the above figure (b), when Vi = 5v the resulting level
of IB is
IB = Vi – 0.7 / RB
= 5v – 0.7 / 1.5k
= 2866µA
IC sat = VCC / RC
= 5v / 10kΩ
= 0.5mA
Testing the above equation gives:
IB =2866µA > IC sat / βdc = 0.5mA / 300
pass through a Q- point on the load line that is very close to the vertical
axis.
INVERTER EXAMPLE
34
At saturation,
IC sat = VCC / RC
10mA = 5V / RC
RC = 5V / 10mA = 500Ω
At saturation,
IB ≈ IC sat / βdc = 10mA / 300 = 33 µA
IB = Vi – 0.7V / RB
IB= Vi – 0.7V / 720k or 560k
= 4.3V / 720k or 560k
= 59µA or 76 µA
35
MOTHER BOARD SECTION:
36
Fig-9
This circuit is the brain of the project by this circuit we can control
the device by the help of the mobile and here we used Athmel company
37
microcontroller which is the family of the intel 8051 microcontroller and
it has 40 pin ic which is operates on +5V dc power supply this consume
low power so it is the one advantage of this microcontroller 4 port that
is p0,p1,p2,p3 and pin number 9 is the reset pin which is reset by the
help of reset switch here the reset circuit is consist of one micro switch ,
10uf capacitor and 8.2k resister which is connected according the above
diagram .when we will press the micro switch then the microcontroller is
reset reset means its SP,PS,ACC, etc are reset that means it comes its
original position and here the 31 pin of the microcontroller is connected
to the VCC that specifies the microcontroller use its on chip ROM and
pin no 18and 19 that is XTAL which is connected parallel to the crystal
oscillator through 22pf after that that is connected to the ground and pin
no 20 is grounded and pin no 40 is connected to the +5VDC power
supply and its input and output port is used according to our use .this is
all about microcontroller section.
Features
• Compatible with MCS-51™ Products
• 4K Bytes of In-System Reprogrammable Flash Memory
– Endurance: 1,000 Write/Erase Cycles
• Fully Static Operation: 0 Hz to 24 MHz
• Three-level Program Memory Lock
• 128 x 8-bit Internal RAM
• 32 Programmable I/O Lines
• Two 16-bit Timer/Counters
• Six Interrupt Sources
38
• Programmable Serial Channel
• Low-power Idle and Power-down Modes
Description
The AT89C51 is a low-power, high-performance CMOS 8-bit
microcomputer with 4K bytes of Flash programmable and erasable read
only memory (PEROM). The device is manufactured using Atmel’s
high-density nonvolatile memory technology and is compatible with the
industry-standard MCS-51 instruction set and pinout.
The on-chip Flash allows the program memory to be reprogrammed in-
system or by a conventional nonvolatile memory programmer. By
combining a versatile 8-bit CPU with Flash on a monolithic chip, the
Atmel AT89C51 is a powerful microcomputer which provides a highly-
flexible and cost-effective solution to many embedded control
applications.
Pin Configurations
39
Fig-10
The AT89C51 provides the following standard features: 4K bytes of
Flash, 128 bytes of RAM, 32 I/O lines, two 16-bit timer/counters, a five
vector two-level interrupt architecture,a full duplex serial port, on-chip
oscillator and clock cir-
40
cuitry. In addition, the AT89C51 is designed with static logic for
operation down to zero frequency and supports two software selectable
power saving modes. The Idle Mode stops the CPU while allowing the
RAM,
timer/counters ,serial port and interrupt system to continue functioning.
The
Power-down Mode saves the RAM contents but freezes the oscillator
disabling all other chip functions until the next hardware reset.
Pin Description
VCC
Supply voltage.
GND
Ground.
Port 0
Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port,
each pin can sink eight TTL inputs. When 1s are written to port 0 pins,
the pins can be used as high-impedance inputs.Port 0 may also be
configured to be the multiplexed loworder address/data bus during
accesses to external pro-
gram and data memory. In this mode P0 has internal pull ups.Port 0 also
receives the code bytes during Flash programming, and outputs the code
41
bytes during program verification. External pullups are required during
program verification.
Port 1
Port 1 is an 8-bit bi-directional I/O port with internal pullups.The Port 1
output buffers can sink/source four TTL inputs.When 1s are written to
Port 1 pins they are pulled high by the internal pullups and can be used
as inputs. As inputs,Port 1 pins that are externally being pulled low will
source current (IIL) because of the internal pullups.Port 1 also receives
the low-order address bytes during Flash programming and verification.
Port 2
Port 2 is an 8-bit bi-directional I/O port with internal pullups.The Port 2
output
buffers can sink/source four TTL inputs.When 1s are written to Port 2
pins they are pulled high by the internal pullups and can be used as
inputs. As inputs Port 2 pins that are externally being pulled low will
source current (IIL) because of the internal pullups.Port 2 emits the high-
order address byte during fetches from external program memory and
during accesses to external data memory that use 16-bit addresses
(MOVX @DPTR). In this application, it uses strong internal pullups
when emitting 1s. During accesses to external data memory that use 8-
bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special
Function Register.
Port 2 also receives the high-order address bits and some control signals
during Flash programming and verification.
42
Port 3
Port 3 is an 8-bit bi-directional I/O port with internal pull ups. The Port
3 output buffers can sink/source four TTL inputs.When 1s are written to
Port 3 pins they are pulled high by the internal pullups and can be used
as inputs. As inputs,Port 3 pins that are externally being pulled low will
source current (IIL) because of the pullups.
Port 3 also serves the functions of various special features
43
consisting of a socket for micro controller, input /output pull-up
Introduction
Despite it’s relatively old age, the 89C51 is one of the most popular
since been developed that are based on--and compatible with--the 8051.
controller.
Many web pages, books, and tools are available for the 89C51
developer.
44
The memory types are illustrated in the following graphic. They are: On-
Fig-11
External Code Memory is code (or program) memory that resides off-
Code Memory
45
Code memory is the memory that holds the actual 8051 program that is
to be run. This memory is limited to 64K and comes in many shapes and
sizes: Code memory may be found on-chip, either burned into the
When the program is stored on-chip the 64K maximum is often reduced
to 4k, 8k, or 16k. This varies depending on the version of the chip that is
being used. Each version offers specific capabilities and one of the
46
Programming Tip: Since code memory is restricted to 64K, 89C51
programs are limited to 64K. Some assemblers and compilers offer ways
to get around this limit when used with specially wired hardware.
limited to 64K.
External RAM
times slower!
47
What External RAM loses in speed and flexibility it gains in quantity.
While Internal RAM is limited to 128 bytes (256 bytes with an 8052),
tricks. You may have to do this "by hand" since many compilers and
not support more than 64k of RAM. This is rather strange since it has
been my experience that programs can usually fit in 64k but often RAM
is what is lacking. Thus if you need more than 64k of RAM, check to see
hand.
On-Chip Memory
types: Internal RAM and Special Function Register (SFR) memory. The
48
layout of the 89C51's internal memory is presented in the following
memory map:
Fig-12
the fastest RAM available, and it is also the most flexible in terms of
map. The first 8 bytes (00h - 07h) are "register bank 0". By manipulating
49
certain SFRs, a program may choose to use register banks 1, 2, or 3.
addresses 08h through 1Fh. We'll discuss "register banks" more in a later
chapter. For now it is sufficient to know that they "live" and are part of
internal RAM.
Bit Memory also lives and is part of internal RAM. We'll talk more
about bit memory very shortly, but for now just keep in mind that bit
2Fh.
storage area for the operating stack. This fact severely limits the 8051’s
stack since, as illustrated in the memory map, the area reserved for the
SFR Descriptions
50
There are different special function registers (SFR) designed in side the
89C51 micro controller. In this micro controller all the input , output
SFRs found in the above SFR chart map. It is not the intention of this
P0.7. Writing a value of 1 to a bit of this SFR will send a high level on
level.
51
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and
P3), if your hardware uses external RAM or external code memory (i.e.,
using external RAM chips) you may not use P0 or P2. This is because
the 8051 uses ports P0 and P2 to address the external memory. Thus if
you are using external RAM or code memory you may only use ports P1
from the stack will be read from in Internal RAM. If you push a value
onto the stack, the value will be written to the address of SP + 1. That is
to say, if SP holds the value 07h, a PUSH instruction will push the value
onto the stack at address 08h. This SFR is modified by all instructions
which modify the stack, such as PUSH, POP, LCALL, RET, RETI, and
52
Programming Tip: The SP SFR, on startup, is initialized to 07h. This
means the stack will start at 08h and start expanding upward in internal
RAM. Since alternate register banks 1, 2, and 3 as well as the user bit
will be using the alternate register banks and/or bit memory. It's not a
your programs unless you are 100% sure you will not be using the
DPL and DPH work together to represent a 16-bit value called the Data
53
Programming Tip: DPTR is really DPH and DPL taken together as a
16-bit value. In reality, you almost always have to deal with DPTR one
byte at a time. For example, to push DPTR onto the stack you must first
push DPL and then DPH. You can't simply plush DPTR onto the stack.
execute this instruction, the two bytes are operated upon as a 16-bit
wish to decrement the value of DPTR, you must write your own code to
do so.
modes of the 8051 allow the 8051 to go into a type of "sleep" mode,
54
TCON (Timer Control, Addresses 88h, Bit-Addressable): The Timer
Control SFR is used to configure and modify the way in which the
8051's two timers operate. This SFR controls whether each of the two
located in the TCON SFR. These bits are used to configure the way in
which the external interrupts are activated and also contain the external
interrupt flags which are set when an external interrupt has occurred.
TMOD (Timer Mode, Addresses 89h): The Timer Mode SFR is used
to configure the mode of operation of each of the two timers. Using this
bit auto reload timer, a 13-bit timer, or two separate timers. Additionally,
you may configure the timers to only count when an external pin is
55
the timer is configured in the TMOD SFR; however, these timers always
count up. What is configurable is how and when they increment in value.
the timer is configured in the TMOD SFR; however, these timers always
count up. What is configurable is how and when they increment in value.
P1.7. Writing a value of 1 to a bit of this SFR will send a high level on
level.
serial port. This SFR controls the baud rate of the serial port, whether the
serial port is activated to receive data, and also contains flags that are set
56
Programming Tip: To use the 8051's on-board serial port, it is generally
This is because SCON controls the serial port. However, in most cases
the program will wish to use one of the timers to establish the serial
SBUF (Serial Control, Addresses 99h): The Serial Buffer SFR is used
to send and receive data via the on-board serial port. Any value written
to SBUF will be sent out the serial port's TXD pin. Likewise, any value
which the 8051 receives via the serial port's RXD pin will be delivered
to the user program via SBUF. In other words, SBUF serves as the
output port when written to and as an input port when read from.
P2.7. Writing a value of 1 to a bit of this SFR will send a high level on
57
the corresponding I/O pin whereas a value of 0 will bring it to a low
level.
Programming Tip: While the 8051 has four I/O port (P0, P1, P2, and
P3), if your hardware uses external RAM or external code memory (i.e.,
using external RAM chips) you may not use P0 or P2. This is because
the 8051 uses ports P0 and P2 to address the external memory. Thus if
you are using external RAM or code memory you may only use ports P1
used to enable and disable specific interrupts. The low 7 bits of the SFR
are used to enable/disable the specific interrupts, where as the highest bit
58
P3 (Port 3, Address B0h, Bit-Addressable): This is input/output port 3.
Each bit of this SFR corresponds to one of the pins on the Micro
controller. For example, bit 0 of port 3 is pin P3.0, bit 7 is pin P3.7.
Writing a value of 1 to a bit of this SFR will send a high level on the
PROJECT********************
$mod51
org 0000h
mov p1,#0ffh
mov p0,#00h
mov p3,#00h
mov p2,#00h
start:
59
acall task1
acall task2
acall task3
acall task4
acall task5
acall task6
sjmp start
60
task1:
setb p0.0
setb p2.0
setb p2.1
ret
task2:
setb p0.1
setb p2.0
setb p2.1
ret
61
task3:
setb p0.2
setb p2.0
setb p2.1
ret
task4:
setb p0.3
setb p2.0
setb p2.1
ret
task5:
setb p0.4
62
setb p2.0
setb p2.1
ret
task6:
setb p0.5
setb p2.0
setb p2.1
ret
end
RELAY DRIVER :
A relay is an electrically operated switch. Many relays use an
electromagnet to operate a switching mechanism, but other operating
principles are used. Relays find applications where it is necessary to
control a circuit by a low-power signal, or where several circuits must be
63
controlled by one signal. The first relays were used in long distance
telegraph circuits, repeating the signal coming in from one circuit and
re-transmitting it to another. Relays found extensive use in telephone
exchanges and early computers to perform logical operations. A type of
relay that can handle the high power required to directly drive an electric
motor is called a contactor. Solid-state relays control power circuits with
no moving parts, instead using a semiconductor device triggered by light
to perform switching. Relays with calibrated operating characteristics
and sometimes multiple operating coils are used to protect electrical
circuits from overload or faults; in modern electric power systems these
functions are performed by digital instruments still called "protection
relays".
Fig-13
Relay Switch Characteristics
65
the switch to close and sets off an alarm. Cutting the wires to this relay
also sets off the alarm.
Latching Relays
66
Fig-14
The above circuit is the relay driver by this above circuit we can on or
off the relay easily.
Overload Relays
Fig-15
SIRIUS overload relays with screw-type, spring-loaded or ring cable lug
connections reliably protect loads as well as other switching and
protective devices in the respective load feeder against overload, phase
imbalance and phase failure. Thanks to ATEX certification, they can be
used in many different applications, even under the particularly harsh
conditions of the process industry. The over load relays can easily be
67
used with the contactors of the modular SIRIUS system .There are two
versions of overload relays: thermal and electronic.
In the main circuit, the SIRIUS 3RU thermal overload relays are
responsible for current-dependent overload protection of electrical loads
(e.g. motors). The 3RU2 overload relays are available with spring-
loaded, screw-type and ring cable lug connections - for a particularly
flexible implementation. In the 3RU2 overload relays, the power losses
are 5 to 10 % lower than for the previous models thanks to a new
bimetal technology. Therefore, the temperature within the control
cabinet can be reduced as well.
The 3RB electronic overload relay ensures real commercial added value:
In the main circuit, the electronic overload relays for standard
applications are responsible for current-dependent overload protection of
electrical loads (e.g. motors). Due to the wide current setting ranges,
complete series of motors are covered with just a few types. An
electrical remote reset has been added to the already extensive basic
functions of the 3RB31 version.
For demanding applications, a modular variant of the electronic overload
relay even offers full motor protection by also sensing the temperature of
the motor.
In addition, optimized, uniform accessories are available for 3RU2 and
3RB3. This reduces the costs for the ordering process and for
maintaining stocks.
Electronic overload relay SIRIUS 3RB24 for IO-Link
With the new communication-capable electronic overload relay SIRIUS
3RB24 for IO-Link you can easily connect your load feeder to a higher-
level control and therefore its integration in your automation
68
environment. As the electronic overload relay supports the transmission
of analog process variables like currents, system processes can be
optimized, e.g. through load monitoring.
Moreover, you will profit from an increased system availability and
easier system documentation – thanks to integrated diagnostic functions
and readable parameter assignment. In combination with contactors, the
overload relay can also be employed as direct, reversing and star-delta
starter.
69
B U Z Z E R D R I V E R
V C C
B U Z Z E R
1 .5 K
D A T A
I N P U T B C 5 4 7
Fig-17
It is a device that converts electrical signal to an audible signal (sound signal).The Microcontroller
cannot drive directly to the buzzer, because the Microcontroller cannot give sufficient current to drive the
buzzer for that we need a driver transistor (BC547), which will give sufficient current to the
buzzer.Whenever a signal received to the base of the transistor through a base resistance (1.5k) is high,
the transistor comes to saturation condition i.e. ON condition thus the buzzer comes to on condition with
a audible sound. Similarly, whenever the signal is not received to the base of the transistor, thus the
transistor is in cut-off state i.e. is in OFF state thus the buzzer does not gets activated.
ADVANTAGES:-
70
1.This project is very convenient .
2. Easy to installed.
3.Very Sensitivity.
4.Cheaper.
5.Less consumption.
DISADVANTAGES:-
CONCLUSION:-
By the help of this project we can secure office, industries, Bank
and Home easily through electronics security system.
71
REFERENCES:-
[1] Radar communication systems by Sharma and Sinha Tata
Mc-Graw Hill publication.
[2] Wireless Communication by Kennedy
[3] Infra Red systems by Robert L. John
[4] Microcontroller and microprocessor by Bhupendra Singh
Chabra ,Dhanpat raj publishers.
5.Electronics principle By V.K Meheta.
6.Op-amp Principle By Gaykward.
7.Electronics For You Magazine
8.Transistor Theory By Boylstude
[1] www.efy.com
[2]Www.aircraftindia.com
[3] Www.drdo.in
[4] American radar systems Wikipedia files.
[8] Infra Red systems IEEE materials.pdf files
[9]www.8051project.com
72