Architecture of Intel 8085

INTEL-8085 is the most popular 8-bit Microprocessor developed by the Intel Corporation
Features of Intel 8085 Microprocessors
 Intel 8085 is an 8-bit NMOS Microprocessor
 It is a 40 pin IC package fabricated on a single LSI chip.
 It uses a single +5V dc supply for its operation.
 Its clock speed is about 3 MHz and a single clock cycle is 320 ns. The clock cycle of
8085AH-2 processor is 200ns.
 It has 80 basic instructions and 246 opcodes.
 It has 3 main sections namely (i) Arithmetic and Logic Unit (ALU), (ii) Timing and Control
Unit, (iii) a set of Registers

Fig 1. : Internal Architectural Block Diagram of Intel 8085 microprocessor

Arithmetic and Logic Unit (ALU)

 The Arithmetic and Logic Operations performed by the ALU are:
 Addition
 Subtraction
 Logical AND
 Logical OR,
 Logical EXCLUSIVE OR
  Complement (logical NOT)
 Increment (add 1)
 Decrement (subtract 1)
 Left Shift, Rotate Left, Rotate Right
 Clear etc.

Timing and Control Unit

It acts as the brain of the Computer System
 It generates the timing and control signals necessary for the execution of Instructions.
 It controls the data flow between CPU and the memory and the peripherals.
 It provides status, control and timing signals which are required for the operation of
memory and I/O devices.
 It controls the entire operations of the microprocessor and the peripherals connected
to it.

Registers in Intel 8085

 Registers are used by the microprocessor for temporary storage and manipulation of
data and instructions.
 Data remain in the registers till they are sent to the memory or I/O devices.
The registers available in Intel-8085 are:
(i) One 8-bit Accumulator (ACC) i.e. A Register
(ii) Six 8-bit General Purpose Registers. These are B, C, D, E, H and L
(iii) One 16-bit Stack Pointer, (SP)
(iv) One 16-bit Program Counter (PC)
(v) Instruction Register
(vi) Temporary Register
Intel-8085 has a set of five flip flops which serve as flags also known as status flags. A
status flag is a flip flop which indicates some condition which arises after the execution of an
arithmetic or logical instruction.

Accumulator (ACC)
 The Accumulator (ACC) is an 8-bit register associated with the ALU.
 It is also known as A Register.
 It holds one of the operands of an arithmetic or logical operation.
 The other operand for an arithmetic or logical operation is stored in the memory or in
one of the general purpose registers.
 It servers as one input to the ALU.
 If the operation requires only one operand it is placed in Accumulator.
 The intermediate and final results are stored in the Accumulator.
Special Case
DAD rp is a 16 bit addition instruction in which the H-L pair registers acts like an
Accumulator for 16 bit addition operation. One of the 16 bit operand is placed in HL pair and
the other operand is kept either in B-C or D-E pair. Finally the result is placed in the H-L pair.
General-Purpose Registers
 The Intel-8085 processor has six 8-bit general purpose registers. They are B, C, D, E, H
and L registers.
 To hold 16-bit data a combination of two 8-bit registers can be employed. These
register combinations are called register pairs.
 The valid register pairs in the Intel-8085 microprocessor are B-C, D-E, and H-L.
 The programmer cannot form a register pair by selecting any two registers of his
choice.
 The H-L pair is used to act as a memory pointer and so it holds the 16-bit address of a
memory location.
 The general-purpose registers and the accumulator are accessible to programmer.

Program Counter (PC)

 It is a 16-bit special purpose register. It is used to hold the memory address of the next
instruction to be executed.
 It keeps track of memory addresses of the instructions in a program while they are
being executed.
 The microprocessor increments the content of the Program Counter, so that it points
to the address of the next instruction in the program at the end of the execution of an
instruction.

Stack Pointer (SP)

 It is a 16-bit special function register. It holds the address of the top element of data
stored in the stack.
 The stack is a sequence of memory locations set by the programmer store/retrieve the
contents of accumulator, flags, program counter and general purpose registers during
the execution of a program.
 Stack works on the LIFO (Last In First Out) principle.
 The stack is defined and the Stack Pointer is initialized by the programmer at the
beginning of a Program.

Instruction Register (IR)

 The Instruction Register holds the Opcode (Operational Code) of the instruction to be
decoded and executed.

Temporary Register
 It is an 8-bit register associated with the ALU. It holds data during an
Arithmetic/Logical operation. It is used by the microprocessor. It is not accessible to
programmer.

Status Flags (of Flag Register)

  The Intel 8085 microprocessor contains 5 flip flops to serve as status flags. The flip
flops are set or reset according to the conditions which arise during an arithmetic or
logical operation. The five Status flags of Intel 8085 are:
i. Carry Flag (CS)
ii. Parity Flag (P)
iii. Auxiliary Carry Flag (AC)
iv. Zero Flag (Z)
v. Sign Flag (S)
Carry Flag (CS)
 After the execution of an arithmetic instruction if a carry is produced, the Carry Flag CS
is set to 1. otherwise it is set to 0.
 The Carry Flag is set or reset for addition and subtraction operations. If the addition
operation yields a carry or the subtraction operation yields a borrow the carry flag is
set to 1. Otherwise it is set to 0
Parity Flag (P)
 The parity flag is set to 1 if the result of an arithmetic or logical operation has even
number of 1’s. For odd number of 1’s it is set to 0.
Auxiliary Carry Flag (AC)
 The Auxiliary Carry Flag AC holds carry out of the bit number 3 to the bit number 4
resulting from the execution of an arithmetic operation.
Zero Flag (Z)
 The Zero status flag Z is set to 1, if the result of an arithmetic or logical operation is
zero. If the result is not zero, the flag is set to 0.
Sign Flag (P)
 The Sign status flag S is set to 1, if the result of an arithmetic or logical operation is
negative. If the result is positive, the flag is set to 0.
PSW : Five bits used as status flags and the three undefined bits are called collectively as
Program Status Word.

Fig 2. :Status Flags of Intel 8085 microprocessor

Data and Address BUS
 Intel 8085 is an 8-bit microprocessor with 8-bit wide data bus. This indicates that 8-
bits of data can be transmitted to or from the microprocessor
 The Intel-8085 requires a 16-bit wide address bus as the memory addresses are 16
bits.
 The 8 most significant bits of the address are transmitted by the address bus (pins A 8
to A15) and the 8 least significant bits of the address are transmitted by Address/Data
bus (pins AD0 to AD7).
 The Address/Data bus transmits data and address at different moments. Thus the AD
bus operates in time shared mode. This is known as Multiplexing.
 First all the 16-bits of memory address is transmitted by the microprocessor. (8 MSBs
in the A-bus and 8 LSBs in the AD bus)
 The 8 LSBs of the address is latched either into the memory or in an external latch so
that the complete 16-bit memory address remains available for further operations.
 After latching of the 8 LSBs the AD bus becomes free and available for data
transmission.
 A total of 216 = 65,536 = 64KB (1 KB = 1024 bytes) memory locations can be addressed
directly by Intel 8085

Pin Configuration of INTEL-8085 Microprocessor

Fig 2. :Pin Configuration of Intel 8085 microprocessor

A8 – A15 (output)
These pins carry the 8 MSBs of the 16-bit addresses or 8 bits of the I/O address.
AD0 – AD7 (output)
These are time multiplexed address/data bus i.e. they serve dual purpose. They are used to
carry 8 LSBs of the memory address or I/O address during the first clock cycle of the machine
cycle. The same lines are used for carrying data during the second & third clock cycles.
ALE (output)
It is known as Address Latch Enable (ALE) Signal. It goes high during the first clock cycle of the
machine cycle and enables the lower 8 bits of the address to be latched either into the
memory or external latch.
IO/M (output)
This is a status signal which distinguishes whether the address is for memory of I/O device.
When it goes high the address on the address bus is for an I/O device. When it goes low the
address on the address bus is for memory location.
S0, S1 (output)
These are the status signals sent by the microprocessor to distinguish the various types of
operation as given in the following table.

Table 1 : Status Signals and their respective operations

S1 S2 Operations

0 0 HALT
0 1 WRITE

1 0 READ
1 1 FETCH

RD (output)
This signal is used to control READ operation. When it goes low the selected memory or I/O
device is read.
WR (output)
This signal is used to control WRITE operation. When it goes low the data on the data bus is
written into the selected memory or I/O location.
READY (Input)
It is used by the microprocessor to sense whether a peripheral is ready to transfer data or
not. A slow peripheral may be connected to the microprocessor through ready line. If the
READY is high the peripheral is ready. If it is low, the microprocessor waits till it goes high.
HOLD (input)
It indicates that another device is requesting for the use of the address and the data bus.
When a HOLD request is received by the microprocessor it hands over the use of the busses
as soon as the current machine cycle is completed. The internal operations of the
microprocessor may continue during this time. The processor regains the control when the
HOLD signal is removed. When a HOLD signal is acknowledged, address bus, data bus, RD, WR
and IO/M are tri-stated.
HLDA (output)
This signal is used as acknowledgement for the HOLD signal. The HLDA signal goes high and
the microprocessor relinquishes the control of the busses. After the removal of the HOLD
request the HLDA goes low and the microprocessor takes over control of the buses after half
clock cycle.
INTR (input)
It is an interrupt request signal with lowest priority. When this signal goes high the Program
Counter does not increments its content and the microprocessor suspends the normal
sequence of instruction and executes the CALL instruction to attend the interrupted
program. The INTR is sampled in the last state of the last machine cycle of an instruction. This
interrupt can be enabled or disabled by software. An interrupt is used by I/O devices to
transfer data to the microprocessor without wasting its time.
INTA (output)
It is an interrupt acknowledgement signal sent by the microprocessor after INTR is received.
RST 5.5, 6.5, 7.5 and Trap (inputs)
All these are interrupt signals. When an interrupt is recognized the next instruction is
executed from the fixed location in the memory as given below.
Table 2 : Hardware interrupts and their interrupt routine memory locations
LINE LOCATION FROM WHICH THE
NEXT INSTRUCTIO IS PICKED UP

TRAP 0024
RST 5.5 002C
RST 6.5 0034
RST 7.5 003C
RST 5.5, RST 6.5, RST 7.5 are the restart interrupts. They cause an internal restart to be
automatically inserted. Each of them has a programmable mask. The TRAP has the highest
priority among interrupts. It is a nonmaskable interrupt. It is unaffected by any mask or
interrupt enable. The order of priority of interrupts can be given as follows.

Table 3 : Oder of Priority of Interrupts in Intel 8085 microprocessor

TRAP

RST 5.5
RST 6.5
RST 7.5
INTR (lowest Priority)
RESET IN (input)
It resets the Program Counter to zero. It also resets interrupt enable and HLDA flip-flops. It
does not affect any other flag or register except the instruction register. The CPU is held in
reset condition as long as the RESET IN is applied.
RESET OUT (output)
It indicates that the CPU is being reset.
X1, X2 (input)
These are the terminals to be connected to an external crystal oscillator which drives an
internal circuitry of the microprocessor to produce a suitable clock for the operation of
microprocessor.
CLK (output)
It is a clock output for user and this can be used as input clock for other digital ICs.
SID (input)
It is a data line for serial input.
SOD (output)
It is a data line for serial input.
VCC +5 Volt power supply.
VSS Ground Reference.