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Universiti Teknologi MARA: Total Marks

This document is a laboratory activity assignment for a digital electronics course. It consists of 7 activities investigating the functions of basic logic gates like AND, OR, NOT, NAND, NOR and XOR gates. Students are instructed to set up circuits using different integrated circuits and complete truth tables for each gate by observing output levels for different input combinations. The last activity involves a 3-input AND gate.

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Sarah Naddhirah
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0% found this document useful (0 votes)
71 views

Universiti Teknologi MARA: Total Marks

This document is a laboratory activity assignment for a digital electronics course. It consists of 7 activities investigating the functions of basic logic gates like AND, OR, NOT, NAND, NOR and XOR gates. Students are instructed to set up circuits using different integrated circuits and complete truth tables for each gate by observing output levels for different input combinations. The last activity involves a 3-input AND gate.

Uploaded by

Sarah Naddhirah
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Total Marks:

Universiti Teknologi MARA


Faculty of Computer and Mathematical Sciences
/30
ITT470 Digital Electronics
Laboratory Activity
________________________________________________________________________________

# Name Student ID Group Signature


1 NURINA NAYLI BINTI AHMAD SANUSI 2017488204 RCS14
34H
2 SARAH NADHIRAH BINTI AZIMI 2017298882 RCS14
34H
3 ZULIA SYAFIKA BINTI SALEHUDDIN 2017289978 RCS14
34H

LAB ACTIVITY 1

Investigating functions of basic and gate combinations (CO-1, CO-4)

Requirements

a. IC tester
b. Power supply
c. Digital trainer
d. Connection wire
e. Wire stripper
f. ICs
i. One 7408 (Quad two-input AND gate)
ii. One 7432 (Quad two-input OR gate)
iii. One 7404 (NOT or Inverter gate)
iv. One 7400 (Quad two-input NAND gate)
v. One 7402 (Quad two-input NOR gate)
vi. One 7486 (Quad two-input XOR gate)
vii. One 7411 (Triple 3 input AND gate)

1 OCT2018
Activity 1A (4 marks)

Investigating function of 7408 AND gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 1.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 and SW2 switches.

3. Complete the truth table in Table 1. SW1 and SW2 switch represent A and B
variables.

A B Y (Shown on L1)
Y  A. B
0 0 1
0 1 1
1 0 1
1 1 1

Table 1

Figure 1

SEPT22012
Activity 1B (4 marks)

Investigating function of 7432 OR gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 2.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 and SW2 switches.

3. Complete the truth table in Table 2. SW1 and SW2 switches represent A and B
variables.

A B Y (Shown on L1)
Y  AB
0 0 0
0 1 0
1 0 1
1 1 1

Table 2

Figure 2

SEPT32012
Activity 1C (2 marks)

Investigating function of 7404 NOT gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 3.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 switches.

3. Complete the truth table in Table 3. The SW1 switch represents A variable.

A Y (Shown on L1)
Y  A
0 1
1 1

Table 3

Figure 3

SEPT42012
Activity 1D (4 marks)

Investigating function of 7400 NAND gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 4.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 and SW2 switches.

3. Complete the truth table in Table 4. SW1 and SW2 switches represent A and B
variables.

A B Y (Shown on L1)
Y  A. B
0 0 1
0 1 1
1 0 1
1 1 1

Table 4

Figure 4

SEPT52012
Activity 1E (4 marks)

Investigating function of 7402 NOR gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 5.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 and SW2 switches.

3. Complete the truth table in Table 5. SW1 and SW2 switches represent A and B
variables.

A B Y (Shown on L1)
Y  A B
0 0 0
0 1 0
1 0 1
1 1 1

Table 5

Figure 5

SEPT62012
Activity 1F (4 marks)

Investigating function of 7486 XOR gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 6.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1 and SW2 switches.

3. Complete the truth table in Table 6. SW1 and SW2 switches represent A and B
variables.

A B Y (Shown on L1)
Y  A B
0 0 0
0 1 1
1 0 0
1 1 1

Table 6

Figure 6

SEPT72012
Activity 1G (8 marks)

Investigating function of 7411 3-input AND gates

Procedure

1. Use connection wires to set-up the circuit shown in Figure 6.

2. Measure the output level at point L1 (LED number 1 on the digital trainer unit)
based on different inputs of SW1, SW2 and SW3 switches.

3. Complete the truth table in Table 6. SW1 and SW2 and SW3 switches represent A, B
and C variables.

A B C Y (Shown on L1)
Y  A. B .C
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

Table 7

L1

Figure 7

SEPT82012

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