Bipolar Junction Transistors (BJTs)

• Basically two back-to-back diodes

• Immensely important device
• Name originates from Transfer of Resistor
• Three-Layer/Terminal [Emitter (E), Base
(B), Collector (C)] Two-Junction [Base-
Emitter (BE), Base-Collector (BC)] device
• Current through two terminals (E and C)
can be controlled by the current through the
third terminal (B)
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• Active device  capable of producing
voltage/current/power gain
• Two basic usage:
– Amplification (Analog Circuits)
– Switching (Digital Circuits)
• Two types: npn and pnp
• We will be discussing only npn BJTs
• Bipolar: both electrons and holes contribute
to current transport through the device
• Current controlled device
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Symbol and Current /Voltage Convention:
* For an npn transistor, the collector and C
–
base currents (IC and I B respectively) VBC
n
IC
+
p
flow in and the emitter current (I E ) B
+ IB n IE
flows out of the transistor VBE –
 Applying KCL, treating the whole of the E

transistor as a big node:

IE = IC + IB
* E and C are n-type, while B is p-type
* Note the notational convention of the applied
voltages (VBE and VBC )  p-side first
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Modes of Operation:
* BE and BC junctions can either be forward or
reverse biased  4 possible modes of operation
 Forward Active: BE junction forward biased
BC junction reverse biased
 Reverse Active: BE junction reverse biased
BC junction forward biased
 Saturation: Both junctions forward biased
 Cutoff : Both junctions reverse biased

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 VBC

quadrant II quadrant I
(reverse active) (saturation)

0
VBE
quadrant III quadrant IV
(cutoff) (forward active)

Quadrants III and IV: Analog Domain

Quadrants I and III: Digital Domain
Quadrant II: Finds use only in TTL circuits

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Operation in the Forward Active (FA) Mode:
Depletion
Region
Emitter Collector
+ – –
n e e
IE – IC
1 e 3
p
E Base C
2
– –
+
h n

E
VBE IB VBC
(positive) (negative)
+ +
B

1 Injection Component
2 Recombination Component
3 Collection Component
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* BE junction forward biased: electrons injected
from E to B, thus emitter current (I E ) flows out
of the emitter terminal
* In B, electrons diffuse towards the BC junction
due to the presence of diffusion gradient
Note: electrons are minority carriers in p-base
* In this process, some electrons will recombine
with the majority carriers (holes) present in B
* The holes lost due to this recom bination process
will be supplied by the external circuit , thus,
base current (I B ) flows into the base terminal
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* Electrons, which did not recombine, will reach
the edge of the BC depletion region, and will
get swept to C by the junction electric field
* Thus, collector current (I C ) flows into the C
terminal
* A small change in I B can cause a large change in
I C to I E ratio, due to a phenomenon known as
base control
* For a good transistor, I B should be as small as
possible  the base region should be as thin
as possible
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Current Gain:
* Note that the sum of the collection component and
the recombination component must always equal
the injection component (charge conservation)
 IE  IC  IB
* Common-Emitter Current Gain () = IC I B
* Common-Base Current Gain () = IC I E
* Thus, β = α  1  α  and α = β  β + 1 
* For a good transistor, I B should be as small as
possible  α  1, and β is quite large (~ 100 -500 )
* Closer is the value of α to 1, better is the BJT!
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Current -Voltage Characteristic:
* Note that BE junction basically is a diode
 I E  I ES exp  VBE VT   1  I ES exp  VBE VT 
 BE junction is sufficiently forward biased
 The  1 term can be neglected
 I ES : Reverse saturation current of the BE junction
 VT : Thermal Voltage (= kT/q) = 26 mV at room
temperature (T = 300 K )
* Thus, IC = I E = IS exp  VBE VT 
 IS  I ES  saturation current of the BJT
 I B = I E  IC
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Output Characteristic:
* Note: VC  VCE (variable), also I B is variable
* When BJT is in the forward active mode, VBE
VC
is assumed to get clamped at 0.7 V (about 100 IC

mV above Vγ )  Thumb rule +

Q VCE
* Now, VCE = VBE  VBC +
VBE –
IB
–
* Thus, for all values of VCE > 0.7 V , VBC is
negative, implying the BC junction remains
reverse biased , and forward active operation
is maintained

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* For VCE = 0.7 V,VBC = 0
 BC junction is neither forward nor reverse
biased  it is actually under zero bias
* As soon as VCE drops below 0.7 V , VBC changes
sign and becomes positive
 BC junction is now forward biased, and
forward active mode of operation is lost
 BJT enters saturation mode of operation,
with both junctions forward biased
 VCE = 0.7 V is known as onset of saturation

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* Once VCE drops below 0.7 V, the BJT enters the
saturation mode of operation
* With further reduction in VCE , the BJT moves deeper
into saturation
 This is the mode of operation of BJTs for digital
circuits, however, BJTs used in analog circuits
should never ever enter this mode of operation
  A quick check is needed to ensure that VCE is
greater than 0.7 V in analog circuits

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 saturation
IC forward active

IB4

IB3

IB2

IB1

0
VCE
IB4 > IB3 > IB2 > IB1
onset of
saturation

npn BJT Output Characteristic

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Why VBE = 0.7 V?:
* Note: I E (and thus I C ) varies exponentially with
respect to VBE
 A small change in VBE can cause a very large
change in I C
* As a rule of thumb, VBE under the forward active
mode is assumed to get pinned at 0.7 V
 This is a heuristic used for quick estimate
 The answer may not be accurate, however,
good enough!

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Degree of Saturation (DoS):
* In saturation, BC junction also becomes forward
biased and collector starts injecting electrons to base
* The base gets flooded with minority carriers
(electrons), with a corresponding increase in
recombination, and thus, the base current (I B,sat )
* Note that at the same time, the collector current (I C,sat )
starts to drop due to this reverse injection process
* The net effect is a drop in β  in the saturation
region, β is denoted by βsat (= IC,sat I B,sat ) , and
has a value smaller than that in the FA region
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 β
* DoS  , and has a value  1
βsat
* Note: At onset of saturation, DoS = 1, and as the
BJT is driven deeper and deeper into saturation,
the value of DoS keeps on increasing
* The value of DoS is a tell -tale sign of judging how
deeply the transistor is driven into saturation
* Commonly used values: VBE(FA) = 0.7 V, VCE(FA) > 0.7 V,
VCE(OS) = 0.7 V, VCE(HS) = 0.1 V, VBE(HS) = 0.8 V
OS : Onset of Saturation, HS : Hard Saturation

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Load Line Analysis:
VCC
VB  VBE
* IB  , with VBE  0.7 V (FA mode )
RB RC
IC

* Also, IC = I B (Note: Independent of R C )

RB +
* Thus, for different values of VB , we VB Q
+
VCE
would get different values of I B , and IB VBE
–
–
correspondingly different values of IC
 A series of output characteristics (i.e., IC versus
VCE ) can be drawn
* The DC operating point or the Q -point can lie
anywhere on any of these curves
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* Also, by varying VB smoothly, almost a continuous
variation of I B can be obtained, which would yield
almost continuous values of IC
* Thus, the output characteristics, in effect, completely
fill up quadrant I
* Now, to fix a unique bias point , we need to draw the
load line, and the intersection point of this load line
with the particular characteristic for a given VB and
I B would give us the information about the Q -point
VCC  VCE
* Load line equation: IC 
RC
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* 2 boundary points:
 IC  0, VCE  VCC
 VCE  0, IC  VCC / R C
* Joining these two points by a straight line gives the
load line
* This line will intersect with the output characteristics
at infinite number of points
* Each of these points is a possible operating point
* The best choice for the operating point (or Q-point)
is right at the center of the load line:
 VCEQ(best )  VCC 2 and ICQ(best )  VCC  2R C 
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* Justification:
 When this circuit is to be used as an amplifier ,
then an ac small -signal vi will be superimposed
on the DC bias voltage VB
 This would cause the dynamic operating point
to move along the load line in either direction
 As it shifts towards the VCE axis, Q moves
towards cutoff  since I C decreases  , and as it
moves towards the I C axis, Q moves towards
saturation  since VCE decreases 
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 If Q enters either cutoff or saturation region,
then it would produce clipping  or distortion 
in the output voltage v 0
 If the Q -point is located exactly at the center
of the load line, then the maximum possible
undistorted peak -to-peak swing of the output
voltage v0 will be achieved
 Golden Rule of Thumb for BJT biasing

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 saturation
IC forward active
IC,max =
IB5 > IB4 > IB3 > IB2 > IB1
VCC/R C
IB5
vi
IC4 IB4
Q-point
ICQ IB3 = IBQ
t
IC2 IB2

IB1
VCEQ VCC
VCE

load
line

v0
DC (or Quiescent) Power Dissipation
of the Transistor = VCEQ  ICQ
t

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What is the Role of RC?:
* For fixed VB (and thus, I B ):
 As R C decreases, IC,max will increase
 Q moves towards cutoff
 v 0 will get clipped during positive half cycle
 As R C increases, IC,max will decrease
 Q moves towards saturation
 v 0 will get clipped during negative half cycle
 In either of these two cases, the range of the
maximum undistorted peak -to-peak output
voltage swing will be correspondingly reduced
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Observations:
* If R C is very high, then the load line may not
have any intersection point at all with the output
characteristics under the FA region, and the
Q-point will move to the saturation region
 Disastrous way to bias a transistor for analog
circuit applications
* A transistor biased in the FA region behaves like an
ideal current source with infinite output resistance
* However, if a transistor is biased in the saturation
region, it ceases to behave like a constant current source
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* In the saturation region, IC becomes a strong function
of VCE , showing very small output resistance
* Transistors used in analog circuit applications like
amplifiers, should always be biased in the FA region,
where IC does not show any dependence on VCE
 I CQ would not change with any variation of VCE
* This is important to maintain constant values of all the
ac small -signal model parameters (to be discussed)
* If ICQ varied with VCE , then the behavior of the circuit
would become erratic

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AC Small -Signal Model:
* Representation of the transistor as a linear network
* Actual model is quite tedious and complicated
* Here, we will present the simplest one, known as
the low -frequency T-model C
ic
* It consists of only 2 parameters:
  (or ): Common-Emitter (or B
ib ib = ie

Common-Base ) +
rE
Current Gain
vbe ie = ( + 1)ib
 rE : Incremental Emitter Resistance = ic/
– E
 dVBE dI E  VT I EQ  VT ICQ (    1)
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* Note: rE is expressed in terms of ICQ (or I EQ )
 The linearization is done around the DC
bias point (Q-point )
  DC analysis must precede ac analysis
in order to obtain the bias point information,
and thus, the value of rE
* Also, note the v be = ie rE , which can also be written
as: v be = (+1)i b rE  i b rE  i b r , with r  rE
 r is another small -signal parameter , defined
as incremental base -emitter resistance
 Note that this resistance appears in the base lead
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Analysis of Amplifiers Using Transistors:
* The analysis proceeds as follows:
 First, DC biasing analysis is done, which
yields the DC bias point (Q-point )
 Gives ICQ and VCEQ
 ICQ is needed to obain the values of the
small -signal parameters
 VCEQ is needed to ensure that the transistor is
biased in the FA region (VCEQ  0.7 V, and
ideally VCC /2, known as the best bias point )

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* Then, the transistor is replaced by its ac small -
signal model
* Subsequently, usual network analysis is
done to obtain:
 Voltage Gain (A v )
 Current Gain (Ai )
 Power Gain (A p  A v  Ai )
 Input Resistance (R i )
 Output Resistance (R 0 )

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Biasing:
* Fixing the DC operating point (known as the Q -
point or Quiescent Operating Point )
* Defined by two parameters: ICQ and VCEQ , with the
subscript Q denoting the Q -point values
* If the transistor is to be used as an amplifier (analog
application), then it must be biased in the FA region
* On the other hand, if the transistor is to be used as a
switch (digital application), then it must toggle
between cutoff and saturation modes of operation

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