Interrupt

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MICROCONTROLLER

INTERRUPT
Lecturer: Dr. Bui Ha Duc
Dept. of Mechatronics
Email: ducbh@hcmute.edu.vn

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Communicate with physical world

inputs

Physical Microcontroller
world

outputs

2
Software flow
Method 1: Polling
• Simple, easy to
setup
• Work well for
simple tasks

Polling method for simple


application processing

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Software flow
• Can be expanded to
support multiple
processes

Disavantages?
• Hard to apply to
complex task
• difficult to define
priorities between
different services
• poor responsiveness
• Waste energy Polling method for application with
multiple devices that need processing
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Interrupt Driven
Method 2: Interrupt
• Waste energy -> sleep
mode, peripheral can
wake up the processor
when it requires a service

• difficult to define priorities


between different
services
-> peripherals are Simple interrupt-driven application
assigned with different
interrupt priority levels
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Multi-tasking systems
• Task need to be processes concurrently
-> Real-time operating system (RTOS) to create schedules

Using an RTOS to handle multiple tasks 6


Interrupt
• An interrupt is a signal informing a program that an event
has occurred.
• Interrupt signals can cause a program to suspend itself
temporarily to service the interrupt.
• Example:

1) You’re reading a book.


2) The delivery person rings bell.
3) Stop reading.
4) Bookmark your current page.
5) Get the delivery.
6) Go back to the marked page.
7) Resume reading from where you left off.

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How CPU processes the Interrupt
1. Finish processing 2. Run interrupt 3. Resume
current instruction. Save service routine. main program
program counter and Restore Program
flags to stack counter and flags
from stack

http://learn.mikroe.com/ebooks/piccprogramming/chapter/pic16f887-basic-features/ 8
Interrupt Service Routine (ISR)
• Subroutines used to service an
interrupt are call ISR

• Each interrupt has an ISR which has


an address listed in Interrupt Vector
Table

• Processor obtains the subroutine Program memory


address from the vector table and
directs the execution to the ISR

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Types of Interrupts
• Maskable interrupt: is a hardware interrupt that can be
ignored by setting interrupt registers
• Interrupts from peripheral modules
• E.g. adc interrupt, uart interrupt
• External pin interrupts
• E.g external interrupt

• Non-maskable interrupts (traps): is a hardware interrupt


that can never be ignored.
• E.g Watch-dog timer, hardware fail
• Software interrupt: is an interrupt generated within a
processor by executing an instruction.

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Pic18F Interrupts
PIC18 Microcontroller family
• Has multiple sources that can send interrupt requests
• Does not have any non-maskable or software interrupts;
• All interrupts are maskable (can be disabled)
• Has a priority scheme divided into two groups
• High priority vector, address 0x000008
• low priority, address 0x000018
• Uses many Special Function Registers (SFRs) to
implement the interrupt process

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PIC18 Interrupt Sources
• Divided into two groups:
• External sources
• Internal peripheral sources
• External sources:
• Three pins of PORTB -RB0/INTO, RB1/INT1,and RB2/INT2 (edge
driven)
• Change in logic levels of pins RB4-RB7 of PORTB can be
recognized as interrupts
• Internal peripheral sources
• Timers, A/D Converter, Serial I/O, and Low-Voltage Detection
Module

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PIC18 Interrupt Sources
• To recognize the occurrence of an interrupt request, the
MPU needs to check the following three bits:
• The flag bit (IF) to indicate that an interrupt request is present
• Automatically set by hardware if an interrupt occur
• Must be clear in interrupt service function manually
• The enable bit (IE) to redirect the program execution to the interrupt
vector address
• The priority bit (IP) (if set) to select priority

Interrupt
IF
event
& & CPU
IE
𝐈𝐏/𝐈𝐏 GIE

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Interrupt Diagram

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Interrupt Priority

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Interrupt registers
10 SFRs used to setup the interrupt process:
• RCON Register Control (global priority)
• INTCON Interrupt Control
• INTCON2 Interrupt Control2 Handle external sources
• INTCON3 Interrupt Control3
• PIR1 and PIR2 Peripheral Interrupt Register1 & 2 Handle
• PIE1 and PIE2 Peripheral Interrupt Enable 1 & 2 internal
sources
• IPR1 and IPR2 Interrupt Priority Register 1 & 2

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Interrupt registers
• RCON
• Enable interrupt priority by setting bit IPEN to 1

• C code:
RCONbits.IPEN = 1;

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Interrupt registers
• INTCON

PEIE/GIEL: Peripheral Interrupt Enable bit


When IPEN = 0:
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
When IPEN = 1:
1 = Enables all low-priority peripheral interrupts (if GIE/GIEH = 1)
0 = Disables all low-priority peripheral interrupts

GIE/GIEH: Global Interrupt Enable bit


When IPEN = 0:
1 = Enables all unmasked interrupts
0 = Disables all interrupts
When IPEN = 1:
1 = Enables all high-priority interrupts
0 = Disables all interrupts
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Interrupt registers
• INTCON

___IE: Interrupt Enable bit ___IF: Interrupt Flag bit


1 = Enables the interrupt • Automatically set by hardware
0 = Disables the interrupt • Must be clear by software

• C code
ADCON1 |=0x0F; // make all IO pins digital
TRISB = 1; // make RB0 input
RCONbits.IPEN = 1;
INTCONbits.INT0IE = 1; // enable INT0 interrupt
INTCONbits.GIEH = 1; // enable high priority
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Interrupt registers
• INTCON2

INTEDGx: External Interrupt x Edge TMR0IP: TMR0 Overflow


Select bit, x=0~2 Interrupt Priority bit
1 = Interrupt on rising edge 1 = High priority
0 = Interrupt on falling edge 0 = Low priority

RBPU: PORTB Pull-up Enable bit RBIP: RB Port Change Interrupt


1 = All PORTB pull-ups are disabled Priority bit
0 = PORTB pull-ups are enabled by individual port latch 1 = High priority
values 0 = Low priority

• C code
INTCON2bits.INTEDG0 = 1; //make INT0 positive edge trigger

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Interrupt registers
• INTCON3

INTxIP: INTx External Interrupt INTxIE: INTx External Interrupt INTxIF: INTx External Interrupt
Priority bit, x = 1~2 Enable bit, x = 1~2 Flag bit, x = 1~2
1 = High priority 1 = Enable INTx interrupt
0 = Low priority 0 = Disable INTx interrupt

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Peripheral Interrupt Register
• Each peripheral interrupt is control by 3 bit IF, IE, IP in peripheral
registers
• Interrupt Flag register 1

• Interrupt enable register 1

• Interrupt Priority register 1

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Peripheral Interrupt Register
• Interrupt Flag register 2

• Interrupt enable register 2

• Interrupt Priority register 2

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Writing an ISR in C
• An interrupt service routine is recognized by the keyword
interrupt, followed by the name of the routine.
void interrupt Myint(void) Interrupt function
{
//Body of the interrupt service routine
//Clear interrupt flags
}
• The interrupt priority can be specified after the keyword
interrupt
void interrupt low_priority Myint(void){
}
void interrupt high_priority Myint(void){
}
• It is important to place as little code as possible inside the
interrupt function.

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Writing an ISR in C
• The interrupt function may have to deal with multiple interrupt
sources
• Check the interrupt flag and enable bit to determine which interrupt is
called
int tick_count;
void high_priority interrupt tcInt(void)
{
if (TMR0IE && TMR0IF) { // any timer 0 interrupts?
TMR0IF=0;
++tick_count;
}
if (TMR1IE && TMR1IF) { // any timer 1 interrupts?
TMR1IF=0;
tick_count += 100;
}
// process other interrupt sources here, if required
return;
}

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INTx Pin Interrupts
• 3 External interrupts on
• RB0/AN12/INT0/FLT0/SDI/SDA
• RB1/AN10/INT1/SCK/SCL
• RB2/AN8/INT2/VMO
• These interrupts are edge trigger

Rising/positive edge Falling/negative edge


INTEDGx = 1 INTEDGx = 0
• When a valid edge appears on the RBx/INTx pin,
• corresponding flag bit, INTxIF, is set.
• Interrupt service function will be called
• Flag bit, INTxIF, must be cleared in software in the Interrupt Service
Routine
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PORTB Interrupt-on-Change
• The interrupt can be enabled/disabled by setting/clearing
enable bit, RBIE (INTCON<3>).
• When input state at any pin in PORTB<7:4> change
• Interrupt flag bit RBIF will be set by hardware
• Flag bit must be cleared in software in the Interrupt Service Routine
• Interrupt priority for PORTB interrupt-on-change is
determined by the value contained in the interrupt priority
bit, RBIP (INTCON2<0>).

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Example

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