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Instruction Execution: Straight-Line Sequencing and Branching

The document discusses different instruction execution methods, including straight-line sequencing and branching. It also covers addressing modes such as immediate, register, register indirect, autoincrement/autodecrement, direct, indirect, relative, indexed, base register, and relative addressing. These addressing modes specify how the location of an operand is identified in an instruction.
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100% found this document useful (1 vote)
556 views19 pages

Instruction Execution: Straight-Line Sequencing and Branching

The document discusses different instruction execution methods, including straight-line sequencing and branching. It also covers addressing modes such as immediate, register, register indirect, autoincrement/autodecrement, direct, indirect, relative, indexed, base register, and relative addressing. These addressing modes specify how the location of an operand is identified in an instruction.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Instruction Execution: Straight-

line sequencing and branching


Instruction Execution and Straight-Line
Sequencing
Address Contents

i
Assumptions:
Begin execution here Move A,R0
i+4
3-instruction
program
- One memory operand
Add B,R0
segment per instruction
i+8 Move R0,C
- 32-bit word length
- Memory is byte
addressable
A - Full memory address
can be directly specified
in a single-word instruction
B Data for
the program
Two-phase procedure
-Instruction fetch
-Instruction execute
C

A program for C ← [Α] + [Β].


i Move NUM1,R0

Branching i+4
i+8
Add
Add
NUM2,R0
NUM3,R0




i + 4n - 4 Add NUMn,R0
i + 4n Move R0,SUM




SUM
NUM1
NUM2




NUMn

A straight-line program for adding n numbers.


Move N,R1

Branching LOOP
Clear R0

Determine address of
"Next" number and add
Program "Next" number to R0
loop
Decrement R1
Branch>0 LOOP
Branch target
Move R0,SUM

Conditional branch



SUM
N n
NUM1

Using a loop to add n numbers. NUM2




NUMn
Condition Codes
• Condition code flags
• Condition code register / status register
• N (negative)
• Z (zero)
• V (overflow)
• C (carry)
• Different instructions affect different flags
Conditional Branch Instructions
• Example: A: 11110000

A: 1 1 1 1 0 0 0 0 +(−B): 1 1 1 0 1 1 0 0

B: 0 0 0 1 0 1 0 0 11011100

C=1 Z=0
N=1
V=0
Status Bits

Cn-1
A B

Cn ALU
F
V Z N C
Fn-1

Zero Check
Addressing Modes
Generating Memory Addresses
• How to specify the address of branch target?
• Can we give the memory operand address
directly in a single Add instruction in the loop?
• Use a register to hold the address of NUM1;
then increment by 4 on each pass through the
loop.
Addressing Modes

• Implied
Opcode Mode ...

– AC is implied in “ADD M[AR]” in “One-Address”


instr.
– TOS is implied in “ADD” in “Zero-Address” instr.
• Immediate
– The use of a constant in “MOV R1, 5”, i.e. R1 ← 5
• Register
– Indicate which register holds the operand
Addressing Modes
• Register Indirect
– Indicate the register that holds the number of the
register that holds the operand R1
MOV R1, (R2)
R2 = 3
• Autoincrement / Autodecrement
– Access & update in 1 instr. R3 = 5

• Direct Address
– Use the given address to access a memory location
Addressing Modes
• Indirect Address
– Indicate the memory location that holds the
address of the memory location that holds the
data
AR = 101

100
101 0 1 0 4
102
103
104 1 1 0 A
Addressing Modes

• Relative Address
0
– EA = PC + Relative Addr 1
PC = 2 2

100
AR = 100
101
102 1 1 0 A
Could be Positive or 103
Negative 104
(2’s Complement)
Addressing Modes
• Indexed
– EA = Index Register + Relative Addr

Useful with XR = 2
“Autoincrement” or
“Autodecrement”
+

100
AR = 100
101
Could be Positive or
Negative 102 1 1 0 A
(2’s Complement) 103
104
Addressing Modes
• Base Register
– EA = Base Register + Relative Addr

Could be Positive or AR = 2
Negative
(2’s Complement)
+

100 0 0 0 5
BR = 100
101 0 0 1 2
102 0 0 0 A
Usually points to 103 0 1 0 7
the beginning of 104 0 0 5 9
an array
Addressing Modes
Name Assembler syntax Addressingfunction
• The different
ways in which Immediate #Value Op erand = Value
the location of
an operand is Register Ri EA = Ri
specified in an Absolute (Direct) LOC EA = LOC
instruction are
referred to as Indirect (Ri ) EA = [Ri ]
addressing (LOC) EA = [LOC]
modes.
Index X(R i) EA = [Ri ] + X

Basewith index (Ri ,Rj ) EA = [Ri ] + [Rj ]


Basewith index X(R i,Rj ) EA = [Ri ] + [Rj ] + X
and offset

Relative X(PC) EA = [PC] + X

Autoincrement (Ri )+ EA = [Ri ] ;


Increment Ri

Autodecrement − (Ri ) Decrement R i ;


EA = [Ri]
Indexing and Arrays
• Index mode – the effective address of the operand is
generated by adding a constant value to the contents of a
register.
• Index register
• X(Ri): EA = X + [Ri]
• The constant X may be given either as an explicit number
or as a symbolic name representing a numerical value.
• If X is shorter than a word, sign-extension is needed.
Indexing and Arrays
• In general, the Index mode facilitates access to
an operand whose location is defined relative
to a reference point within the data structure
in which the operand appears.
• Several variations:
(Ri, Rj): EA = [Ri] + [Rj]
X(Ri, Rj): EA = X + [Ri] + [Rj]
Relative Addressing
• Relative mode – the effective address is determined by
the Index mode using the program counter in place of
the general-purpose register.
• X(PC) – note that X is a signed number
• Branch>0 LOOP
• This location is computed by specifying it as an offset
from the current value of PC.
• Branch target may be either before or after the branch
instruction, the offset is given as a singed num.

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