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Lab Report 01

The document introduces the Qsys tool in Quartus II, which allows designing digital hardware systems by configuring components like processors, memories, and I/O interfaces in a graphical interface. It generates the hardware system to be operated by the user. The steps shown include running Qsys, inserting a clock, Nios II processor, on-chip memory, I/O, and interface modules, connecting the modules, setting simulation options, and generating Verilog code for the designed system in Quartus II. The conclusion states that Qsys is a flexible tool that allows prototyping hardware virtually with more freedom.

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0% found this document useful (0 votes)
56 views6 pages

Lab Report 01

The document introduces the Qsys tool in Quartus II, which allows designing digital hardware systems by configuring components like processors, memories, and I/O interfaces in a graphical interface. It generates the hardware system to be operated by the user. The steps shown include running Qsys, inserting a clock, Nios II processor, on-chip memory, I/O, and interface modules, connecting the modules, setting simulation options, and generating Verilog code for the designed system in Quartus II. The conclusion states that Qsys is a flexible tool that allows prototyping hardware virtually with more freedom.

Uploaded by

Bassim
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Introduction to Qsys Tool

OBJECTIVE:
To implement the Project using Qsys tool in Quartus II.
INTRODUCTION:
Altera’s Qsys system integration tool is used to design digital hardware systems that
contain components such as processors, memories, input/output interfaces, timers. The Qsys
tool allows a designer to design some desired system by configuring the components in a
graphical user interface. It then automatically generates the hardware system that is to be
operated by the user.
1) Run the Quartus II 13.0 software, Run the Qsys tool.

Figure 1: Quartus Start-up Window

2) The Qsys tool user interface is as

Figure 2: Qsys Tool Interface


Introduction to Qsys Tool

3) Insert the clock which of 50 MHz and it is External clock named clk_0

Figure 3: Setting Clock

4) Insert the Nois ii/e processor by Clicking the Embedded Processor > Nios II Processor

Figure 4: Setting Nios II Processor


Introduction to Qsys Tool

5) Insert the On chip memory module by clicking the memories and memory Controllers>
on chip> on chip RAM ROM:

Figure 5: Inserting On-chip memory Module

6) Insert the I/O’s i.e. 8 Bit input Switches and 8 Bit Output LEDs.

Figure 6: Configuring I/O's


Introduction to Qsys Tool

7) Make the Memory Modules Connections

Figure 7: Connecting Memory Modules

8) Insert the Interface Module i.e. JTAG UART

Figure 8: Interface Module JUAG UART


Introduction to Qsys Tool

9) Make the Memory Modules Connections

Figure 9: Qsys Configuration Window

10) Make the connection of the memory with the Nios ii Processor.

Figure 10: Connecting Modules


Introduction to Qsys Tool

11) Make the connection:

Figure 11: Complete Design

12) Set the Simulation options and generate the Qsys project for Quartus II

Figure 12: Generating Verilog Code

CONCLUSION:
The Qsys tool proves to be a flexible & versatile engineering tool that promises to allow
designers to prototype a hardware with more freedom, virtually. The hardware descriptive
language is a more economical solution of experimentation & research of more exotic hardware
designs.

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