Type PBLSB

Static Low Impedance Busbar Protection

Type PBLSB
Static Low Impedance
Busbar Protection

PBLSB scheme

Introduction
PBLSB is a modular, solid state, low
impedance, high speed, biased
differential protection system based
on the well proven circulating
current principle. This system
provides continuous supervision of
current transformer secondary
circuits, stability during external fault
conditions and high speed of
operation for internal faults.

Features
• Fully static design • Dual bias characteristic protection.
• Full stability in the event of • Built-in provision for LBB and By suitable selection of subracks,
throughfaults isolator repeat relays schemes of protection can be
• High speed operation • Logically designed modular assembled to suit any busbar
• Easily adaptable to different bus subrack design.
configuration. Type PBLSB is supplied
configurations. factory assembled, prewired and
tested in cubicle form. It is based on
• Fully isolated dc auxiliary supply, Application three standard subracks housed in a
using dc/dc converter
The relay is suitable for the protection 19” subrack. These are assembled
• Current transformers of different of indoor or outdoor high voltage together to produce the required
ratios can be accommodated substation busbars, with or without schemes of protection. The subracks
• Main current transformer equal ratio current transformers and are interconnected via standard
secondary circuits are not switched is particularly suitable for stations multicore cables.
• Phase segregated measurement where only a single CT core is The subracks available are classified
available on every circuit for busbar

2
by function as follows: circumstances would not have monitors the time gap between the
exceeded the overcurrent check appearance of the bias current and
– Power supply subrack
setting. the differential current. If differential
– Measuring subrack current is delayed as compared to
– Feeder subrack Biased differential bias current the biased differential
element final output timer will be blocked.
– Bus coupler (BC)/Bus section This amounts to blocking the
(BS)/ Transfer bus coupler (TBC) Separate measuring modules have measurement in effect. Hence the
subrack. been provided for each phase and timer will not issue tripping signal.
they are interchangeable even at The blocking will be ensured for the
The principle of operation site and easily configurable by period during which CT is under
selection of jumpers provided in the saturation. Hence this feature
The relay design is based on the well
PCB. Each module receives the enhances the throughfault stability.
known merz-price circulating current
respective bias, differential and
principle. The enhanced throughfoult
setting inputs and gives supervision, Operation with saturated
stability is achieved by the
trip outputs for each phase. The
combination of the following
bias voltage (Vb), differential voltage
current transformers
– Bias characteristic with 80% slope (-Vd) and setting voltage (Vs) are fed The relay has an internal/external
to the biased differential circuit as fault detector which gives the logic
– Current transformer saturation
shown in the differential circuit output as to whether the fault is
detector
Figure 5. If the instantaneous value internal or external. The principle is
– Transient bias of Vd is less than (Vs+Vb), the relay again based on the instant of
Differential busbar protection has has a restraining tendency. If (-Vd) is appearance of the bias and
traditionally relied upon the low more than (Vs+ Vb), the relay has differential signal, the information of
impedance of saturated current operating tendency. The bias which is being used in CT saturation
transformers to shunt current away characteristic has dual slope of 20% level detector. For internal fault, both
from the measuring circuit to ensure upto rated current and 80% slope the bias and the differential signals
stability under through-fault beyond rated current and as shown will appear at the same instant
condition. However this imposes a in Figure 7. The operating whereas for external fault with CT
limit on external burden upto which characteristic for different saturation, this will not be true and
stability can be maintained. overcurrent check settings is shown there would be small time gap
in Figure 8. For operation, the zone between appearances of bias and
In PBLSB, the saturation level should be enabled by choosing ‘IN’ differential signal. Once the fault is
detectors are built-in to disable facility from the front panel detected as internal, the logic
measurement in the event of CT disables the CT saturation detector
saturation and this avoids the value Stability with saturated circuit and transient bias and hence
of external burden having an high speed operation is ensured.
adverse effect on the stability of
current transformers
The above logic is explained in the
protection for external faults. During an external fault, one of the Figures 4 & 5.
current transformers may saturate. A
Overcurrent check differential current will be produced Transient bias
function by the unsaturated current
transformers. The principle used in The transient bias feature is
The measuring subrack is provided the PBLSB is to detect CT saturation incorporated to enhance the bias
with overcurrent check feature. This and block the measurement for that during external faults for increased
element has adjustable current portion of the cycle during which stability. The internal/external fault
settings and can be set at 1.5 times saturation occurs and hence the detector circuit as already explained
maximum load current. The final stability is achieved. provides the information the nature
trip from the busbar protection of fault whether internal or external.
will be issued only on operation of For the waveforms shown in Figure For external fault, the bias is raised
both biased differential element 3, I2 is distorted due to saturation. to a much higher level and falls
and overcurrent check element. The differential current id = i1-i2 exponentially to the steady state
Refer Figure 8. (resultant current) flows in the value.
differential circuit only during the
In the case of substation where only period in which saturation occurs. The combination of steady state
a single CT core is available for Since the current transformer is likely bias, transient bias and saturation
busbar protection, the provision of to saturate after a small duration detectors provides exceptionally high
overcurrent check feature will be of from zero crossing, the differential throughfault stability without the
immense help as it prevents final trip current will appear, only after the need for external stabilising resistor.
of CT open circuit under normal appearance of bias signal(Ib) which The elimination of stablilising
operating condition. This is because is equal to ½i1½ + ½i2½. Hence the CT resistor ensures that the PBLSB
the differential current under such saturation detector constantly presents a low burden to the current

3
transformers. This reduces the of two MSTZ03 power supplies are K = At least 30 (or)
current transformer requirements. required for a PBLSB scheme of 2 Maximum bus fault level
zones. One power supply is used to
2.0 x Reference CT ratio
CT secondary supervision power electronic circuit and the
The element monitors the differential other to power isolator repeat relays The magnetising current
circuit and produces output signal and opto isolators. Additional power requirement will be less than 3% of
during CT secondary wire faulty supplies are required for schemes relay rated current at Vk/4.
conditions if the differential current having more than two zones.
exceeds the supervision reference Auxiliary current
setting. The output signal initiates CT ratio matching transformer requirements
the timer with a fixed time delay of 3
Interposing current transformers are The specification for magnetising
seconds which ensures that nuisance
necessary if current transformers of characteristic of protection class
alarm will not be initiated for
different CT ratios are allotted for (class PS) ICT is as given below.
primary system fault conditions. This
busbar protection. The ICT ratios
element energises the output relay
can be selected to match with the Vk ³ 60 volts for 1A secondary
the contact of which can be 12 volts for 5A secondary
highest CT ratio and the ratio will be
connected for alarm/trip logic.
1/(Ratio of CT for which ICT is Imag £ 30mA at Vk/4 for 1A
required/maximum CT raito) secondary.
Isolator repeat relays 150mA at Vk/4 for 5A
The relay is provided with inbuilt For example, if 800/1A and 400/1A secondary.
isolator repeat relays which switches CTs are existing in different circuits,
the secondary of transformer of the ICTs can be connected in series with Technical data
relay. Hence the possibility of main 400/1A and is of the ratio
CT open circuiting can be avoided.
The isolator auxiliary contacts (NO/ 400 Ratings
1/ = 1/0.5
NC) is wired to the isolator repeat 800 AC current (In): 1A or 5A
relays coil. The isolator repeat relays The ICTs will be external to the relay Frequency: 50Hz
are powered by a separate dc/dc and mounted in the control panel.
converter.
Auxiliary DC supply (Vx)
These are bistable relays and will Main current transformer
Voltage Operating Minimum
remain in the same status even in requirements rating range dc volts for
the event of loss of dc power supply.
PBLSB requires at least a single core (V dc) (V dc) startup (± 5%)
The isolator repeat relays are so
designed such that the continuous on all outgoing/incoming circuits 24/27 16.8-35.6 19.2
drain on the battery will be and two cores on bus coupler/ 48/54 33.6-71.2 38.4
minimum. Refer Figure 6. transfer bus coupler/bus section. 110/125 77 -165 88
The knee point voltage requirement 220/250 154-330 176
The isolator operation is indicated of protection class (class PS) CT on
through LEDs on the front panel of individual circuit is as given below.
feeder subrack. The isolators that MRr Settings
are operational for a particular bus Vk ³ K ICT (RCT + 2RL + B + Z) MR
C
Differential current setting:
layout will be indicated by suitable where
0.2 to 0.7 (xIn) in steps of 0.1In
buttons on the front ponel.
Vk = Knee point voltage
Overcurrent check unit setting:
Local breaker backup ICT = Rated CT secondary 0.5 to 1.5 (xIn) in steps of 0.25 In
scheme current
CT supervision current setting:
RCT = Resistance of CT secondary 0.1 to 0.3 (xIn) in steps of 0.05 In
The relay provides input terminals
winding
for wiring the potential free contacts CT supervision time delay:
of an external LBB relay. In case of RL = Resistance of single lead 3 sec ± 10% (fixed)
breaker failure conditons, the back from CT to relay
Stabilising factor:
tripping is effected through PBLSB
B = ohmic burden of PBLSB Dual slope characteristic, 20% slope
for bus clearance. The LBB input is
upto rated current and 80% slope
through an opto isolator which MRr = CT ratio for reference
after rated current
provides high isolation. circuit (ie. that circuit with
the highest ratio CTs) Operating time:
DC power supply Typical 20m. sec
MRc = CT ratio for circuit under
Maximum 25m. sec
The scheme derives its power from consideration
external dc/dc converter, of type Through-fault stability:
Z = Ohmic burden of ICTs.
MSTZ03-Power Supply. A minimum Generally in excess of 40 times the
highest circuit rating
4
Contact ratings Fast transient burst susceptibility test:
IEC 801-4 std
Current Make and carry Make and carry Break
continuously for 0.2 second IEC 255-22-4

AC 5A 7500 VA with 1250 VA with Environmental specification

maxima of 30 A maxima of 5 A Temperature:
and 300 V and 300 V
Storage and transit –25°C to 70°C

DC 5A 7500 W with 50 W (resistive) Operating range –10°C to 55°C

maxima of 30 A 25 W (inductive) IEC 68-2-1:1990
and 300 V (L/R = 0.04 sec.) IEC 68-2-2:1974
with maxima of Humidity:
5 A and 300 V 56 days (at 93% RH and at +40°C)
IEC 68-2-3:1969
Thermal rating Insulation withstand Enclosure protection:
Continuous: 2 x In AC inputs:2 KV rms for 1 minute to IP 50 dust protected (individual
IEC 255-5:1977 all circuits and to subracks)
Short time: 20 In for 3 secs.
IS 3231:1986 case earth IEC 529:1989
Scheme burden Vibration:
Output contacts:
AC burden: 1 KV rms for 1 minute across open 0.5g between 10Hz and 300Hz
0.05VA at rated current contacts IEC 255-22-1:1988 class II

DC burden: Isolator repeat inputs: Outline arrangement:

1 KV rms for 1 minute between Refer Figures 9A, 9B, 9C & 9D.
Subrack Quiescent Operated
circuits and case
Measuring 40Walt 40 Watt Information required with
subrack LBB inputs:
2 KV RMS for 1 minute between order
Feeder Subrack - 20 Watt
circuits and case. 1. Single line diagram of the
Buscoupler/ busbar arrangement showing
High voltage impulse withstand:
Bussection/ - 20 Watt the position of current
5 KV peak, 1.2/50 µsecs, 0.5 joule
Transfer Bus transformers available for
IEC 255-5:1977
Coupler subrack busbar protection.
IS 8686:1977
Contact arrangement High frequency interference: 2. Current transformers Ratio, Vk,
Tripping/Alarm: 2.5 KV peak between independent RCT, Imag at RL
4 make self reset contact per circuit. circuits and between circuits and (Exclusive for busbar protection)
Additional hand reset trip relays can case earth, I KV peak across input
be connected externally for contact circuits. IEC 255-22-1:1988 class III
multiplication. IS 8686:1977
Operation indication:
Light emitting diodes for tripping
and also for isolator position in
feeder subracks.

SURFACE LAYOUT
12345678901
12345678901
PS PS PS 12345678901
12345678901
for for for 12345678901
12345678901
Feeder Z1&Z2 Z3&Z4 12345678901
12345678901
Z1 Z2

Z3 Z4

F1 F2 F3 F4

BS BC

BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
BC - BUS COUPLER

Figure 1A:
Typical connection diagram of PBLSB (without independent check
zone) Double Bus Arrangement

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 SURFACE LAYOUT

12345678901
1234567890
12345678901
1234567890
PS PS 12345678901
1234567890
12345678901
1234567890
12345678901
1234567890
for for 12345678901
1234567890
Feeder Z1&Z2 12345678901
1234567890
12345678901
1234567890
Z1 Z2

F1 F2 F3 F4

BS (Spare)

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER

Figure 1B:
Typical connection diagram of PBLSB (without independent check
zone) Single Bus Arrangement

Figure 1C:
Output tTrip contact logic for busbar protection without
independent check features

PS PS PS PS
Z1 Z2

Z3 Z4

ZCHK

F1 F2 F3 F4

BS BC

BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
BC - BUS COUPLER
TBC - TRANSFER BUS COUPLER
ZCHK - CHECK ZONE

Figure 2A:
Typical connection diagram of PBLSB (with independent check zone)
Double Bus Arrangement

6
 123456789
123456789
123456789
123456789
PS PS PS
21 22

ZCHK

F1 F2 F3 F4
BS BS/BC/TBC
(Spare)
BS BC

PS - POWER SUPPLY Z - MAIN ZONE

BS - BUS SECTION F - FEEDER
TBC - TRANSFER BUS COUPLER
ZCHK - CHECK ZONE

Figure. 2B:
Typical connection diagram of PBLSB (with independent check
zone) Single Bus Arrangement

Figure 2C:
Output trip contact logic for busbar protection with independent
check features

Figure 3:
Stability with saturated CTs

7
 Internal
fault

id

i2

Bias

id

t=o=t Inhibit pulse

Trip level for timer

Timer

Figure 4:
Operation with saturated CTs

Figure 5:
Measuring circuit flock diagram (single phase)

8
 Figure 6:
Isolator repeat relay circuit

10
10

8
8

Operating region
Operating region
Differential current + I1 - I2

6
6
Differential current + I1 - I2

4
4

Restraining region
Restraining region
2 2
Overcurrent check

Overcurrent check
0 0
0 2 4 6 8 10 12 0 2 4 6 8 10 12
Bias current = êI1ê + êI2ê Bias current = êI1ê + êI2ê
Overcurrent check
Overcurrent check and Trip
and Bias differential
Trip Trip logic
Bias differential

Figure 7:
Figure 8:
Operating characteristics
Relay operating characteristics
(bias differential)

9
 ALSTOM Limited Pallavaram Works: 19/1, GST Road, Pallavaram, Chennai-600 043. India.
Tel: 91-044-2368621 Fax: 91-044-2367276 Email: [email protected].
© 1998 ALSTOM Limited

Our policy is one of continuous development. Accordingly the design of our products may change at any time. Whilst every effort is made to produce up to date literature, this brochure should
only be regarded as a guide and is intended for information purposes only. Its contents do not constitute an offer for sale or advice on the application of any product referred to in it.
ALSTOM Limited cannot be held responsible for any reliance on any decision taken on its contents without specific advice.

PR:053:0799:A Printed in India.