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01 Instruction Sets Characteristics and Addressing Modes

The document provides an overview of instruction sets, describing their key characteristics and functions. It defines an instruction set as the complete collection of instructions understood by a CPU, usually represented in machine code or assembly code. Each instruction contains an operation code, source and destination operand references, and may implicitly reference the next instruction. The document discusses important instruction set design decisions around operations, data types, instruction formats, registers, and addressing modes. It also outlines the main types of instructions - data transfer, arithmetic, logical, and control flow instructions - and provides examples.

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219 views20 pages

01 Instruction Sets Characteristics and Addressing Modes

The document provides an overview of instruction sets, describing their key characteristics and functions. It defines an instruction set as the complete collection of instructions understood by a CPU, usually represented in machine code or assembly code. Each instruction contains an operation code, source and destination operand references, and may implicitly reference the next instruction. The document discusses important instruction set design decisions around operations, data types, instruction formats, registers, and addressing modes. It also outlines the main types of instructions - data transfer, arithmetic, logical, and control flow instructions - and provides examples.

Uploaded by

Mahfuz Sojib
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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CMPE 311

Instruction Sets:
Characteristics and Functions
Addressing Modes

Slides modified from multiple sources


1. William Stallings Computer Organization and Architecture, 7th Edition
2.James Peckol, Embedded systems Design
What is an Instruction Set?
• The complete collection of instructions that
are understood by a CPU
• Machine Code
• Binary
• Usually represented by assembly codes
Elements of an Instruction
• Operation code (opcode)
– Do this: ADD, SUB, MPY, DIV, LOAD, STOR
• Source operand reference
– To this: (address of) argument of op, e.g.
register, memory location
• Result operand reference
– Put the result here (as above)
• Next instruction reference (often implicit)
– When you have done that, do this: BR
Example: Simple Instruction Format
(using two addresses)
Instruction Cycle State Diagram
Design Decisions (1)
• Operation
– How many ops?
– What can they do?
– How complex are they?
• Data types (length of words, integer
representation)
• Instruction formats
– Length of op code field
– Length and number of addresses (e.g., implicit
addressing)
Design Decisions (2)
• Registers
– Number of CPU registers available
– Which operations can be performed on which
registers? General purpose and specific
registers
• Addressing modes (see later)
• RISC v CISC
Instruction Types
• Data transfer: registers, main memory,
stack or I/O
• Data processing: arithmetic, logical
• Control: systems control, transfer of
control
Data Transfer Instructions

• Are responsible for moving data around


inside the processor as well as brining in
data or sending data out
• Examples: Store, load, exchange, move,
set, push, pop
• Each Instruction should have:
• source and destination (memory, register,
input/output port)
• amount of data
fig_01_16
Data Transfer Instructions Example
Arithmetic
• Add, Subtract, Multiply, Divide for signed
integer (+ floating point and packed
decimal) – may involve data movement
• May include
– Absolute (i.e |a|)
– Increment (i.e a++)
– Decrement (i.e a--)
– Negate (i.e -a)
Logical
• Bitwise operations: AND, OR, NOT, XOR,
CMP, SET
• Shifting and rotating functions, e.g.
– logical right shift for unpacking: send 8-bit
character from 16-bit word
– arithmetic right shift: division and truncation
for odd numbers
– arithmetic left shift: multiplication without
overflow
0

Different
Shift
Instructions

S is sign bit
Systems Control and Execution Flow
• The execution flow captures the order of
evaluation/execution of each instruction
– Sequential
– Branch
– Loop
– Procedure or Function call
Branch
• Skip, e.g., increment and skip if zero:
ISZ Reg1, cf. jumping out from loop
• Branch instructions: BRZ X (branch to X if
result is zero), BRP X (positive), BRN X
(negative), BRE X,R1,R2 (equal)
• Procedure (economy and modularity): call
and return
Branch Instruction
Nested Procedure Calls
fig_01_20
fig_01_22

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