I.J.

Modern Education and Computer Science, 2010, 1, 1-8

Published Online November 2010 in MECS (http://www.mecs-press.org/)

Professional Courses for Computer Engineering

Education
Yinan Kong
Department of Electronic Engineering, Macquarie University, North Ryde, NSW, Australia
Email: [email protected]

Yimin Xie
Department of Electronic Engineering, Macquarie University, North Ryde, NSW, Australia
Email: [email protected]

Abstract—A sequence of professional courses of study in lists of abilities they wanted their engineers to possess
Computer Engineering at the authors’ university was (e.g. Boeing's Desired Attributes of an Engineer).
initiated. These included Digital Fundamentals, A CDIO (conceive-design-implement-operate)
Programmable Logic Design, Computer Hardware and program [2] is based on the principle that product and
Digital Systems Design. This paper presents a study on how
the problem based learning has been used for these courses.
system lifecycle development and deployment are the
It also describes how CDIO (Conceive, Design, Implement, appropriate context for engineering education. The CDIO
Operate) concepts have been applied with an overview of all concepts, which basically are a model of the entire
the hardware resources necessary to support the degree. product cycle, form a worldwide initiative in Engineering
Education. CDIO is considered the context for
Index Terms—Computer Engineering, Engineering engineering education in that it is the cultural framework,
Education, Problem Based Learning, CDIO, Digital or environment, in which technical knowledge and other
Systems. skills are taught, practiced and learned.
B. The Computer Engineering Degree
I. INTRODUCTION There are several basic courses that are common to all
the Engineering degrees at the Department of Electronic
The Problem Based Learning (PBL) approach has been Engineering at the authors’ university. Apart from them,
used in the development of a sequence of professional there are four specialized professinal courses compulsory
courses for the degree of Computer Engineering at the for the Computer Engineering Degree: Digital
authors’ university [1]. Team-based projects form major Fundamentals (in the first year), Programmable Logic
components of these courses. All the projects follow the Design (in the second year) and Computer Hardware and
CDIO (Conceive, Design, Implement, Operate) context Digital Systems Design (in the third year). The scope of
of engineering education that is being adopted by the topics covered in the four courses is represented by
considerable computer and engineering departments the content of the textbooks and references shown below
world-wide. in Table I.
A. CDIO Concepts
Engineering education has evolved into the teaching of II. DIGITAL FUNDAMENTALS
engineering science where teaching engineering practice Digital Fundamentals is the fundamental course for
was increasingly de-emphasized. Industry in recent years Computer Engineering as well as a few other Engineering
has found that graduating students, while technically degrees. Enrolments have been over 150 since 2008.
adept, lack many abilities required in real-world
engineering situations. Hence, major companies created

TABLE I.
AUTHOR(S) OF TEXT/REFERENCE BOOKS
Text/Reference
Course Author
Book
Digital Fundamentals T. Floyd Text [3]
Digital Fundamentals R. J. Tocci, N. S. Widmer and G. L. Moss Reference [4]
Programmable Logic Design T. Floyd Reference [5]
Computer Hardware P. Spasov Text [6]
Computer Hardware R. J. Dirkman and J. Leonard Reference [7]

Copyright © 2010 MECS I.J.Modern Education and Computer Science, 2010, 1, 1-8
I.J.Modern Education and Computer Science, 2010, 1, 1-8
Published Online November 2010 in MECS (http://www.mecs-press.org/)

Digital Systems Design C. H. Roth and L. K. John Text [8]

(a) Parity (b) Data Bus (c) Multiplexing

Figure 1. Concept-specific hardware trainers for Digital Fundamentals

To foster the Problem Based Learning component, a 01 02 03 04 05 06 07 08

set of hardware, concept-specific trainers, is developed N
Pymble
for the eleven practical sessions throughout the course
and it also needs to be used for demonstrations in class. 28
The requirements for these trainers are the hardware has
to be easy to setup, and also that the printed-circuit board 27 Waste 09
(PCB) must be fully operational after the connection of
26 10
the power supply (and clock). It must not require any
additional wiring (or, in some cases, a minimum amount 25 11
of wiring) from the first-year undergraduates and all the 24 Macquarie 12
relevant signals must be labeled and monitored by light- 23 13
emitting diodes (LEDs).
For this reason, a typical trainer of this type was
designed to include small interactive PCBs that focus on
digital concepts of parity, multiplexing, 22 Ryde
adder/accumulators, flip-flops/counters, data bus and shift 21 20 19 18 17 16 15 14
registers. Then the advantage is realized in that the PCB
is exercised by setting switches or pressing pushbuttons Figure 2. The traffic intersection for the project in
(to provide a single clock pulse), and by monitoring Programmable Logic Design
signals using the LEDs or a logic analyzer. This exactly
satisfies the requirement of a simple class demo and also A. Hardware Resources for Project Based Learning
achieves the aim of spurring the interest of new
Programmable Logic Devices (PLDs) such as the
undergraduates in digital systems design. Fig. 1 shows
Xilinx range of Field Programmable Gate Arrays
three of these PCBs.
(FPGAs) [9] provide educators with a huge scope for the
definition of design and build projects in the field of
III. PROGRAMMABLE LOGIC DESIGN
digital systems. There are many examples of these
For the inaugural delivery of Programmable Logic projects which include a traffic-light controller, arithmetic
Design in 2007, a PBL approach was used where student logic units (ALUs) for computers, floating-point
teams were required to develop a digital controller on an arithmetic units, frequency meters, boundary-scan testers
FPGA to control the traffic flow of a complex traffic and simple computers.
intersection. The problem is an identifiable, real-world A PCB with LEDs in positions corresponding to those
problem, and there is a huge scope for ingenuity in each in the physical intersection was prepared to facilitate
of the conceive, design, implement and operate stages of testing. This is shown in Fig. 3(a). To support those teams
the problem solution. A diagram of the traffic intersection who may opt for VHDL implementation [10], a new PCB
is shown in Fig. 2. containing a FPGA and a microcontroller, together with a
At this intersection, there are ten sets of red, amber and model of the intersection, has been developed. This is
green lights for vehicular traffic, and all of the 16 lanes shown in Fig. 3(b). To facilitate the development of a
for traffic approaching the intersection could be installed prototype, a PCB with a static RAM and tri-state buffers
with traffic sensors. There are other lights and sensors for has been built. This is shown in Fig. 3(c). The hardware
pedestrian traffic. This is an 8-week project where resources for PBL have helped students gain the skills
students worked 3-4 hours each week on it in groups of 4. necessary to develop complex digital systems.

Copyright © 2010 MECS I.J.Modern Education and Computer Science, 2010, 1, 1-8
 Professional Courses for Computer Engineering Education 3

(c) RAM & Tri-state

Buffers

(a) Traffic Intersection (b) CPLD & Traffic Intersection

Figure 3. PBL hardware modules in Programmable Logic Design.

B. CDIO Stages for a Traffic-Light Controller alerted to this possibility. In 2010, most of the teams took
The documentation of the project identifies about thirty this “hint”, and were able to complete the project on time.
problems classified under the conceive, design, Take the issue of hierarchical design as an example.
implement and operating issues of the project. Examples Six traffic flows of the intersection are usually identified
of the problems of each of the conceive, design, at the top hierarchical level of design as shown in Fig. 4.
implement and operate issues are listed in Table II. Each flow has its own operating features which turn out
to be the second level of design, and each operation has
TABLE II. its own combination of states of traffic lights to be
EXAMPLES OF CDIO ISSUES FOR A TRAFFIC LIGHT designed at the bottom level.
CONTROLLER IN PROGRAMMABLE LOGIC DESIGN Further details of each of the 30 issues are given in the
CDIO Stage Problem Area student  documentation. A standard tabular form is used.
Conceive Inputs and Outputs for Digital Control References to text/reference books are sometimes given.
Conceive Simplification of Controller An example is given in Table III.
Specifications In the implement stage, the hardware implementation
for preliminary development in order tools using FPGA technology are illustrated in Fig. 5.
to establish the design procedure The operate stage also uses the hardware models of the
before the final design is initiated intersection shown in Fig. 5.
Conceive Control Algorithms
Design Hierarchical Design C. Documentation
Design FSM (Finite State Machine) State A standard format (in an A4-size sheet) has been used
Coding for the documentation of each issue. This documentation
Design One-Hot Encoding is included in the notes that are available at the beginning
Design Synchronous Delay Circuit of the semester before the start of the team project. The
Design Design for Testability documentation gives students some background or insight
Implement FPGA to the CDIO issues and suggests meaningful activities.
Implement VHDL [11] Table II and Table III are both typical examples of
Operate Testing the documentation.
Operate Real-time Operation
IV. COMPUTER HARDWARE
In the first Conceive stage, the customer needs are Computer Hardware is a third-year course teaching the
defined and the technology to be used is determined from principle and applications of microcontrollers. A special
the technology taught in this course: Field Programmable microcontroller trainer was developed for this course.
Gate Arrays (FPGAs). The detailed specification of the Microcontroller trainers have hardware and software
controller is considered a “conceive” issue, and the resources that give students the experience of exercising
documentation points out that optimization of the and developing microcontroller-based systems.
controller design may be achieved at the initial systems- Microcontroller interfacing is important and experiments
specification stage of the project. should cover parallel ports, serial ports, interrupts, timing
The design stage of the project is, by far, the most and digital/analogue inputs/outputs. As bit-level
difficult, and about 20 issues are documented. The issues manipulation is required, especially for a memory-
of “hierarchical design”, “one-hot encoding” and mapped input/output architecture (such as that of the
“synchronous delay circuit” were central to an effective Motorola 68HC11 microcontroller), some experience
approach to design. After a period of about two weeks with assembler coding is required. The microcontroller
into the seven-week period for the project, the teams were
 Professional Courses for Computer Engineering Education 3

trainer consists of a microcontroller development board

interfaced to a desktop computer and a specially designed
4 Professional Courses for Computer Engineering Education

input-output PCB. This supports a number of experiments

on computer interfacing. The 68HC11 Evaluation Board
and the Input/Output Board are shown in Fig. 6.

Figure 4. Six traffic flows at the top level design of the traffic intersection in Programmable Logic Design

Figure 5. The FPGA implementation of the traffic controller in Programmable Logic Design

(a) 68HC11 Evaluation Board

(b) Input/Output Board

Figure 6. The Microcontroller Hardware Trainer
 Professional Courses for Computer Engineering Education 5

V. DIGITAL SYSTEMS DESIGN A. Project Details

The team project in Digital Systems Design is to design The project was based on programmable logic devices
a bus-structured computer, which resembles the (GALs   or   FPGA).   The   final   documentation   also
microcontroller investigated in the prerequisite course, identified conceive, design, implement and operate issues
and computer hardware. This arrangement of the of the project. A block diagram of the computer is given
curricula allows students in Digital Systems Design, who in Figure 7.
have studied microcontroller and its applications in The computer  is modelled on the architecture  of the
computer hardware, to be able to develop a similar chip 68HC11 microcontroller [5]. Operands are represented to
with the capabilities they have learned to use. This only 4­bit accuracy and memory size is only 256 words.
course had its inaugural delivery in Semester 2, 2009.  The instruction set contains only 16 instructions, and two
condition   codes   and   several   addressing   modes   are
implemented.

TABLE III. EXAMPLE OF THE DOCUMENTATION OF A CDIO ISSUE FOR THE PROJECT IN PROGRAMMABLE LOGIC
DESIGN

Conceive Inputs and Outputs for Digital Control

Problem Area
Problem The traffic-light controller is a digital controller with digital inputs and digital
outputs. Firstly, it is necessary to identify all digital inputs and all digital outputs,
and then to determine the number of inputs and outputs. The main problem is the
specification of the relationship between the inputs and outputs.
Proposed The outputs are the traffic lights for all roads that enter the intersection. These
solution include traffic lights for vehicular traffic travelling through the intersection or
turning either left or right. The traffic lights should be determined so that traffic flow
through the intersection is optimised.
References
(In the following tables, A, B, C and D represent the traffic entering the intersection
Solution/
from Pymble, Waste, Ryde and Macquarie.)
notes
Number of inputs (traffic sensors)
One sensor One One One No sensor Number
for lanes in sensor for sensor for sensor for for A
same A left and B left, D through through
direction A through through or right or C
or right through
(default)
N N N N N 16
Y N N N N 11
Y Y N N N 10
Y Y Y N N 8
Y Y Y Y N 6
Y Y Y Y Y 4

List inputs

Number of outputs (traffic lights)

Combine Combine Combine Number
A through with B through with D through with
A left B left and D right
B right
N N N 30
Y N N 27
Y Y N 21
Y Y Y 18

List outputs
6 Professional Courses for Computer Engineering Education

Address Address
Data
Bus Bus
Bus
High Low

R
RAM
256 × 4

P
Program Counter

O
Op Code

N
Nibble Two

B
Nibble Three

Arithmetic­Logic­Shift
Unit (ALSU) and A

Z C A
Zero Carry Accumulator

S
Switch

X Y M
Start Stop Mode

Figure 7. Block diagram of the bus-structured computer in Digital Systems Design.

While  the documentation of the project describes a extension. A stack pointer would support subroutines

simplistic   computer,   expansion   of   the   computer’s and interrupts. Introduction of input/output ports would
functionality   may   be   affected   in   many   ways.   An provide a huge increase in capability.
expansion   of   word   size   from   4   bits   to   8   bits
B. CDIO Stages for a Bus-Structureed Computer
(corresponding to that of the 68HC11) could have been
readily   achieved   with   a   FPGA   implementation.   This Documentation of the project includes CDIO issues.
would   allow   a   huge   increase   in   the   number   of Some   examples   are   given   in   Table   IV.   Each   of   the
instructions   of   this   CISC   (Complex   Instruction   Set CDIO   issues   is   supported   by   notes   in   a   standard
Computer).   More   programmer­accessible   registers, format. An example is given in Table V.
including accumulators and index registers, is a simple
6 Professional Courses for Computer Engineering Education
 Address Address
Data
Professional Courses for Computer Engineering Education Bus 7 Bus
Bus
High Low

R
RAM
256 × 4
TABLE IV.
EXAMPLES OF CDIO ISSUES FOR A BUS-STRUCTURED
COMPUTER IN DIGITAL SYSTEMS DESIGN
CDIO Problem Area projects  have been  provided.
P  Class  surveys  have  given
Program Counter
Stage encouraging, supportive feedback and the authors are of
Design Hierarchical Design the view that the application of CDIO concepts to team­
Design Expandable Design based   projects   is   an   effective   approach   to   engineering
Design Bus education. The initial success with the CDIO approach
O

Design Memory has strengthened the authors’ view that the approach has

Op Code

Implement GAL/FPGA sufficient   merit   to   warrant   consideration   when   any

Implement VHDL engineering curriculum review takes place.
Operate Real-time Operation Hardware resources N developed for these courses have

Operate Computer Programs for Testing also been presented.Nibble TwoConcept-specific and general-

purpose logic trainers were developed for the

introductory courses, programmable-logic trainers were
aiming at handlingB complex digital systems and
microcontroller Nibble Three
trainers were particularly designed for the
course on microcontroller teaching. In addition, dedicated
VI. CONCLUSIONS hardware was implemented to assist with problem-based
Four professional courses supporting the Computer learning. Arithmetic­Logic­Shift
Engineering   degree   at   the   authors’   University   are All of these hardware resources have found their
Unit (ALSU) and A
presented.   The problem/project based learning approach places and are playing an important role in the continuum
was developed in them.  of the Computer Engineering Degree. They help to
Z C A
CDIO concepts have been applied successfully to the integrate a systematical stream of Computer Engineering
Zero Carry Accumulator
courses.     Examples   of   the   issues   for   some   team­based Courses in the education of Electronic Engineering at the
authors’ department.

TABLE V. S
Switch
EXAMPLES OF THE DOCUMENTATION OF A CDIO ISSUE FOR A BUS-STRUCTURED COMPUTER IN DIGITAL SYSTEMS
DESIGN

Design X Hierarchical
Y Design M
Problem Area Start Stop Mode
Problem A hierarchical design approach is invariably used for the design of complex systems. The problem
is how to partition the system so that it may be represented by a multi-level structure of blocks that
support “top-down” specification and “bottom-up” implementation.
Proposed At all levels of the hierarchy, focus on inputs to blocks and outputs from blocks. Identify the
problem- functionality of important signals interconnecting blocks. Attempt to use some blocks a number of
solving times. Try to “parameterise” blocks (e.g. a MOD-n counter with n as a parameter). Build
approach “expandable” blocks (such as “cascadable” counters).
Notes/Solution Some advantages of hierarchy in Digital Systems Design are:
 modular (division of the system into functional blocks)
 multi-level (ability to specify modules in terms of library components or
previously defined modules)
 simplifies system specification (as details of each module are defined only once),
and eliminates repetitious detail
 facilitates understanding of the functionality of each module
 highlights the interconnections between (functional) modules (i.e. highlights the
functionality of signals that interconnect the modules)
 simplifies "design", "simulation", "implementation" and "testing" phases
 facilitates systems documentation
 highlights module inputs and outputs (and hence highlights signal
“dependencies”)

You may wish to add other advantages to the list.

Make notes on how you will proceed with the hierarchical design approach.
Professional Courses for Computer Engineering Education 7
8 Professional Courses for Computer Engineering Education

ACKNOWLEDGMENT IEEE and AAEE (Australasian Association for

Engineering Education).
The authors wish to thank Professor Anthony Parker,
Head of Department of Electronic Engineering,
Mr. Yimin Xie has degrees BE from Jinan University
Macquarie University, for his support to the Computer
China and BE from University of Wollongong. He had
Engineering Degree. This work was also supported in
been working for China Telecom for over 15 years as an
part by the MQRDG grant (Ref. 9201000817), Macquarie
application engineer before joining Macquarie University.
University.
He is currently a technical support staff of the
Department of Electronic Engineering, Macquarie
REFERENCES
University.
[1] D. Wong, K. Imrie and Y. Xie, “Problem Based
Learning Applied to a New Unit of Study on
Programmable Logic Design,” Proceedings of the
19th Conference of the Australasian Association for
Engineering Education, Rockhampton, Australia,
December 2008
[2] E. F. Crawley, J. Malmqvist, S. Östlund and D
Brodeur, Rethinking engineering education: The
CDIO approach. Springer, 2007.
[3] T. Floyd, Digital Fundamentals, 10th ed., Pearson,
2009.
[4] R. J. Tocci, N. S. Widmer and G. L. Moss, Digital
Systems – Principles and Applications, 10 th ed.,
Pearson, 2007.
[5] T. Floyd, Digital Fundamentals with PLD
Programming, Pearson, 2006.
[6] P. Spasov, Microcontroller Technology – The
68HC11 and 68HC12, 5th ed., Pearson, 2004.
[7] R. J. Dirkman and J. Leonard, 68HC11
Microcontroller Laboratory Workbook, Prentice Hall,
1996.
[8] C. H. Roth and L. K. John, Digital Systems Design –
Using VHDL, Thomson, 2008.
[9] S. Hauck, A. DeHon, Reconfigurable computing: the
theory and practice of FPGA-based computation.
Elsevier, 2008.
[10] S. S. Limaye, VHDL – A Design Oriented Approach.
Tata McGraw-Hill, 2008.
[11] Y. Kong, Y. Xie and D. Wong, “CDIO Concepts in
Digital Systems Design Education”, 2 nd Internatioanl
Conference on Design Education (Connected 2010),
July 2010, UNSW, Sydney, Australia.

Dr. Yinan Kong is a lecturer in Computer Engineering at

the Department of Electronic Engineering, Macquarie
University. In teaching, he has been focusing on applying
CDIO concepts and Problem Based Learning approaches
in Computer Engineering Education. In research, his
current interests include residue number systems, digital
arithmetic, VLSI design and public-key cryptosystems.
Dr. Kong received his PhD degree in Computer
Engineering from the Centre for High Performance
Integrated Technologies and Systems (CHiPTec) in the
School of Electrical and Electronic Engineering at the
University of Adelaide, Australia. He is a member of