ECE 306 Lab 4

Class A, B and Class AB Amplifiers

Prelab Assignment

Write a short description of the differences between class A and class B amplifiers. Be sure to include
at least one advantage and disadvantage of each class relative to the other.

OBJECTIVES

• Explain the source of crossover distortion in class B amplifiers.

• Demonstrate the reasons that class AB amplifiers are preferred over class B
amplifiers.
• Determine load power in a class B and AB amplifier.
• Determine power dissipated in the output transistors in a class B and AB amplifier.
• Determine the efficiency of a class B and AB amplifier.
• See how to improve class B performance.

OVERVIEW
Most amplifiers deliver power to the load connected to them using one of several common
output stages. The variety of stages offers choices and tradeoffs in efficiency and distortion
among other things. The output stage consists of the transistors driVINg the load in our lab.
The output stages are referred to as Class A, B, AB, C and D. Class D uses pulse width
modulation to deliver power to the load. Class C uses a resonant circuit to deliver power to the
load. Class A, AB and B typically use transistors in a similar configuration while biased at
different levels of DC current which affects distortion and efficiency. We will study class B and
AB amplifiers in this lab.
Class A, AB and B amplifiers typically use two distinct transistors in the output stage. In
our case the output stage is the pair of complementary transistors that drive the load as
configured in Fig. 1. An NPN transistor drives the load when the output is positive, and a PNP
transistor drives the load when the output is negative. The primary difference between these
classes, as mentioned above, is the amount of bias current passing through the transistors.
Bias refers to the amount of DC current that flows through the NPN and PNP transistors when
there is no signal applied to the input of the amplifier. It should be noted that an amplifier is
less efficient when there is more bias current. In class A the transistors are biased such that
200% of the maximum load current flows through the transistor pair. This makes sure that
neither transistor shuts off at any time while driVINg the load. In the class B amplifier, each
transistor is biased in the cutoff mode which is 0% of the maximum load current. The class AB
amplifier, as the name implies, biases the transistors somewhere between B, 0% and A, 200%
of the maximum load current. Most class AB amplifiers bias the transistors just out of the cutoff
region, a small percentage of maximum load current flows through the transistors with no input
signal.
You will only look at class B and AB amplifiers in this lab. The main reason for this is
that class A amplifiers are very difficult to build so the bias current stays at 200%. This results
in a low amount of open loop distortion. Usually the bias current will continue to increase until
the power supply can’t deliver any more current or the NPN and PNP output transistors burn
out. Class B amplifiers are relatively efficient because there is no bias current. One transistor is
off while the other one delivers power to the load. This results in the highest amount of open
loop distortion. Class AB can be almost as efficient as class B. A small amount of DC bias
current flows through both transistors when VIN=0. This results in lower distortion than Class B
and more than Class A. Both Class B and AB amplifiers also have the classic emitter-follower
characteristics of relatively high current gain and a voltage gain that is slightly less than unity.
In this exercise, you will examine these two classes of amplifier and compare their attributes.
MATERIALS
1 DC power supply
1 Function generator
1 Oscilloscope
1 DMM
1 Pre-built amplifier board

Figure 1 shows the circuit you will use to experiment with class AB and class B amplifier output
stages.
+Iquies +Icc SUPPLY
RED +15V
Vc1
3
2 J1
+Ibias C1 C2 1
R1 +
330uF 0.1uF
1.00K Vb1 Q5 50V Cer.
Y ELLOW D44
C4 10uF
Ve1
Cer.
1 ORANGE
C3
H1 2 R2
100pF
1.0
Q2 2N3904
Amp In Load
P1 I Q5
C5 1
100
0.1uF 2 J2
Cer. I Q6

1
2
Q3 2N3906 R3
-15V
C7 1.0
H2
100pF
Ve2 Amp Out
1 C6 10uF
ORANGE
J3 2 Cer. Q6
R4 C9
Vb2 D45 C8
330uF
1.00K Y ELLOW 0.1uF
+
Vin 50V
-Ibias Cer.

Vc2
-Iquies -Icc
WHITE

Figure 1: Class AB-B output stage amplifier board.

One thing we will evaluate is where the power goes in the amplifiers. We will concern ourselves with
the DC and AC currents, voltages and power consumed by the circuit and delivered to the load
impedance. We have an amplifier that is supplied with DC power and delivers AC power to the load.
This complicates our evaluation because we need to know where the power goes to evaluate
‘efficiency’. We will also need to differentiate between power consumed by the output stage and the
rest of the circuitry. Most amplifiers have only a DC power supply. Most of the circuitry conducts
current even when there is no signal. As a matter of fact the amount of current usually doesn’t change
much even when the power amp delivers AC power to the load. The exception to this is in the output
stage. Here the current feeding the output stage will vary depending on the power being delivered to
the load. To help evaluate this we will set up some basic definitions.

±ICC Current delivered to the circuit by the power supply.

±VCC Voltaqe delivered to the circuit by the power supply.
±IQUIES DC Current delivered to the supporting circuitry by the power supply with VIN = 0.
±PQUIES PQUIES = IQUIESVCC.
±IBIAS DC current through Q5 and Q6 with VIN = 0.
IQ5, IQ6 AC current and IBIAS carried by Q5 or Q6.
PQ5, PQ6 AC and DC power delivered to/by Q5 or Q6. PQ5=IQ5VQ5, PQ6=IQ6VQ6.
PCC = VCC * ICC. The DC voltage, current and power delivered to the system.

Quiescent current: The current consumed by the amplifier when there is no input signal. Usually this
includes the bias current, the DC current consumed by the output transistors. In our case we are not
including the bias current. We want to know this so we can remove it from the power consumed by
the output stage. So where does the quiescent current go? A close look at Fig. 1 shows what
consumes the DC current. First set VIN = 0V. R1, R4 and P1 will always conduct current. The amount
depends on the value of P1. The current through R1, R4 and P1 is the total supply voltage divided by
the sum of the resistances until Q2 and Q3 start conducting.

IQUIES = (+VCC - -VCC)/ (R1+R4+P1)

Q2 and Q3 are configured as diodes and start conducting at about VP1 ≈ 1.0V, 0.5V per ‘diode’. Once
this happens the current through P1, Q2 and Q3 is a non-linear function of voltage. Fortunately we
can avoid the whole non-linearity thing in this lab by recognizing that

IR1 = IR4 = ((+VCC - -VCC) – VP1) / (R1+R4).

Bias current: There will be DC current flowing through Q5 and Q6 when Q2 and Q3 are conducting
current. Once again this occurs when VQ2 = VBE5 ≥ 0.5V and VQ3 = VBE6 ≥ 0.5V. The amount of bias
current through Q5 and Q6 depends on VQ2 and VQ3, the transistor gain and temperature. The DC
current through Q5 and Q6 we will call the bias current, IBIAS.

Output transistor current IQ5 and IQ6: IQ5 and IQ6 are made up of IBIAS and ILOAD. IBIAS is DC and
ILOAD is AC. The load current is typically greater than the bias current for Class B and AB
amplifiers.

We want to determine where does the power get consumed? That’s easy. By the load and by the
circuitry. One way evaluate an amplifier is to look at efficiency. A classic method to evaluate efficiency
is to divide the power delivered to the load by total power supplied:

This is a reasonable definition. For class B amplifiers this never gets better than 78.5% at full output
power. It doesn’t work well here because of the artificially high quiescent current compared to the
artificially low bias current. This amp is designed for easy analysis so IQUIES ends up being high and
IBIAS ends up low. Another merit factor used for evaluation is the power delivered to the load divided
by the total power dissipated in the output stage. In other words how much power does the output
stage waste! The output stage is made up of Q5, Q6 and R2 and R3 and the load.

The total power dissipated in the output stage is PLOAD + PQ5DC + PQ5DC + PQ6DC + PQ6AC + PR2 + PR3.
The power dissipated in the load will be calculated with RMS voltage or current and impedance
because the load gets AC + DC power. Note this power is average power. IRMS*VRMS = PAVE not PRMS.
Many times it is incorrectly referred to as PRMS. What about the other power terms?

For our experiments there is DC and AC current in the output stage. The DC power delivered to Q5
and Q6 when there is no output signal is:

PQ5 = (IQ5)(+VCC - VR2) and PQ6 = (IQ6)(|-VCC| - |VR3|)

The above equation assumes the DC output voltage is 0V. If this is not true then the equation gets a
little bit more complicated but it is still a simple KVL calculation. The AC power dissipated in the
output stage is much more complicated. First each transistor is only on for half of the output
waveform. Q5 for the positive half and Q6 for the negative half. Let’s look at Q5. The current through
Q5 is equal to the current to the load. That was easy. The voltage across Q5 ,VQ5, is the hard part. It is
(+VCC – VO) for the positive half of the output waveform. That doesn’t seem so bad either. It gets
harder when VO is time varying as it always is. Note VO = ILRL. For example if VO is a sine wave then:

VQ5 = [+VCC – ILRLsin(ωt)].

Now the current through the load. When VO is a sine wave then the load current is:

IL = IQ5 = [ILRLsin(ωt)]/RL =. ILsin(ωt)

Finally the power dissipated by the output transistor Q5 is:

V – I R sin ωt I sin ωt dt

A similar argument is true for Q6. The equations given above neglects the power dissipated in the
emitter resistors.

All this discussion about power, why do we care anyway? The real concern is whether or not the
output transistor can dissipate the power they need to survive the ordeal. In a real design the power
has to go somewhere or the transistors will ‘melt down’. Usually the power is passed on to the
environment in the form of warm air. If we do this well enough the transistors will survive. They won’t
get too hot whatever too hot is.

A few theoretical calculations before we start: Theoretical circuit voltages and currents: Let’s take a
look at the circuit. How much quiescent current, IQUIES, flows in this circuit for (+VCC - - VCC)= 30V
when P1 is set to 0Ω? How much quiescent current, IQUIES, flows in this circuit, for VCC = 30V when P1
is set to 100Ω? Assume VQ2 = VQ3 = 0.6V? Don’t worry about IBIAS for this calculation.
IQUIES_P1=0 = __________________ IQUIES_P1=100____________________

PROCEDURE:

1) Connect the 25Ω, 25W resistor to the amplifier output. The load must be connected to observe
the interesting stuff. Turn the trim pot, P1, to 0Ω (fully counter clockwise). Connect the DC
supply to the DC input of the amplifier through the DMM current meter. Turn on the supply and
set it to ±15V. Do not connect the input to anything yet. Measure the positive and negative DC
current coming from the supply. +ICC __________________, -ICC _____________________
2) Measure IQUIES_P1=0. Determine this by measuring VR1 or VR4, I = VRX/RX. TP VC1 to VB1 or VB2
to VC2 gives VR1 or VR4.

IQUIES_P1=0_REAL = __________________
Does +ICC = IQUIES_P1=0_REAL? It probably doesn’t. There is some other circuitry on the board drawing
some current. Use ICC for quiescent when needed for calculations!

3) Turn the trim pot, P1, fully clockwise then measure VR1 or VR4 again to determine
IQUIES_P1=100_REAL____________________

Turn the trim pot back to 0 ohms (fully counter clockwise.

 4) Measure the DC voltage across R2 and R3. VR2 _____________ VR3 ________________.

5) Measure VBE5 ____________, VBE6 _____________ and VB5B6 ____________________.

How much current is flowing through Q5 and Q6? IQ5 ______________ IQ6 ________________

What class of amplifier output stage is this? CLASS ________________.

The next 5 steps will be repeated with 2 different input voltages. VO = 2VPP and 12 VPP. I recommend
you decide whether you perform each step with 2 output voltages or perform 5 steps with 1 output
voltage then 5 more with the other output voltage.

6) Make sure the trim pot is fully CCW, at 0Ω. Generate a 2(12) VPP sinusoidal 1 kHz output signal,
VO. Observe the input, VIN, and output, VO, waveforms on the scope. Pay particular attention to
the voltage center of the sin wave. Record both waveforms using the oscilloscope.

7) Use the X-Y feature on the scope to obtain a VO versus VIN plot for this amplifier with a 2(12)
VPP output. Capture this waveform using the oscilloscope.

8) Record the VRMS values of the VIN and VO waveforms. Calculate the power delivered to RL.

9) Use the DMM to measure the total current, ±ICC, drawn by the circuit from the DC supply for a
2(12) VPP output. Then, use this value, IQUIES and VCC to calculate source power.

VINRMS VORMS PLOAD ±VCC ±ICC ±PCC IQUIES IQ5Q6DC IQ5Q6AC PQ5Q6
2VPP=
12VPP=

10) You should re-measure IQUIES by setting VIN to zero immediately after collecting data at VO = 2
or 12 VPP then record ICC. You should do this just after measuring ICC with VO set to 2(12) VPP.
IQUIES changes with the temperature of Q1 and Q2. By measuring just after ICC with VO = 2 VPP
you get IQUIES at the same temperature as ITOTAL = IQ1Q2 + IQUIES. Remember IQ1Q2 = IBIAS when
VIN = 0V. IBIAS is 0 for class B. It is non-zero for class AB.

11) Repeat step 6-10 with VO = 12 VPP.

12) Set VO to a 0 VPP 1KHz sin wave. Turn the trim pot, P1, fully CW. Measure the current flowing
through R2 and R3. Hint: IR2 = VR2/ R2, IR3 = VR3/R3 . IR2 _____________IR3 ____________
How much bias current is going through the transistors if any? What class is this? __________

13) Measure VBE5 ______________ , VBE6 ________________ and VB1B2 _________________.

14) Repeat steps 8, 9 and 10 for VO = 2 VPP and 1KHz.

15) Repeat steps 8, 9 and 10 for VO = 12 VPP and 1KHz.

VINRMS VORMS PLOAD ±VCC ±ICC ±PCC IQUIES IQ5Q6DC IQ5Q6AC PQ5Q6
2VPP=
12VPP=

Next we will convert a class B output stage into a ‘better’ output stage. Better means less distortion
without going to a class AB output stage. This can be done with op-amp type circuitry in an actual
audio power amp. We will use a real op-amp here to make it simple to do. Sometimes this output
stage is actually added to an op-amp when a high output current is needed. The op-amp circuit is
shown in Figure 2.
SW1
3 2 1 C1 IN or OUT

Cer.
+15V R6 20.0K C10
U1B -15V R5 80.6K
10uF
LF356
7 4

V+

V-
8 nc
R7 100.0K From AmpOut 2
1 H3
Cer. Cer.
C11 C12
0.1uF 0.1uF To Amp In

1 2 -
J4 2 6
U1A
R8 100.0K 3 +
LM7321
Vs

5
Figure 2: Op-amp driver for the class B power stage.

Switch SW1 allows you to add or remove C10. More on that later. H3 is a header that allows you to
connect the op-amp output to the class B amp and connect the class B amp to the op-amp. You will
do this later.

R7 100.0K
From

R6 20.0K
AmpOut AmpOut
R5 80.6K
Vplus
C10
+
10uF
Vdc+
To

Vs
2 - AmpIn AmpIn
R8 100.0K 3
U1A
6 Class B Out+ RL
Amplifier 25 Ohm
+
LM7321
In- Out- 25W
1

GND

Vdc-
Figure 3: Vminus

Figure 3 shows how the class B amplifier will be connected in the feedback loop of the op-amp to
make it ‘better’. Here is a brief description of the linearized class B amplifier. First our Class B
amplifier does not pass DC signals. Normally one would but ours does not pass DC to make it was
easier to build and understand. So an op-amp circuit that includes the amp in the feedback loop will
not pass DC. This means that the op-amp DC output will not be controlled unless we close the loop at
DC. The op-amp output can drift to any DC value. This is why R5, R6 and C10 are in this circuit. They
close the loop at DC. R5 and C10 effectively form a DC source at the voltage of the DC offset of the
op-amp. R6, R8 and the op-amp close the loop with a DC gain of -1. This keeps the DC offset under
control. R5, R6 and C10 do not pass AC signals above 1 Hz or so. The AC signals pass through the
class B amplifier. The 25Ω load resistor is a voltage source that drives R7, the AC feedback resistor.
R7, R8 and the op-amp close the loop for AC signals with a gain of -1 again. So VO will be an inverted
version of VIN and the DC output of the op-amp will be about 0V.

16) Use the circuit shown in Fig. 4 first.

a. Set the transistor amp bias to yield a class B amplifier. (P1 full CCW)
b. IMPORTANT: Set SW1 to the OUT position. This leaves you with almost an
inverting op-amp followed by the class B output stage
c. Put a jumper between ‘ToAmpIn’ and ‘AmpIn’.
R7 100.0K
From

R6 20.0K
AmpOut AmpOut
R5 80.6K
Vplus
C10
+
10uF
Vdc+
To

Vs
2 - AmpIn AmpIn
R8 100.0K 3
U1A
6 Class B Out+ RL
Amplifier 25 Ohm
+
LM7321
In- Out- 25W
1

GND

Vdc-

Vminus

Figure 4: The circuit after step 16 c.

d. Use the VS input on the board. Generate a 2 VPP 1KHz sine wave at VO.
e. Observe VO and AmpIn in the time domain. They should look very similar to VO
and VIN for step 5. VO should be distorted or the transistor amp is not in class B
operating mode
f. Capture VO and AmpIn with the scope.
g. Observe VO and AmpIn in the frequency domain. FFT under math.
h. Capture the FFT of VO with the scope.
i. Set SW1 to the IN position. Put in the other jumper between ‘FromAmpOut’ and
‘AmpOut’.
R7 100.0K
From

R6 20.0K
AmpOut AmpOut
R5 80.6K
Vplus
C10
+
10uF
Vdc+
To

Vs
2 - AmpIn AmpIn
R8 100.0K 3
U1A
6 Class B Out+ RL
Amplifier 25 Ohm
+
LM7321
In- Out- 25W
1

GND

Vdc-

Vminus

Figure 5: Circuit after step 16i.

 j. In the time domain, capture VS, AmpIn and VO.
k. What happened to AmpIn?
l. What caused that to happen?
m. Capture VO versus AmpIn in the XY mode on the scope.
n. Determine the 2nd and 3rd harmonic distortion with a 100KHz 12 VPP output. Use
the FFT math function for this.

17) Set the power stage to class AB.

a. Determine the 2nd and 3rd harmonic distortion with a 100KHz 12 VPP output. Use
the FFT math function for this.

QUESTIONS

1. Which amplifier has the higher values of VBE? Explain why this is the case.
2. How much power do Q5 and Q6 dissipate for VO = 2 and 12VPP when they are run in Class AB
mode?
3. How much power is delivered to the load for the 2 cases in question 2.
4. What value of input voltage would we expect the greatest figure of merit value, H.
5. Which setup 16 or 17 had lower distortion?