Module 0 PDF
Module 0 PDF
SYLLABUS
Module 0: (Review) Computing Systems (6)
From Bits and Gates to C and Beyond
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PDA
Workstation Turing machine that adds Turing machine that multiplies
Supercomputer
For more info about Turing machines, see For more about Alan Turing, see
http://www.wikipedia.org/wiki/Turing_machine/ http://www.turing.org.uk/turing/
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Tadd, Tmul
In practice, solving problems involves
U computing under constraints.
a,b,c c(a+b)
• time
Universal Turing Machine weather forecast, next frame of animation, ...
• cost
cell phone, automotive engine controller, ...
U is programmable – so is a computer! • power
• instructions are part of the input data cell phone, handheld video game, ...
• a computer can emulate a Universal Turing Machine
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Big Idea #2: Transformations Between Layers How do we solve a problem using a computer?
A systematic sequence of transformations between
Problems layers of abstraction.
Problem
Algorithms
Software Design:
choose algorithms and data structures
Language
Algorithm
Instruction Set Architecture Programming:
use language to express design
Microarchitecture
Program
Circuits Compiling/Interpreting:
convert language to
Instr Set machine instructions
Devices Architecture
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-23 22 21 20 -23 22 21 20
011010000 011010000 0 0 0 0 0 1 0 0 0 -8
100101111 (1’s comp) (flip) (copy) 0 0 0 1 1 1 0 0 1 -7
+ 1 0 0 1 0 2 1 0 1 0 -6
100110000 100110000 0 0 1 1 3 1 0 1 1 -5
0 1 0 0 4 1 1 0 0 -4
0 1 0 1 5 1 1 0 1 -3
0 1 1 0 6 1 1 1 0 -2
0 1 1 1 7 1 1 1 1 -1
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2-1 = 0.5
3 A 8 F 4 D 7 2-2 = 0.25
2-3 = 0.125
00101000.101 (40.625)
+ 11111110.110 (-1.25)
This is not a new machine representation,
00100111.011 (39.375)
just a convenient way to write the number.
No new operations -- same as integer arithmetic.
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Gate = 0 Gate = 0
Terminal #2 must be Terminal #1 must be
connected to GND (0V). connected to +2.9V.
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For all inputs, make sure that output is either connected to GND or to +,
• assignment of voltage ranges depends on but not both!
electrical properties of transistors being used
typical values for "1": +5V, +3.3V, +2.9V
from now on we'll use +2.9V
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Truth table
A B C
0 0 1
In Out In Out
0 1 0
0 V 2.9 V 0 1
1 0 0
2.9 V 0V 1 0
Note: Serial structure on top, parallel on bottom. 1 1 0
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A B C
0 0 1
Add inverter to NOR. 0 1 1
1 0 1
1 1 0
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Same as A+B!
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2-bit
decoder
4-to-1 MUX
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A B Cin S Cout
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
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1 0
1
Then set S=1 to “store” value in quiescent state.
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A = 0101001101010101
Address Space:
number of locations k = 2n
(usually a power of 2) locations •
•
A[14:9] = 101001 A[2:0] = 101 •
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22 x 3 Memory
word select word WE
input bits
More Memory Details
address
This is a not the way actual memory is implemented.
write • fewer transistors, much more dense,
enable relies on electrical properties
But the logical structure is very similar.
• address decoder
• word select line
• word write enable
Two basic kinds of RAM (Random Access Memory)
Static RAM (SRAM)
• fast, maintains data as long as power applied
Dynamic RAM (DRAM)
• slower but denser, bit storage decays – must be periodically refreshed
address
Also, non-volatile memories: ROM, PROM, flash, …
decoder
output bits
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Examples:
• Sequential lock
Four states – two bits
• Basketball scoreboard
7 bits for each score, 5 bits for minutes, 6 bits for seconds,
During 1st phase (clock=1), During 2nd phase (clock=0), 1 bit for possession arrow, 1 bit for half, …
previously-computed state next state, computed by
becomes current state and is logic circuit, is stored in
sent to the logic circuit. Latch A.
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DANGER
MOVE
RIGHT State bit S1
State bit S0
Outputs
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Combinational Logic
• Decoders -- convert instructions into control signals
Chapter 4
• Multiplexers -- select inputs and outputs
• ALU (Arithmetic and Logic Unit) -- operations on data
The Von Neumann
Model
Sequential Logic
• State machine -- coordinate control signals and data movement
• Registers and latches -- storage elements
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EX EX
S S
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Examples: Examples:
D D
• load data from memory (LDR) • send operands to ALU and assert ADD signal
• read data from register file (ADD) • do nothing (e.g., for loads and stores)
EA EA
OP OP
EX EX
S S
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Sequential Conditional
Do Subtask 1 to completion, If condition is true, do Subtask 1;
then do Subtask 2 to completion, etc. else, do Subtask 2.
Get character
input from
keyboard True file char False
= input?
Print number
to the screen
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Assuming all addresses are close enough that PC-relative branch can be used. Assuming all addresses are on the same page.
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- Input a character.
- Set up a pointer to the first
Yes
Done?
Input a character. Then location of the file that will
scan a file, counting be scanned. B
occurrences of that - Get the first character from Scan the file, location by No
location, incrementing the B1
character. Finally, display the file.
- Zero the register that holds counter if the character
on the monitor the number Test character. If a match,
the count. matches.
of occurrences of the increment counter. Get next
character (up to 9). character.
B
Scan the file, location by
location, incrementing the
counter if the character
STOP m atches.
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No
B2
B Yes
Done?
Yes R1 = R0?
Done? Yes No
Yes No
Done?
B1 No
B1
R2 = R2 + 1
No B2 Test character. If matches,
B1
increment counter. B2 Test character. If matches,
Test character. If a match,
increment counter.
increment counter. Get next
character. B3 Get next character. B3
B3 Get next character.
R3 = R3 + 1
R1 = M[R3]
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R1 = 0 Address Contents
x3000 0101001001100000
R4 = 10
x3001 0101100100100000 x3100 x3107 Start single-stepping program...
R2 = x3100
x3002 0001100100101010 x3101 x2819 PC R1 R2 R4
R1 = R1 + M[R2] x3003 0010010011111100 x3102 x0110 x3000 -- -- --
R2 = R2 + 1 x3004 0110011010000000 x3001 0 -- --
x3103 x0310
x3005 0001010010100001 x3002 0 -- 0
R4 = R4 - 1 x3006 0001001001000011 x3104 x0110
x3003 0 -- 10
x3007 0001100100111111 x3105 x1110 x3004 0 x3107 10
x3008 0000001111111011 x3106 x11B1
No x3009 1111000000100101
R4 = 0? x3107 x0019 Should be x3100!
x3108 x0007 Loading contents of M[x3100], not address.
Yes
x3109 x0004 Change opcode of x3003
from 0010 (LD) to 1110 (LEA).
HALT
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HALT
• ASCIItoBinary, InputRoutine, SaveR1 (TRAP x25)
Incr Count
6. Provide comments between program sections. Load char from file (R2 = R2 + 1)
(R1 = M[R3])
7. Each line must fit on the page -- no wraparound or truncations.
• Long statements split in aesthetically pleasing manner. Load next char from file
(R3 = R3 + 1, R1 = M[R3])
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First Pass:
• scan program file
• find all labels and calculate the corresponding addresses;
this is called the symbol table
Second Pass:
• convert instructions to machine language,
using information from symbol table
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First Pass: Constructing the Symbol Table Second Pass: Generating Machine Language
1. Find the .ORIG statement, For each executable assembly language statement,
which tells us the address of the first instruction. generate the corresponding machine language instruction.
• Initialize location counter (LC), which keeps track of the • If operand is a label,
look up the address from the symbol table.
current instruction.
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I/O And how does data get out of the system so that
humans can use it?
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Device electronics
• performs actual operation
pixels to screen, bits to/from disk, characters from keyboard
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Asynchronous Interrupts
• data rate less predictable • Device sends a special signal to CPU when
• CPU must synchronize with device, new data arrives OR device ready for next data
so that it doesn’t miss data or write too quickly • CPU can be performing other tasks instead of polling device.
• “Wake me when we get there.”
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15 8 7 0
output data
Address Control Logic
determines whether DDR
1514 0
MDR is loaded from
Memory or from KBSR/KBDR. ready bit DSR
When data is written to Display Data Register:
• DSR[15] is set to zero
• character in DDR[7:0] is displayed
• any other character data written to DDR is ignored
(while DSR[15] is zero)
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write
character
Sets LD.DDR
or selects
DSR as input.
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F
Chapter 8
NO
D
TRAP Routines
Transfer to
ISR
YES interrupt EA and
signal?
OP Subroutines
EX
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Trap vector
• identifies which system call to invoke
• 8-bit index into table of service routine addresses
in LC-3, this table is stored in memory at 0x0000 – 0x00FF
8-bit trap vector is zero-extended into 16-bit memory address
Where to go
• lookup starting address from table; place in PC
How to get back
• save address of next instruction (current PC) in R7
NOTE: PC has already been incremented
during instruction fetch stage.
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TRAP Routines and their Assembler Names Saving and Restoring Registers
Must save the value of a register if:
• Its value will be destroyed by service routine, and
• We will need to use the value after that action.
vector symbol routine
x20 GETC read a single character (no echo) Who saves?
x21 OUT output a character to the monitor • caller of service routine?
knows what it needs later, but may not know what gets altered by
x22 PUTS write a string to the console called routine
print prompt to console, • called service routine?
x23 IN knows what it alters, but does not know what will be needed later
read and echo character from keyboard
by calling routine
x25 HALT halt the program
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////// TOP #18 TOP #12 TOP #31 TOP ////// ////// #12 TOP #12
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 211 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 212
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 213 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 214
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 215 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 216
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 217 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 218
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
PC x6200
PC x6203
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
PC x6300 PC x6203
x6315 RTI x6315 RTI
Push PSR and PC onto stack, then transfer to Execute RTI at x6315; pop PC and PSR from stack.
Device C service routine (at x6300).
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 223 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 224
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 227 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 228
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 229 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 230
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 231 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 232
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 233 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 234
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 235 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 236
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 237 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 238
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 239 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 240
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
C: A High-Level Language
Gives symbolic names to values
• don’t need to know which register or memory location
Provides abstraction of underlying hardware
• operations do not depend on instruction set
Chapter 10 • example: can write “a = b * c”, even though
LC-3 doesn’t have a multiply instruction
Microprocessor and Microcontroller Course 9/23/2009 Microprocessor and Microcontroller Course Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 242
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 243 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 244
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 245 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 246
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 247 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 248
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 249 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 250
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 251 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 252
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Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 253 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 254
Department of Computer Engineering, University of Information Technology Department of Computer Engineering, University of Information Technology
Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 255 Microprocessor and Microcontroller Course 9/23/2009 Computer Systems 256
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