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A New Design Procedure for Output LC Filter of Single Phase Inverters

Conference Paper · January 2010

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 2010 3rd International Conference on Power Electronics and Intelligent Transportation System

A New Design Procedure for Output LC Filter

of Single Phase Inverters
Ahmad Ale Ahmad, Student Member, IEEE, Adib Abrishamifar, Member, IEEE, Mohammad Farzi,
IRIEE.

switching frequency and its relation to the cut off

Abstract- This paper presents a new design procedure frequency of filter is not well considered. Also, none of
for output LC filter of single phase inverter. Two main them were presented a straight forward method or
goals of the procedure are to meet the IEEE Std. 1547 relation to calculate the L and C values.
requirements for attenuating of harmonics distortion and This paper analyses the characteristics of the output LC
to limit the high frequency current of switches in filter for PWM inverter. The cut off frequency of filter
acceptable value. The design steps and their and its relation to the modulation factor and switching
considerations are discussed comprehensively. This frequency are determined to meet the IEEE Std. 1547
procedure is verified with simulation results for a 220V,
requirements for attenuating the harmonics distortion.
5KVA inverter. The simulations run either linear or
nonlinear full loads. Considering the switches current ripple, the inductance
and capacitance value are calculated. The
Keyword- Inverter, LC filter, cut off frequency, THD, specifications and design criteria’s are illustrated in
inductor current ripple, this paper. This procedure is verified with simulation
results.
I. INTRODUCTION
Today, inverter with an output LC filter has an especial
II. LC FILTER ANALYSIS
application such as distributed generation, active filter, Design of an LC filter for the PWM based inverter is
stand-alone application based on renewable energy, very important issue. This filter should reduce the high
uninterruptible power supply (UPS) and dynamic frequency distortion of output voltage and control the
voltage restorers [1-3]. switching current. The switching devices generate this
Two main duties of the output LC filter are to attenuate distortion. The IEEE Std. 1547 requirement for
the output voltage ripple and to limit the high maximum harmonic voltage distortion is shown in
frequency ripple current of inverter switches. The table 1. For the medium power inverters whose PWM
attenuation of switching frequency voltage at the frequency is higher than 3 KHz, the low frequency
output node is depended on the cut off frequency of harmonics (2nd, 3rd, 5th , and 7th) are usually rejected by
filter. Also, bandwidth of inverter controller is limited controller perfectly. So, the high frequency distortion is
by the cut off frequency of the filter [3]. The cut off only included switching or PWM frequency.
frequency of the filter have to be selected small for According to the standard this distortion should be
perfect voltage ripple attenuation, and the bandwidth of limited under 0.3%.
the controller have to be wide for fast response to step
or nonlinear load. So, there is a trade off between the TABLE 1. IEEE STD. 1547 REQUIREMENTS FOR MAXIMUM HARMONIC
VOLTAGE DISTORTION
bandwidth of the controller and filter attenuation. Individual Total
After selecting the cut off frequency of filter, Harmonic h<11 11≤h<17 17≤h<23 23≤h<35 35≤h Harmonic
order Distortion
determining the L and C values is very important issue,
Percent
because they affect on ripple current of inverter (%)
4.0 2.0 1.5 0.6 0.3 5.0
switches, the inverter output impedance [4], efficiency
[4-5], transient response [3] and also the cost of the
The LC filter and its input and output voltage are
inverter.
shown in Fig1. This filter consists of two unknown
In [4-6], the cut off frequency of LC filter is designed
components, L and C, and the load (RL) can be varied
based on the Fourier series of the inverter output
from the minimum load (RL=∞) to maximum load
voltage. Then by using the relation between the filter
(RL= RLm). So, the filter should be studied in two
capacitor and the system time constant, the capacitor
situations, minimum and maximum load. The transfer
and inductor value are designed [4]. In [5], the L and C
function from Vi to Vo (Fig. 1), H(ω), is shown in (1):
are selected to minimize the filter reactive power.
Authors of [6] defined a cost function based on Vo(ω) X C (ω)||R L
H(ω)= = (1)
reactive power where the reactive power of inductor is Vi(ω) X C (ω)||R L +X L (ω)
weighted two times higher than the reactive power of Where XC(ω) and XL(ω) are impedance of capacitor
capacitor, then calculating the L and C value to and inductor, respectively, and ω=2πf, f is the input
minimize this cost function. Other ones used the same voltage frequency.
method too, but the ripple current of inductor,

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3πm
H NL (ωs )  (7)
2000
If the inequality (7) is solved for m=0.95, the cut off
frequency of the LC filter (fr) must be less than fs/15 to
satisfy the standard limitation. So:
1
ωr  ωs and k  15 (8)
k
Really, the attenuation due to the filter at the
fundamental frequency obtains as follow:
ω2
H NL (ω1 ) = 2 s 2 (9)
ωs -(kω1 )
Fig 2 shows the |HNL(ω1)| as a function of fs and k
where the k factor and switching frequency have been
changed from 15 to 20 and 3KHz to 10KHz,
respectively. These curves reveal that our first
assumption about the attenuation of the filter at the
fundamental frequency is not far from our expectation.

Fig 1. a) Output LC filer connected to a load, b) input voltage and c)

output voltage of the filter.

A. Minimum Load condition

In minimum load condition (RL=∞), (1) can be
summarized as:
ω2
H NL (ω)= 2 r 2 (2)
ω r -ω
1
ω2r = (3)
LC
where ωr=2πfr and fr is the cut off frequency of the LC
filter. The amplitude of input voltage at the switching
frequency depends on DC input voltage and duty ratio Fig 2. Filter attenuation at the fundamental frequency in minimum
load situation.
of PWM signal. It will be maximum when the duty
ratio is 50%. So:
4 V B. Maximum Load condition
Vi (ωs ) max =  DC (4)
π 2 At the maximum load condition (RL= RLm) the filter
where ωs=2πfs and fs is the switching frequency. On the attenuation at the switching frequency is more than
other hand, the amplitude of input voltage at minimum load condition. But the filter attenuation at
fundamental frequency depends on DC voltage and the fundamental frequency should be studied. The
modulation factor. It can obtain as: transfer function of the LC filter at the maximum load
Vi (ω1 ) =mVDC (5) condition is:
where ω1=2πf1 and f1 and m are fundamental frequency ω 2r
H FL (ω)= (10)
and modulation factor, respectively. Because, at the ω
ω 2r -ω2 +j
fundamental frequency, the voltage drop across the R Lm C
filter can not be estimated before the L and C values Then:
are specified, we neglect this voltage drop by the first
ω2r
assumption. It means that the attenuation of the LC H FL (ω) = (11)
filter at the fundamental frequency is approximately 2 2 2 ω 2
(ω r -ω ) +( )
0dB, so according to the standard limitation for output R Lm C
voltage distortion, we can write: (11) shows that the attenuation amplitude depends on
Vo (ωs ) max Vi (ωs ) max  H NL (ωs ) 2 0.3 the cut off frequency, load value and also capacitor or
 = H NL (ωs ) 
Vo (ω1 ) Vi (ω1 )  H NL (ω1 ) πm 100 inductor value. There are several methods to determine
the inductor and capacitor value. In the first approach,
(6)
we calculated the L and C value to minimize the filter
So to meet the IEEE Std. 1547 requirements, the
reactive power. This is suitable to increase the inverter
attenuation of the LC filter at the switching frequency
efficiency. The reactive power of filter at the
should satisfy following inequality:

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fundamental frequency, Q, can be obtained as a Where the VL(ω1) is the inductor voltage at the
function of inductor value, cut off frequency of filter, fundamental frequency, and it can be considered as a
output voltage and the load, as follow: fraction of output voltage:
 Lω ω ω3  VL (ω1 ) =α Vo (ω1 ) (21)
Q=  21 - 12 + 1 4  VO2 (12)
 R L Lωr Lωr  Selection of α depends on the switching frequency and
To minimize the filter reactive power at the maximum maximum acceptable ripple current. However, Fig 3
load, the inductor value can be determined as follow: shows the ripple of inductor current in two conditions.
Q=0 (13) The maximum ripple occurs at ω1t=nπ±π/2. Usually,
So: the ripple current between 20% to 40% is acceptable. If
equations (20) and (21) are solved for α, the quantity of
R
L= Lm ω 2r  ω12 (14) α is obtained for specified maximum ripple current at
ω2r different switching frequencies (Fig 4).
If the ωr is at least 3 times larger than ω1 then the
inductor value can be approximated by:
R
L  Lm (15)
ωr
Also, the reactive power at the minimum load is
calculated as:
ω
Q(R L = )  PLm 1 (16)
ωr
where the PLm is the output power at the maximum
load. The equation (16) shows that to decrease the filter
reactive power at the minimum load, the cut off
frequency of filter should be selected as large as
possible (greater than the fundamental frequency of the
inverter).
Although, this approach improves the inverter Fig 3. The ripple of the inductor current at half of the fundamental
efficiency, it provides a very large inductor value. So, period.
it increases the cost and the size of filter. The large
inductor value increases the output impedance of
inverter too. It also causes a large over or under-shoot
voltage in the step load condition. All of these
evidences indicate that other criteria should be selected
to calculate the inductor value.
The main duty of inductor is the control of the
switching frequency of inverter ripple current. So, the
maximum acceptable ripple current and the switching
frequency of the inverter can determine the minimum
inductor value. The ripple can be estimated as:
V
I L = L t (17)
L
According to Fig 1, when the inverter switches are on: Fig 4. The quantity of α as a function of switching frequency for
VL =VDC -Vo =VDC -Vomsin(ω1 t) (18) maximum ripple current of 20% and 40%.

Where Vom is the amplitude of output voltage. When

If α is selected then the inductor value can be
the inverter switches are on, the Δt is obtained as
calculated. With KCL at the output node:
follow:
1
D m  sin(ω1 t) I L (ω1 )=IC (ω1 )+IO (ω1 )=(jω1C  )Vo (ω1 ) (22)
Δt= = (19) RL
fs fs
Where m is modulation index and 0<m<1. Replacing 1
VL (ω1 )=jω1LI L (ω1 )=jω1 L(jω1C 
)Vo (ω1 ) (23)
(18) and (19) in (17), and dividing by inductor RL
fundamental current: At the maximum load condition, by using (21) and
I L mω1  VDC -Vomsin(ω1 t)  sin(ω1 t) (25):
=
IL fs IL Lω1 1
(20) VL (ω1 ) =α Vo (ω1 ) =ω1L (ω12 C2 + ) Vo (ω1 ) (24)
mω1  VDC -Vom sin(ω1 t)  sin(ω1t) R 2Lm

fs VL (ω1 ) Now, the inductor and capacitor values are:

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R Lm ω14
L= α2 - (25)
ω1 ω4r
1 ω12
C (26)
R Lm α 2 ωr4 -ω14
To obtain real answer for the equations (25) and (26),
the following condition must be satisfied:
ω
ωr > 1 (27)
α
or
k
fs > f1 (28)
α
Fig 6. The filter attenuation at the fundamental frequency in
Now at the full load condition, the magnitude of maximum load for fs =20KHz.
transfer function from Vi to Vo can be written as:
ω 2r III. PROPOSED LC FILTER DESIGN PROCEDURE
H FL (ω) = (29)
ω 2 2 4 4 The LC filter of an inverter can be designed in the
2 2 2
(ω r -ω ) +( ) (α ω r -ω1 ) following mentioned 4 steps:
ω1
1) Selecting the switching frequency.
And at fundamental frequency: High switching frequency aims to reduce the filter size,
ωr but the maximum frequency of solid state switches and
H FL (ω1 ) = (30)
their dynamic losses limit the switching frequency. It is
(1+α )ωr2 -2ω12
2
usually chosen between 3KHz to 15KHz for IGBT
Fig 6 and 7 show the |HFL(ω1)| as function of ωr and α based inverter and 10KHz to 100KHz for MOSFET
for fs equal to 3KHz and 20KHz, respectively. based inverter.
2) Selecting k factor.
The standard requirement will be meet, if k=15, but
lager k factor causes more attenuation at switching
frequency and little amplification at the fundamental
frequency. If the modulation factor is less than 0.95,
the minimum of k should be calculated by equations
(7) and (8).
3) Selecting α factor.
α completely depends on the switching frequency and
acceptable inductor ripple current. 20% to 40% is an
acceptable range for ripple current. So using the
equation (20) or Fig 4, this factor can be selected.
The inequalities (27) and (28) should be satisfied. If it
is not maintained, then the k and α factor should be
renewed and selected again.
Fig 5. The filter attenuation at the fundamental frequency in 4) Now using equations (8), (25) and (26), the
maximum load for fs =3KHz. necessary L and C can be calculated.
The figures 5 and 6 imply that if α is varied from 0.02
IV. A DESIGN EXAMPLE
to 0.2, the maximum attenuation of filter will only be
3%. So, this aims to optimize the size of inductor and To verify the algorithm, an LC filter is designed for an
capacitor . Another important result of these figures is inverter whose main characteristics are mentioned in
that, if the cut off frequency of the filter is decreased table 2.
below the 200Hz, the filter can amplify the
fundamental frequency. This is sometimes useful, but TABLE 2. INVERTER CHARACTERISTICS.
the filter size will be increased. Also, the stability of VDC 360V
the system will be very critical, because the phase VO 220VRMS
margin of system decreases when the cut off frequency Sout 5KVA
is decreased. fs 20KHz
f1 50Hz

According to DC input and AC output voltage of the

inverter, the 0.95 is appropriate for modulation factor,
so k=15. To limit the inductor ripple current below the

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40%, α factor should be more than 0.025 at fs=20KHz. The fig 9 (a) and (b) show the output voltage and its
This aims us the filter specification which is listed in spectrum at maximum nonlinear load. The current crest
table3. factor is 3. The THD is below the standard limitation.

TABLE 3. T HE LC FILTER CHARACTERISTICS .

L 770μH
C 18μF
fr 1330Hz
a)
The control loop is illustrated in Fig 7. To reject the
main low frequency harmonics (2nd, 3rd, 5th, 7th) of
output voltage the bandwidth of control loop should be
at least 350Hz. The capacitor current loop is employed
to guarantee the stability of the inverter. Also, the inner
loop make the inverter to present a fast response to
nonlinear loads. Using the sliding mode control theory,
the gains of voltage and current loop are easily
obtained.

b)

Fig 9. a) The output voltage and current and b) The spectrum of

Fig 7. The controller of single phase inverter. output voltage in maximum nonlinear load with CF=3.

The inverter with designed output filter has been Fig 10 a) shows the inductor current. Also, fig 10 b)
simulated with Simulink Toolbox in MATLAB. Fig 8 a shows the ripple of inductor current in one-fourth of a
and b show the output voltage and its spectrum at period. As we have designed, the ripple is below 40%
maximum linear load, respectively. The THD of the and the maximum ripple is occured about 45 degree.
output voltage is below 0.5% and also the switching
frequency distortion is below 0.1%. So, it meets the
standard requirements for harmonics distortion.

a)

a)

b)

b)

Fig 8. a) The output voltage and current and b) The spectrum of Fig 10. a) The inductor current and its ripple.
output voltage in maximum linear load.

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V. CONCLUSION
A complete algorithm to design output LC filter of a
single phase inverter is developed in this paper. To
meet the IEEE Std. 1547 requirements for attenuating
of harmonics distortion, a relation between cut off
frequency of the filter and switching frequency is
calculated. The inductor value is designed to limit the
high frequency ripple of switches current. This
algorithm is verified with simulation results for a
220V, 5KVA inverter. The THD of output voltage is
less than 0.4% and 1.1% at linear and nonlinear full
load, respectively. In both simulations, the HD of
switching frequency is lower than 0.15%.

VI. REFERENCES
[1] 1. Patricio Cortés, M., IEEE, Gabriel Ortiz, Juan I. Yuz,
Member, IEEE, José Rodríguez, Senior Member, IEEE, and M.
Sergio Vazquez, IEEE, and Leopoldo G. Franquelo, Fellow, IEEE,
Model Predictive Control of an Inverter With Output LC Filter for
UPS Applications. IEEE TRANSACTIONS ON INDUSTRIAL
ELECTRONICS, 2009. 56(6): p. 14.
[2] 2. JOSEP M. GUERRERO, L.G.D.V., and JAVIER
UCEDA, Uninterruptible power supply systems provide protection.
IEEE Industrial Electronics Magazine, 2007. 1(1).
[3] 3. Hyosung Kim , S.K.S., Analysis on Output LC Filter for
PWM Inveter. IPEMC2009, 2009: p. 6.
[4] 4. J. Kim, S.M., IEEE, J. Choi, Member, IEEE, H. Hong,
Student Member, IEEE, Output LC Filter Design of Voltage Source
Inverter Considering the Performance of Controller. 2000: p. 6.
[5] 5. Pekik A. Dahono, A.P., Qamaruzzaman, An LC Filter
Degign Method for single Phase PWM Inverter. 1995: p. 6.
[6] 6. S. B. Dewan, P.D.Z., Optimum Filter Design for a Single
Phase Solid State UPS System. IEEE Transaction on Industrial
Application, 1975. IA-21(3): p. 6.

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