EC8462-Linear Integrated Circuits Lab Manual
EC8462-Linear Integrated Circuits Lab Manual
EC8462-Linear Integrated Circuits Lab Manual
ENGINEERING COLLEGE
Approved by AICTE, New Delhi & Affiliated to Anna University, Chennai
All Five UG Programs Accredited by NBA for 3 years from 2017-2018 &
Institution Accredited by NAAC
R.S.M. Nagar, Kavaraipettai, GummidipoondiTaluk,Tiruvallur District-601 206
Website: www.rmd.ac.in
DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING
LAB MANUAL
Student Name :
Reg.No :
Year/ Section :
Prepared By
E-mail : [email protected]
EC8462 – LINEAR INTEGRATED CIRCUITS LABORATORY
OBJECTIVES
LIST OF EXPERIMENTS
2
Course Outcomes
Laboratory Discipline
The laboratory can be a very enjoyable place to work in. In order to make it even more enjoyable
for yourself and for others, some basic discipline is required by everyone. Please note the
following points:
4. Clean up the table after use. no pieces of wire, components, etc. should be left lying around.
5. If any equipment is not working, please leave a note on the equipment and inform the lab
staff.
8. Each group is responsible for their Lab bench. After the Lab exercise is over, all equipment
should be powered down and all probes, cords, etc. returned to their proper position.
3
Content
Instrumentation amplifier.
Study of SMPS.
Simulation Experiments
Active low-pass, High-pass and band-pass filters
using Op-amp.
Astable and Monostable multivibrators using
NE555 Timer.
A/ D converter
Analog multiplier
4
About the uA741 Op-amp IC
The 741 IC was designed by Dave Fullagar of Fairchild Semiconductor in 1968. The 741 IC
is the successful predecessor of the LM 101 IC, and the only difference between the two was
that an additional 30pF internal compensation capacitor was added for the 741 IC. But, this
simple addition has made this IC evergreen in the electronics world and is still manufactured
by different companies in different versions and specifications, and is made recognizable by
adding the famous number 741 in the series.
The 741 IC is available in the market as 8-pin metal can, 10-pin flat pack, 8 or 14 pin DIP.
The pin configuration for 8 pin metal can package is shown below.
Op-amp Symbol:
The input voltage range for a 741 IC is ±15V. i.e VCC+=+15V and VCC- =-15V .
5
Equivalent Circuit of an Op-amp:
5. Zero input offset voltage. (if input is zero ,output also zero.)
6
Block Diagram of an µA 741:
7
Exp.No: 1 Inverting, Non inverting and differential amplifiers.
Date:
Aim: To design inverting, Non inverting and Differential amplifiers using Op-amp.
Apparatus Required:
2. Resistor
4. Function Generator
5. CRO
Theory:
As the open loop DC gain of an operational amplifier is extremely high we can therefore afford to lose
some of this high gain by connecting a suitable resistor across the amplifier from the output terminal
back to the inverting input terminal to both reduce and control the overall gain of the amplifier. This
then produces and effect known commonly as Negative Feedback, and thus produces a very stable
Operational Amplifier based system.
Negative Feedback is the process of “feeding back” a fraction of the output signal back to the input,
but to make the feedback negative, we must feed it back to the negative or “inverting input” terminal
of the op-amp using an external Feedback Resistor called Rƒ. This feedback connection between the
output and the inverting input terminal forces the differential input voltage towards zero.
This effect produces a closed loop circuit to the amplifier resulting in the gain of the amplifier now
being called its Closed-loop Gain. Then a closed-loop inverting amplifier uses negative feedback to
accurately control the overall gain of the amplifier, but at a cost in the reduction of the amplifiers gain.
8
3 op-amp circuit to achieve a closed loop gain using negative feed back ,
1. Inverting amplifier
Input signal is given to inverting input terminal of an Op-amp.
2. Non inverting amplifier
Input signal is given to non-inverting input terminal of an Op-amp.
3. Differential amplifier
Two input signal V1 and V2 given to both inverting and Non inverting input
terminals of an Op-amp.
Design 1: To design inverting amplifier with the gain of 10.Choose input resistor is equal to 10
KΩ.
So RF = 100KΩ
RF Amplitude Time
Input =
Output =
Input =
Output =
Input =
Output =
Input =
Output =
9
Circuit:
Output waveform:
10
Design 2: Design a Non inverting amplifier. Let R1=5 KΩ , RF=20 KΩ and Vi=1V. A load resistor
5 KΩ is connected at the output .Calculate (i) Vo (ii) ACL (iii) Load Current IL. Verify the
output both theory and Practical. if both the outputs are not same, justify the reason.
(i) ( )
(ii) ACL= ( )
Practical:
Amplitude Time
Input
Output (Vo)
11
Circuit:
Output : Voltage
Current:
12
Design 3: Design a Differential amplifier circuit with unity gain and determine the CMRR for
Different values of V1 and V2.
Solution :
Usually V+ input at non inverting terminal and V- input at inverting terminal of an Op-amp.
Observation:
13
Circuit:
Output:
Result:
14
Exp.No: 2 Integrator and Differentiator
Date:
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
Differentiator:
An op-amp differentiator is an inverting amplifier, which uses a capacitor in series with the input
voltage. Differentiating circuits are usually designed to respond for triangular and rectangular input
waveforms. For a sine wave input, the output of a differentiator is also a sine wave, which is out of
phase by 180o with respect to the input (cosine wave).
Differentiators have frequency limitations while operating on sine wave inputs; the circuit attenuates
all low frequency signal components and allows only high frequency components at the output. In
other words, the circuit behaves like a high-pass filter.
15
INTEGRATOR:
In an integrating circuit, the output is the integration of the input voltage with respect to time. A
passive integrator is a circuit which does not use any active devices like op-amps or transistors.
An integrator circuit which consists of active devices is called an Active integrator. An active
integrator provides a much lower output resistance and higher output voltage than is possible with a
simple RC circuit.
Op-amp differentiating and integrating circuits are inverting amplifiers, with appropriately placed
capacitors. Integrator circuits are usually designed to produce a triangular wave output from a square
wave input. Integrating circuits have frequency limitations while operating on sine wave input signals.
Design Integrator:
Consider the Lossy integrator for the components values.R1=10KΩ ,RF=100 KΩ, CF=
0.01µF.Determine the low frequency limit of integration and study the response for the inputs
(i) Sine wave (ii) Square input.
Solution:
= 159 Hz.
Tabulation :
Sine
Square
16
(i) Consider Sine wave input 1Vpp and 1000Hz.
17
Square Input:
Design Differentiator:
Design an Op-amp differentiator that will differentiate an input signal with .
Solution: Select
Let C = 0.1uf
Differentiator output =
18
Differentiator Circuit:
Tabulation :
Sine
Square
19
Output: input sine wave: Vi= 1sin 2π 500t
20
Result:
21
Exp.No: 3 Instrumentation Amplifier
Date:
Aim: To design an instrumentation amplifier and obtain the output for various gain.
Apparatus Required:
2. Resistor
5. Function Generator
6. CRO
Theory:
Instrumentation amplifier is a kind of differential amplifier with additional input buffer stages. The
addition of input buffer stages makes it easy to match (impedance matching) the amplifier with the
preceding stage. Instrumentation are commonly used in industrial test and measurement application.
The instrumentation amplifier also has some useful features like low offset voltage, high CMRR
(Common mode rejection ratio), high input resistance, high gain etc.
The two non-inverting amplifiers form a differential input stage acting as buffer amplifiers with a gain
of 1 + 2R2/R1 for differential input signals and unity gain for common mode input signals. Since
amplifiers A1 and A2 are closed loop negative feedback amplifiers, we can expect the voltage at Va to
be equal to the input voltage V1. Likewise, the voltage at Vb to be equal to the value at V2.
As the op-amps take no current at their input terminals (virtual earth), the same current must flow
through the three resistor network of R2, R1 and R2 connected across the op-amp outputs. This
means then that the voltage on the upper end of R1 will be equal to V1and the voltage at the lower
end of R1 to be equal to V2.
The voltage output from the differential op-amp A3 acting as a subtractor, is simply the difference
between its two inputs ( V2 – V1 ) and which is amplified by the gain of A3which may be one, unity,
(assuming that R3 = R4). Then we have a general expression for overall voltage gain of the
instrumentation amplifier circuit as:
22
Instrumentation Amplifier Circuit:
Procedure:
23
Tabulation:
Input
Output V1 V2 Vo V1 V2 Vo
24
Output:
Result:
25
Exp.No: 4 Low Pass, High Pass and Band Pass Filters
Date:
Aim: To design Low pass, High pass and Band pass active filters using Op-amp and obtain frequency
response.
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
A filter is often used in electronic circuits to block (or allow) a select frequency to the
circuit. An op-amp is used to design a filters, so it is called Active filters. There are Four types
active filters like Low pass, High pass, band pass and band stop . A low pass filter is used in
circuits that only allow low frequencies to pass through (below the Cutoff frequency). It is
often used to block high frequencies and AC current in a circuit.A high pass filter is used in
circuits that only require high frequencies to operate (above the cut off frequency). It blocks
most low frequencies & DC component.A band pass filter is a combination of a high pass and
a low pass filter. It allows only a select range of frequencies to pass through. It is designed
such a way that the cut off frequency of the low pass filter is higher than the cut off frequency
of the high pass filter, hence allowing only a select range of the frequencies to pass through.
Procedure:
6. Connections are given as per the circuit diagram.
7. Input signal is connected to the circuit from the signal generator.
8. The input and output signals of the filter channels 1 and 2 of the CRO are connected.
9. Suitable voltage sensitivity and time-base on CRO is selected.
10. The correct polarity is checked.
11. The above steps are repeated for second order filter.
26
Design Low Pass Filter:
Design Second order Butterworth Low Pass filter having upper cut off frequency 1KHz and
determine its frequency response.
The following steps are used for the design of active LPF.
27
Low Pass filter Circuit:
Output:
28
Low Pass Filter Tabulation:
29
Second order High Pass Filter:
The high pass filter is the complement of the low pass filter. Thus the high pass filter can be
obtained by interchanging R and C in the circuit of low pass configuration. A high pass filter allows
only frequencies above a certain bread point to pass through and at terminates the low frequency
components. The range of frequencies beyond its lower cut off frequency fL is called stop band.
Design:-
1
f
L 2 R R C C
2 3 2 3
Let R R R
2 3
C C C
2 3
1
R R
2 3 2fLC
R R 1.5k
2 3
R
f
A 1 2
R
1
R R 10k( given)
f 1
30
Second order High Pass Filter Circuit:
Output:
31
High Pass Filter Tabulation:
32
BPF:-
The BPF is the combination of high and low pass filters and this allows a specified range of
frequencies to pass through. It has two stop bands in range of frequencies between 0 to fL and beyond
fH. The band b/w fL and fHis called pass band. Hence its bandwidth is (fL-fH). This filter has a
maximum gain at the resonant frequency (fr) which is defined as
fr fH fL
The figure of merit (or) quality factor Q is given by
fr f
Q r
fH fL BW
33
Band Pass Filter Circuit:
HPF LPF
Output:
Result:
34
Exp.No: 5 Astable and MonostableMultivibrators using op-amp
Date:
Aim: To design Astable and Monostablemultivibrators using Op-amp and obtain duty cycle of the
output.
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
Astable Multivibrator:
Design a square wave oscillator for f0= 5 KHz .use a 741 Op-amp and DC supply voltage ±15V.
T = 2RC
R1= 1.16 R2
Given fO= _______KHz
Frequency of Oscillation fo = 1 / 2 RC if R1 = 1.16R2
Let R2 = 10 K
R1 = 10
Let C = 0.01 F
R = 1 / 2 fC =
36
Tabulation:
Square wave
37
Output:
Monostable Multivibrator:
β = R2/R1+R2 [β = 0.5 & R1 = 10 K,]
Find R2 = ; R = 5K; Rt = 1K;
Let F =_____KHz ; C= 0.1µf; Ct = 0.01µf
Pulse width, T = 0.69RC
Find R =
38
Output Amplitude Time Frequency
Trigger Input
Square wave
39
Output :
Result:
40
Ex.No: 6 Schmitt Trigger Using Op-amp
Date:
Aim: To design Schmitt trigger using Op-amp and analyze the output.
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
If the input to a comparator contains noise, the output may be erratic ,when vin is near a trip point. For
instance, with a zero crossing, the output is low when vin is positive and high when vin is negative. If
the input contains a noise voltage with a peak of 1mV or more, then the comparator will detect the zero
crossing produced by the noise. This can be avoided by using a Schmitt trigger, circuit which is
basically a comparator with positive feedback. Because of the voltage divider circuit, there is a
positive feedback voltage. When OPAMP is positively saturated, a positive voltage is feedback to the
non-inverting input, this positive voltage holds the output in high stage. (vin<vf). If Vin is less than
Vref output will remain +Vsat. When input vin exceeds Vref = +Vsat the output switches from +Vsat to –
Vsat. Then the reference voltage is given by When the output voltage is negatively saturated, a negative
voltage feedback to the inverting input, holding the output in low state. If vin <Vref i.e. vin becomes
more negative than –Vsat then again output switches to +Vsat and so on.
Procedure:
41
Design Problem:
To design a Schmitt trigger for VUT =+0.5V and VLT= -0.5V and show it square wave output for
input Vi = 2 VPP sine wave at 1 KHz.
Solution:
VH =
Tabulation:
Sine
Square
42
Schmitt Trigger Circuit:
Result:
43
Ex.No: 7 RC Phase shift and Wien Bridge Oscillators Using Op-amp
Date:
Aim: To design RC Phase shift and Wien Bridge Oscillators Using Op-amp.
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
The frequency at which a sinusoidal oscillator will operate is the frequency for which the total phase
shift introduced, as the signal proceeds form the input terminals, through the amplifier and feed back
network and back again to the input is precisely zero or an integral multiple of 2π. Thus the frequency
of oscillation is determined by the condition that the loop phase shift is zero and closed loop gain
Aβ≤1. The above conditions are called Barkhausen criterion.
This op-amp is operated in inverting mode and hence the output signal of the op-amp is shifted by 180
degrees to the input signal appeared at inverting terminal. And an additional 180 degrees phase shift is
provided by the RC feedback network and hence the condition for obtaining the oscillations.
The Wien Bridge Oscillator is so called because the circuit is based on a frequency-selective form of
the Wheatstone bridge circuit. The Wien Bridge oscillator is a two-stage RC coupled amplifier circuit
that has good stability at its resonant frequency, low distortion and is very easy to tune making it a
popular circuit as an audio frequency oscillator but the phase shift of the output signal is considerably
different from the previous phase shift RC Oscillator.
The Wien Bridge Oscillator uses a feedback circuit consisting of a series RC circuit connected with a
parallel RC of the same component values producing a phase delay or phase advance circuit depending
upon the frequency. At the resonant frequency ƒr the phase shift is 0o
44
Procedure:
Problem:
Solution:
Where:
fo is the Output Frequency in Hertz
R is the Resistance in Ohms
C is the Capacitance in Farads
N is the number of RC stages. (N = 3)
45
RC Phase Shift Oscillator Circuit:
Output:
46
Problem:Design Wien bridge oscillator for generate 5KHz sine wave.
Design:
Rf = 2R1
47
Wien Bridge oscillator Circuit:
Output:
Result:
48
Ex.No: 8 Astable and Monostble Multivibrator using IC555
Date:
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
The basic 555 timer gets its name from the fact that there are three internally connected 5kΩ resistors
which it uses to generate the two comparators reference voltages. The 555 timer IC is a very cheap,
popular and useful precision timing device which can act as either a simple timer to generate single
pulses or long time delays, or as a relaxation oscillator producing a string of stabilised waveforms of
varying duty cycles from 50 to 100%.
The 555 timer chip is extremely robust and stable 8-pin device that can be operated either as a very
accurate Monostable, Bistable or AstableMultivibrator to produce a variety of applications such as
one-shot or delay timers, pulse generation, LED and lamp flashers, alarms and tone generation, logic
clocks, frequency division, power supplies and converters etc,
555 Timer Block Diagram
49
Design Astable Multivibrator for RA=2.2KΩ,RB=3.9KΩ and C=0.1µF.Determine the positive
pulse width tc, negative pulse width td and free running frequency fo.
Solution:
The capacitor is periodically charged and discharged between 2/3 Vcc and 1/3 Vcc respectively.
The time during which the capacitor charges form 1/3 Vcc to 2/3 Vcc is equal to the time the output is
high and is given by
Tc = 0.69(RA+RB)C
Where RA and RB are in Ohms and C is in farads. Similarly the time during which the capacitor
discharges from 2/3 Vcc to 1/3 Vcc is equal to the time the output is low and is given by
Td = 0.69 RBC
The total period of the output waveform is
T = T c + T d = 0.69 (RA + 2RB) C
The frequency of oscillation
50
Astable Multivibrator Circuit:
Tabulation:
Capacitor Voltage
Output:
51
Design Monostable multivibrator for RA=10KΩ and the output pulse width tp=10ms.Find C.
The pulse width of the trigger input must be smaller than the expected pulse width of the output. The
trigger pulse must be of negative going signal with amplitude larger than 1/3 Vcc. The width of the
output pulse is given by,
tp = 1.1 RAC
52
Tabulation:
Trigger Input
Output
Capacitor Voltage
Output:
53
Result:
54
Ex.No: 9 PLL characteristics and its use as Frequency Multiplier, Clock synchronization.
Date:
Aim:
Apparatus Required:
2. Resistor
3. Capacitor
5. Function Generator
6. CRO
Theory:
The PLL IC 565 is usable over the frequency range 0.1 Hz to 500 kHz. It has highly stable centre
frequency and is able to achieve a very linear FM detection. The output of VCO is capable of
producing TTL compatible square wave. The dual supply is in the range of ±6V to ±12V. The IC can
also be operated from single supply in the range 12V to 24V.
The phase locked loop consists of a phase detector, a voltage control oscillator and, in between them,
a low pass filter is fixed. The input signal „Vi‟ with an input frequency „Fi‟ is conceded by a phase
detector. Basically the phase detector is a comparator which compares the input frequency fi through
the feedback frequency fo. The output of the phase detector is (fi+fo) which is a DC voltage. The out
of the phase detector, i.e., DC voltage is input to the low pass filter (LPF); it removes the high
frequency noise and produces a steady DC level, i.e., Fi-Fo. The Vf is also a dynamic characteristic of
the PLL.
55
The following figure shows the pin-out and the internal block schematic of PLL IC LM 565.
Design:
Hz
; V= V+- (V-)
[ ]
56
PLL Characteristics Circuit:
57
PLL characteristics:
Design:
Let V+ =10 V and V- = -10
Let the input frequency be 1 Khz, and the output frequency 5 Khz,
VCO should run at 5 Khz frequency , fo=(1.2/4*R1*C1)=5Khz
Take C1=0.01μF Then R1=6K
Take C2=10μF and C3=0.001μF
use Cc=10μF and R=10k for ac coupling of input signal
58
Procedure:
Output waveform:
Result:
59
Ex.No: 10 R-2R Ladder Type D- A Converter using Op-amp.
Aim:
To design R-2R Ladder Type D- A Converter using Op-amp and observe the output.
Apparatus required:
2. Resistor
4. DC power supply
5. Multimeter
Theory:
A digital-to-analog converter (DAC, D/A, D2A or D-to-A) is a circuit that converts digital data
(usually binary) into an analog signal (current or voltage). One important specification of a DAC is its
resolution. It can be defined by the numbers of bits or its step size. Wide range of resistors used
Weighted Resistor type DAC. This can be avoided by using R-2R ladder type DAC where only two
values of resistors are required.
DAC
60
To design 3 bit R-2R Digital to Analog converter to convert analog voltage of
binary bit 100.
Theoretical Calculation:
61
If binary bit 011 :
Tabulation:
Vref = -5V
d1 d2 d3 Theoretical Practical
V0 V0
0 0 0
0 0 1
0 1 1
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
62
Procedure:
Result:
63
Ex.No: 11 DC power supply using LM317 and LM723.
Aim:
Apparatus required:
2. Resistor
3. Capacitor
5. Multimeter
Theory:
The power supply received at the load end or consumer end has fluctuations in the voltage levels due
to irregular loads or based condition of the local power grid. These voltage fluctuationsmay lead to the
reduction of lifespan ofthe electrical and electronic appliances of the consumer or damage to the
loads. So, it is required to protect loads from over and under voltages or need to provide a constant
voltage to the loads and to maintain stability in system voltage using regulation technique. Voltage
regulation can be defined as maintaining constant voltage or maintaining the voltage level of a system
within acceptable limits over a wide range of load conditions and thus, voltage regulators are used for
voltage regulation. For linear voltage regulation, occasionally adjustable LM317 voltage regulators are
used wherein non-standard voltage is intended.
Voltage Regulator
64
LM317 Voltage Regulator
The three terminals are input pin, output pin and adjustment pin. The LM317 circuit is shown in the
below figure is a typical configuration of the LM317 voltage regulator circuit diagram including the
decoupling capacitors. This LM317 circuit is capable to provide variable DC power supply with output
of 1A and can be adjusted up to 30V.
65
LM317 Voltage Regulator Circuit:
Tabulation:
Vin Vo Radj Vo
66
IC723 Voltage regulator:
The 723 voltage regulator is commonly used for series voltage regulator applications. It can be used as
both positive and negative voltage regulator. It has an ability to provide up to 150 mA of current to the
load, but this can be increased more than 10A by using power transistors. It also comes with
comparatively low standby current drain, and provision is made for either linear or fold-back current
limiting. LM723 IC can also be used as a temperature controller, current regulator or shunt regulator
and it is available in both Dual-In-Line and Metal Can packages. The input voltage ranges from 9.5 to
40V and it can regulate voltage from 2V to 37V.
PIN Layout
67
LM723 Low Voltage Regulator:
Note:
68
Tabulation:
Vin Vo Radj Vo
Result:
69
Ex.No: 12 Study of SMPS
Aim:
Theory of SMPS:
Switched Mode Power Supply (SMPS) Like a linear power supply, the switched mode power supply
too converts the available unregulated ac or dc input voltage to a regulated dc output voltage. However
in case of SMPS with input supply drawn from the ac mains, the input voltage is first rectified and
filtered using a capacitor at the rectifier output. The unregulated dc voltage across the capacitor is then
fed to a high frequency dc-to-dc converter. Most of the dc-to-dc converters used in SMPS circuits have
an intermediate high frequency ac conversion stage to facilitate the use of a high frequency
transformer for voltage scaling and isolation. In contrast, in linear power supplies with input voltage
drawn from ac mains, the mains voltage is first stepped down (and isolated) to the desired magnitude
using a mains frequency transformer, followed by rectification and filtering. The high frequency
transformer used in a SMPS circuit is much smaller in size and weight compared to the low frequency
transformer of the linear power supply circuit.
The „Switched Mode Power Supply‟ owes its name to the dc-to-dc switching converter for conversion
from unregulated dc input voltage to regulated dc output voltage. The switch employed is turned „ON‟
and „OFF‟ (referred as switching) at a high frequency. During „ON‟ mode the switch is in saturation
mode with negligible voltage drop across the collector and emitter terminals of the switch where as in
„OFF‟ mode the switch is in cut-off mode with negligible current through the collector and emitter
terminals. On the contrary the voltage regulating switch, in a linear regulator circuit, always remains in
the active region.
70
Block Diagram of DC-DC Converter SMPS:
Result:
71
SIMULATION USING SPICE
AIM:
SOFTWARE REQUIRED:
PROCEDURE:
1. Double Click the software icon the following window will appear.
72
3. Enter your project name.
73
5. Schematic window will be open, draw your project circuit by choosing the components from
place part.
74
7. Create new simulation profile.
75
9. Simulation settings window will be open, give the appropriate settings and click ok.
76
11.Simulated output window will open. check your output.
1k
10k
V2
0 15Vdc
4
0
2 1
V-
- OS1
6
R1 R2 OUT
3 5 V
+ 7 OS2
7.5k 7.5k V+
V1 uA741
2Vac U1
V3
0Vdc
C1 C2
0
0.1uf 0.1uf 15Vdc
0
0
77
* source LOWPASS
V_V1 N00311 0 DC 0Vdc AC 2Vac
X_U1 N00322 N00444 N00386 N00374 N00400 uA741
R_R1 N00311 N00318 7.5k TC=0,0
R_R2 N00318 N00322 7.5k TC=0,0
R_R3 0 N00444 1k TC=0,0
R_R4 N00444 N00400 10k TC=0,0
C_C1 N00400 N00318 0.1uf TC=0,0
C_C2 0 N00322 0.1uf TC=0,0
V_V2 0 N00374 15Vdc
V_V3 N00386 0 15Vdc
AC/SWEEP NOISE- LOGARTHMIC 1HZ to 10 Khz / 20 decade
R3 R4
1k
10k
V2
0 15Vdc
4 0
2 V- 1
- OS1
6
C1 C2 OUT
3 5 V
+ 7 OS2
V+ uA741
V1
2Vac 0.1uf 0.1uf
V3 U1
0Vdc
R1 R2
0
7.5k 7.5k 15Vdc
0
0
78
* source HIGH PASS
C_C1 N01234 N00999 0.1uf TC=0,0
R_R3 0 N01107 1k TC=0,0
R_R1 N01083 N01234 7.5k TC=0,0
X_U1 N01248 N01107 N01067 N01051 N01083 uA741
V_V1 N00999 0 DC 0Vdc AC 2Vac
V_V2 0 N01051 15Vdc
V_V3 N01067 0 15Vdc
R_R2 0 N01248 7.5k TC=0,0
R_R4 N01107 N01083 10k TC=0,0
C_C2 N01248 N01234 0.1uf TC=0,0
AC/SWEEP NOISE- LOGARTHMIC 1HZ to 10 Khz / 20 decade
0 15Vdc
4
0 15Vdc
2 1 0
V-
4
0 - OS1
2 1 6
V-
- OS1 R5 R6 OUT
6 3 5 V
C1 C2 OUT + 7 OS2
3 5 7.5k 7.5k V+ uA741
+ 7 OS2
V+ U2
V1 uA741
0.1uf 0.1uf V6
2Vac
V3 U1
0Vdc C3 C4
0
0 0.1uf 0.1uf
R1 R2 15Vdc
7.5k 7.5k 15Vdc
0
0
0
HPF LPF
79
* source BAND PASS
80
2 (A) ASTABLE MULTIVIBRATOR USING 555 TIMER
0
C2
0
0.1uf
C1
X1 .01uf V
R1
1
555D 4.7k
GND
7
DISCHARGE 6
R3 THRESHOLD 5
3 CONTROL 4
OUTPUT RESET 2
VCC
1k TRIGGER
V
R2
8
0 6.8k
V1
5Vdc
* source 555ASTABLE
X_X1 0 N00262 N00580 N00251 N00208 N00262 N00258 N00251 555D PARAMS:
+ MAXFREQ=3E6
V_V1 N00251 0 5Vdc
R_R1 N00258 N00262 4.7k TC=0,0
R_R2 N00251 N00258 6.8k TC=0,0
C_C1 N00208 0 .01uf TC=0,0
C_C2 N00262 0 0.1uf TC=0,0
R_R3 0 N00580 1k TC=0,0 Run time 10 ms
81
2(b) MONO STABLE MULTIVIBRATOR USING 555 TIMER
0
C2
0
0.1uf
C1
X1 .01uf
1
555D
GND
7
DISCHARGE 6
R3 THRESHOLD 5
3 CONTROL 4
OUTPUT RESET 2
VCC
1k TRIGGER
V
V
R2 V2
8
0 10k
V1 TD = 0.25ms
5Vdc TF = 1ms
PW = 0.5ms
0
PER = 5ms
0 V1 = -2v
TR = 1ms
V2 = 2v
* source MONO555
R_R2 N01006 N01034 10k TC=0,0
C_C1 N00988 0 .01uf TC=0,0
R_R3 0 N01124 1k TC=0,0
X_X1 0 N01321 N01124 N01006 N00988 N01034 N01034 N01006 555D PARAMS:
+ MAXFREQ=3E6
C_C2 N01034 0 0.1uf TC=0,0
V_V1 N01006 0 5Vdc
V_V2 0 N01321
+PULSE -2v 2v 0.25ms 1ms 1ms 0.5ms 5ms Run time 20ms
82
3. A/D CONVERTER
83
4. ANLOG MULTIPLIER
V R1
1k
IN1- OUT+
IN2+ OUT-
E1
EMULT
IN1+
IN2-
V2
V
V1 V
FREQ = 500hz
FREQ = 500hz VAMPL = 0.5v
VAMPL = 2v VOFF = 0v
VOFF = 0v AC =
AC =
0
* source MULTIPLIER
E_E1 N00944 0 VALUE {V(N00158,0)*V(N00182,0)}
V_V1 0 N00158
+SIN 0v 2v 500hz 0 0 0
V_V2 0 N00182
+SIN 0v 0.5v 500hz 0 0 0
R_R1 0 N00944 1k TC=0,0
84
Author:
References:
1. Linear Integrated Circuits, D.Roy Choudhury and Shail B Jain,4th Edition,New age
international Publishers.
2. Op-amps and Linear Integrated Circuits, R. A. Gayakwad. PHI Learning Pvt. Ltd.
Websites:
https://www.electronics-tutorials.com
www.circuitstoday.com
https://nptel.ac.in/courses/
https://electrosome.com
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