Listing 7.1 buff3.

v
// Example 31a: Tri-state buffer
module buff3
# (parameter N = 8)
(input wire [N-1:0] inp ,
input wire en,
output reg [N-1:0] outp
);

always @(*)
begin
if(en == 1)
outp = inp;
else
outp = ' bz;
end

endmodule
Listing 7.2 keyboard.v
// Example 41a: keyboard
module keyboard (
input wire clk25 ,
input wire clr ,
input wire PS2C ,
input wire PS2D ,
output wire [15:0] xkey
);
reg PS2Cf, PS2Df;
reg [7:0] ps2c_filter, ps2d_filter;
reg [10:0] shift1, shift2;

assign xkey = {shift2[8:1], shift1[8:1]};

// filter for PS2 clock and data

always @(posedge clk25 or posedge clr)
begin
if (clr == 1)
begin
ps2c_filter <= 0;
ps2d_filter <= 0;
PS2Cf <= 1;
PS2Df <= 1;
end
else
begin
ps2c_filter[7] <= PS2C;
ps2c_filter[6:0] <= ps2c_filter[7:1];
ps2d_filter[7] <= PS2D;
ps2d_filter[6:0] <= ps2d_filter[7:1];
if(ps2c_filter = = 8'b11111111)
PS2Cf <= 1;
else
if(ps2c_filter == 8'b00000000)
PS2Cf <= 0;
if(ps2d_filter == 8'b11111111)
PS2Df <= 1;
else
if(ps2d_filter == 8'b00000000)
PS2Df <= 0;
end
end
Listing 7.2 (cont.) keyboard.v = _
// Shift register used to clock in scan codes from PS2
always @(negedge PS2Cf or posedge clr)
begin
if (clr == 1)
begin
shiftl <= 0;
shift2 <= 0;
end
else
begin
shift1 <= {PS2Df,shift1[10:1]};
shift2 <= {shift1[0],shift2[10:1]};
end

end

endmodule

Listing 7.3 keyboard_top.v

// Example 41b: keyboard_top
module keyboard_top (
input wire mclk ,
input wire PS2C ,
input wire PS2D ,
input wire [3:0] btn ,
output wire [6:0] a_to_g ,
output wire dp ,
output wire [3:0] an
);
wire pclk, clk25, clk190, clr;
wire [15:0] xkey;

assign clr = b t n [ 3 ] ;

clkdiv U1 (.mclk(mclk),
.clr(clr), .clk190(clk190 .clk25(clk25)
);

keyboard U2 (.clk2 5(clk2 5 ) ,

.clr(clr), .PS2C(PS2C), .PS2D(PS2D), .xkey(xkey)
);

x7segb U3 (.x(xkey),
.cclk(clk190), .clr(clr), .a_to_g(a_to_g),
.an(an), .dp(dp)
);

endmodule
188 Example 42
Listing 7.4 mouse_ctrl.v
// Example 42a: mouse_ctrl
module mouse_ctrl (
input wire clk25 ,
input wire clr ,
input wire sel ,
inout wire PS2C ,
inout wire PS2D ,
output reg [7:0] byte3 ,
output reg [8:0] x_data ,
output reg [8:0] y_data
);
reg [3:0] state;
parameter start = 4'b0000, clklo = 4'b0001, datlo = 4'b0010,
relclk = 4'b0011, sndbyt = 4'b0100, wtack = 4'b0101,
wtclklo = 4'b0110, wtcdrel = 4'b0111, wtclklo1 = 4'b1000,
wtclkhi1 = 4'b1001, getack = 4'b1010, wtclklo2 = 4'b1011,
wtclkhi2 = 4'b1100, getmdata = 4'b1101;
reg PS2Cf PS2Df, cen, den, sndflg;
/

reg ps2cin ps2din, PS2Cio, ps2dio;

/

reg [7:0] ps2c_filter, ps2d_filter;

reg [8:0] x_mouse_v, y_mouse_v, x_mouse_d, y_mouse_d;
reg [10:0] Shift1, Shift2, Shift3;
reg [9:0] f4cmd;
reg [3:0] bit_count, bit_count1;
reg [5:0] bit_count3;
reg [11:0] count;
parameter COUNT_MAX = 12'h9C4; // 2500 1OOus
parameter BIT_COUNT_MAX = 4'b1010; // 10
parameter BIT_C0UNT1_MAX = 4'b1100; // 12 ack
parameter BIT COUNT1 MAX = 6'b100001; // 33
Listing 7.4 (cont.) mouse_ctrLv
// tri-state buffers
always @(*)
begin
if(cen == 1)
ps2cio = ps2cin;
else
ps2cio = l'bz;
if(den = = 1)
ps2dio = ps2din;
else
ps2dio = l'bz;
end

assign PS2C = ps2cio;

assign PS2D = ps2dio;

// filter for PS2 clock and data

always @(posedge clk25 or posedge clr)
begin
if(clr == 1)
begin
ps2c_filter <= 0;
ps2d_filter <= 0;
PS2Cf <= 1;
PS2Df <= 1;
end
else
begin
ps2c_filter[7] <= PS2C;
ps2c_filter[6:0] <= ps2c_filter[7:1];
ps2d_filter[7] <= PS2D;
ps2d_filter[6:0] <= ps2d_filter[7:1];
if (ps2c_f ilter == 8'b11111111)
PS2Cf <= 1;
else
if(ps2c_filter == 8'b00000000)
PS2Cf <= 0;
if (ps2d_f ilter == 8'11111111)
PS2Df <= 1;
else
if(ps2d_filter == 8'b00000000)
PS2Df <= 0;
end
end

// State machine for reading mouse

always @(posedge clk25 or posedge clr)
begin
if(Clr == 1)
begin
state <= start;
cen <= 0;
den < = 0;
ps2cin <= 0;
count <= 0;
Listing 7.4 (cont.) mouse_ctrl.v
bit_count3 <= 0;
bit_countl <= 0;
Shiftl <= 0;
Shift2 <= 0;
Shift3 <= 0;
x_mouse_v <= 0;
y_mouse_v <= 0;
x_mouse_d <= 0;
y_mouse_d <= 0;
sndflg <= 0;
end
else
case(state)
start:
begin
cen <= 1; // enable clock output
ps2cin <= 0; // start bit
count <= 0; // reset count
state <= clklo;
end
clklo:
if(count < COUNT_MAX)
begin
count <= count + 1;
state <= clklo;
end
else
begin
state <= datlo;
den <= 1; // enable data output
end
datlo:
begin
state <= relclk;
cen <= 0; // release clock
end
relclk:
begin
sndflg <= 1;
state <= sndbyt;
end
sndbyt:
if(bit_count < BIT_COUNT_MAX)
state <= sndbyt;
else
begin
state <= wtack;
sndflg <= 0;
den <= 0; // release data
end
wtack: // wait for data low
if(PS2Df mm 1)
state <= wtack;
else
state <= wtclklo;
Listing 7.4 (cont.) mouse_ctrl.v
wtclklo: // wait for clock low
if(PS2Cf == 1)
state <= wtclklo;
else
state <= wtcdrel;
wtcdrel: // wait to release clock and data
if((PS2Cf == 1) && (PS2Df == 1))
begin
state <= wtclklo1;
bit_count1 <= 0;
end
else
state <= wtcdrel;
wtclklo1: // wait for clock low
if(bit_count1 < BIT_COUNT1_MAX)
if(PS2Cf == 1)
state <= wtclklo1;
else
begin
state <= wtclkhi1; // get ack byte FA
Shift1 <= {PS2Df, Shift1[10:1]};
end
else
state <= getack;
wtclkhi1: // wait for clock high
if(PS2Cf == 0)
state <= wtclkhi1;
else
begin
state <= wtclklo1;
bit_count1 <= bit_count1 + 1;
end
getack: // get ack FA
begin
y_mouse_v <= Shift1[9:1];
x_mouse_v <= Shift2[8:0];
byte3 <= {Shift1[10:5], Shift1[1:0]};
state <= wtclklo2;
bit_count3 <= 0;
end
wtclklo2: // wait for clock low
if(bit_count3 < BIT_COUNT1_MAX)
if(PS2Cf == 1)
state <= wtclklo2;
else
begin
state <= wtclkhi2;
Shift1 <= {PS2Df, Shift1[10:1]};
Shift2 <= {Shift1[0], Shift2[10:1]};
Shift3 <= {Shift2[0], Shift3[10:1]};
end
else
Listing 7.4 (cont.) mouse_ctrl.v
begin
x_mouse_v <= {Shift3[5], Shift2[8:1]};
// x velocity
y_mouse_v <= {Shift3[6], Shift1[8:1]};
// y velocity
byte3 <= Shift3[8:1];
state <= getmdata;
end
wtclkhi2: // wait for clock high
if(PS2Cf == 0)
state <= wtclkhi2;
else
begin
state <= wtclklo2;
bit_count3 <= bit_count3 + 1;
end
getmdata: // read mouse data and keep going
begin
x_mouse_d <= x_mouse_d + x_mouse_v; //x distance
y_mouse_d <= y_mouse_d + y_mouse_v; //y distance
bit_count3 <= 0;
state <= wtclklo2;
end
default ;
endcase
end

// send F4 command to mouse

always @(negedge PS2Cf or posedge clr)
begin
if(clr == 1)
begin
f4cmd <= 10'b1011110100; // stop-parity-F4
ps2din <= 0;
bit_count <= 0;
end
else
if(sndflg == 1)
begin
ps2din <= f4cmd[0];
f4cmd[8:0] <= f4cmd[9:1];
f4cmd[9] <= 0;
bit_count <= bit_count + 1;
end
end

// Output select
always @(*)
begin
if (sel == 0)
begin
x_data <= x_mouse_v;
y_data <= y_mouse_v;
end
Listing 7.4 (cont.) mouse_ctrl.v
else
begin
x_data <= x_mouse_d;
y_data <= y_mouse_d;
end

end

endmodule

Listing 7.5 mouse_top.v

// Example 42b: mouse_top
module mouse_top (
input wire mclk ,
inout wire PS2C ,
inout wire PS2D ,
input wire [3:0] btn ,
output wire [3:0] Id ,
output wire [6:0] a_to_g ,
output wire dp ,
output wire [3:0] an
);
wire clk25, clk190, clr;
wire [7:0] byte3;
wire [8:0] x_data, y_data;
wire [15:0] xmouse;

assign clr = b t n [ 3 ] ;
assign xmouse = {x_data[7:0] , y_data[7:0]};
assign ld[0] = y_data[8];
assign ld[1] = x_data[8];
assign ld[2] = byte3[1]; // right button
assign ld[3] = byte3[0]; // left button

clkdiv U1 (.mclk(mclk),
.clr(clr),.clk190(clk190), .clk25(clk25)
);

mouse_ctrl U2 (.clk25(clk25),
.clr(clr), .sel(btn[0]), .PS2C(PS2C), .PS2D(PS2D) /

.byte3(byte3), .x_data(x_data), .y_data(y_data)

);

x7segb U3 (.x(xmouse),
.cclk(clk190), .clr(clr), .a_to_g(a_to_g),
.an(an), .dp(dp)
);

endmodule
 Listing 7.6 vga_mouse_top.v
// Example 42c: vga_mouse_top
module vga_mouse_top (
input wire mclk ,
inout wire PS2C ,
inout wire PS2D ,
input wire [3:0] btn ,
output wire [1:0] ld ,
output wire hsync ,
output wire vsync ,
output wire [2:0] red ,
output wire [2:0] green ,
output wire [1:0] blue
);
wire clk25, clk190, clr, vidon, sel;
wire [7:0] byte3;
wire [8:0] x_data, y_data;
wire [9:0] he, vc, cursor_row, cursor_col;
wire [0:31] M;
wire [3:0] rom_addr4;
parameter XC = 10'b0101000000; // 320
parameter YC = 10'b0011110000; // 240

assign clr = b t n [ 3 ] ;
assign sel = 1 ; // distance data
assign ld[0] = byte3 [1] ; // right button
assign ld[1] = byte3 [0] ; // left button
assign cursor_row = YC - {y_data[8], y_data};
assign cursor_col = XC + {x_data[8], x_data};

clkdiv U1 (.mclk(mclk), .clr(clr), .clk190(clk190), .clk25(clk25));

vga_640x480 U2 (.clk(clk25), .clr(clr), .hsync(hsync),

.vsync(vsync), .he(he), .vc(vc), .vidon(vidon));

vga_mouse_initials U3 (.vidon(vidon), .hc(hc), .vc(vc), .M(M),

.cursor_row(cursor_row), .cursor_col(cursor_col),
.rom_addr4(rom_addr4), .red(red), .green(green), .blue(blue));

prom_DMH U4 (.addr(rom_addr4), .M(M) );

mouse_ctrl U5 (.clk25(clk25), .clr(clr), .sel(sel), .PS2C(PS2C),

.PS2D(PS2D), .byte3(byte3), .x_data(x_data), .y_data(y_data));

endmodule