Smart Highside High Current Power Switch: Features Product Summary
Smart Highside High Current Power Switch: Features Product Summary
Smart Highside High Current Power Switch: Features Product Summary
Application
• Power switch with current sense diagnostic 5
feedback for 12 V and 24 V DC grounded loads
• Most suitable for loads with high inrush current
like lamps and motors; all types of resistive and 1
inductive loads Straight leads
• Replaces electromechanical relays, fuses and
discrete circuits
General Description
N channel vertical power FET with charge pump, current controlled input and diagnostic feedback with load
current sense, integrated in Smart SIPMOS chip on chip technology. Fully protected by embedded protection
functions.
3 & Tab
+ V bb
R bb
Voltage Overvoltage Current Gate
source protection limit protection
OUT 1, 5
Limit for
Voltage Charge pump unclamped IL
sensor ind. loads
Level shifter Current
Rectifier Output Sense
2 IN Voltage Load
ESD Logic detection
I IN
Temperature
sensor
I IS
IS PROFET
Load GND
4
VIN
R
V IS IS
Logic GND
1 OUT O Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
2 IN I Input, activates the power switch in case of short to ground
3 Vbb Positive power supply voltage, the tab is electrically connected to this pin.
+
In high current applications the tab should be used for the Vbb connection
instead of this pin4).
5 OUT O Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
3) Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
4) Otherwise add up to 0.5 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
5) RI = internal resistance of the load dump test pulse generator.
6) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group Page 2 1998-Aug-31
Preliminary Data Sheet BTS550P
Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ max
Thermal resistance chip - case: RthJC7) -- -- 0.35 K/W
junction - ambient (free air): RthJA -- 30 --
Electrical Characteristics
Parameter and Conditions Symbol Values Unit
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified min typ max
7) Thermal resistance RthCH case to heatsink (about 0.25 K/W with silicone paste) not included!
8) Decrease of Vbb below 10 V causes a slowly a dynamic increase of RON to a higher value of RON(Static). As
long as VbIN > VbIN(u) max, RON increase is less than 10 % per second for TJ < 85 °C.
9) Not tested, specified by design.
10) T is about 105°C under these conditions.
J
11) See timing diagram on page 13.
Operating Parameters
Operating voltage (VIN = 0) 8, 12) Vbb(on) 5.0 -- 34 V
Undervoltage shutdown 13) VbIN(u) 2.0 3.0 4.5 V
Undervoltage start of charge pump
see diagram page 14 VbIN(ucp) 3.5 4.5 6.0 V
Overvoltage protection14) Tj =-40°C: VbIN(Z) 60 -- -- V
Ibb = 15 mA Tj = 25...+150°C: 62 66 --
Standby current Tj =-40...+25°C: Ibb(off) -- 15 25 µA
IIN = 0 Tj = 150°C: -- 25 50
Protection Functions
Short circuit current limit (Tab to pins 1,5)
VON = 12 V, time until shutdown max. 350 µs
Tc =-40°C: IL(SCp) -- 170 -- A
Tc =25°C: -- 180 250
Tc =+150°C: 120 170 --
Short circuit shutdown delay after input current
positive slope, VON > VON(SC) td(SC) 80 -- 350 µs
min. value valid only if input "off-signal" time exceeds 30 µs
Output clamp 15) IL= 40 mA: -VOUT(CL) -- 16.8 -- V
(inductive load switch off) IL= 20 A: -- 19.0 --
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) (e.g. overvoltage) VON(CL) 39 42 46.5 V
IL= 40 mA
Short circuit shutdown detection voltage
(pin 3 to pins 1,5) VON(SC) -- 6 -- V
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis ∆Tjt -- 10 -- K
12) If the device is turned on before a Vbb-decrease, the operating voltage range is extended down to VbIN(u).
For the voltage range 0..34 V the device is fully protected against overtemperature and short circuit.
13) V
bIN = Vbb - VIN see diagram on page 6. When VbIN increases from less than VbIN(u) up to VbIN(ucp) = 5 V
(typ.) the charge pump is not active and VOUT ≈Vbb - 3 V.
14) See also V
ON(CL) in circuit diagram on page 7.
15) This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 7). If the diode
is used, VOUT is clamped to Vbb- VON(CL) at inductive load switch off.
Reverse Battery
Reverse battery voltage 16) -Vbb -- -- 32 V
On-state resistance (Pins 1,5 to pin 3) Tj = 25 °C: RON(rev) -- 3.8 4.6 mΩ
Vbb = -12V, VIN = 0, IL = - 20 A, RIS = 1 kΩ Tj = 150 °C: -- 9
Integrated resistor in Vbb line Rbb -- 120 -- Ω
Diagnostic Characteristics
Current sense ratio, IL = 120 A,Tj =-40°C: kILIS 19 000 21 100 22 500
static on-condition, Tj =25°C: 19 000 20 900 22 500
kILIS = IL : IIS, Tj =150°C: 18 400 19 600 22 000
VON < 1.5 V17), IL = 20 A,Tj =-40°C: 19 300 22 500 25 500
VIS <VOUT - 5 v, Tj =25°C: 19 500 21 500 24 800
VbIN > 4.0 V Tj =150°C: 18 500 20 500 23 000
see diagram on page 11 IL = 12 A,Tj =-40°C: 19 000 23 000 27 500
Tj =25°C: 19 000 22 500 26 000
Tj =150°C: 17 500 20 000 22 000
IL = 6 A,Tj =-40°C: 17 000 26 000 42 000
Tj =25°C: 17 000 23 800 33 000
Tj =150°C: 17 000 20 000 26 000
IIS=0 by IIN =0 (e.g. during deenergizing of inductive loads):
Sense current saturation IIS,lim 6.5 -- -- mA
Current sense leakage current
IIN = 0, VIS = 0: IIS(LL) -- -- 0.5 µA
VIN = 0, VIS = 0, IL ≤ 0: IIS(LH) -- 2 --
Current sense settling time18) ts(IS) -- -- 500 µs
Overvoltage protection Tj =-40°C: VbIS(Z) 60 -- -- V
Ibb = 15 mA Tj = 25...+150°C: 62 66 --
Input
Input and operating current (see diagram page 12) IIN(on) -- 0.8 1.5 mA
IN grounded (VIN = 0)
Input current for turn-off19) IIN(off) -- -- 80 µA
16) The reverse load current through the intrinsic drain-source diode has to be limited by the connected load
(as it is done with all polarity symmetric loads). Note that under off-conditions (I IN = I IS = 0) the power
transistor is not activated. This results in raised power dissipation due to the higher voltage drop across the
intrinsic drain-source diode. The temperature protection is not active during reverse current operation!
Increasing reverse battery voltage capability is simply possible as described on page 8.
17) If V
ON is higher, the sense current is no longer proportional to the load current due to sense current
saturation, see IIS,lim .
18) Not tested, specified by design.
19) We recommend the resistance between IN and GND to be less than 0.5 kΩ for turn-on and more than
500kΩ for turn-off. Consider that when the device is switched off (IIN = 0) the voltage between IN and GND
reaches almost Vbb.
Semiconductor Group Page 5 1998-Aug-31
Preliminary Data Sheet BTS550P
Parameter and Conditions Symbol Values Unit
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified min typ max
Truth Table
Input Output Current Remark
current Sense
level level IIS
Normal L L 0
operation H H nominal =IL / kilis, up to IIS=IIS,lim
Very high up to VON=VON(Fold back)
H H IIS, lim
load current IIS no longer proportional to IL
Current- VON > VON(Fold back)
H H 0
limitation if VON>VON(SC), shutdown will occure
Short circuit to L L 0
GND H L 0
Over- L L 0
temperature H L 0
Short circuit to L H 0
Vbb H H <nominal 20)
Open load L Z21) 0
H H 0
Negative output L L 0
voltage clamp
Inverse load L H 0
current H H 0
L = "Low" Level
H = "High" Level
Overtemperature reset by cooling: Tj < Tjt (see diagram on page 14)
Short circuit to GND: Shutdown remains latched until next reset via input (see diagram on page 13)
Terms
RON measurement layout
I bb
3
VbIN
Vbb VON ≤ 5.5 mm
IL
V IN OUT
bb 2 1,5
PROFET
RIN
IS Vbb force contacts Out Force Sense
V 4 I IS contacts contacts
IN VbIS
(both out
I IN DS pins parallel)
VOUT
VIS R IS
20) Low ohmic short to Vbb may reduce the output current IL and can thus be detected via the sense current IIS.
21) Power Transistor "OFF", potential defined by external impedance.
Semiconductor Group Page 6 1998-Aug-31
Preliminary Data Sheet BTS550P
Input circuit (ESD protection) Short circuit detection
Fault Condition: VON > VON(SC) (6 V typ.) and t> td(SC)
V bb
(80 ...350 µs).
+ Vbb
R bb
V ZD
Z,IN
VON
V bIN
IN
I OUT
IN
Logic Short circuit
unit detection
V IN
Inductive and overvoltage output clamp
+ Vbb
When the device is switched off (IIN = 0) the voltage
between IN and GND reaches almost Vbb. Use a VZ1
mechanical switch, a bipolar or MOS transistor with
appropriate breakdown voltage as driver. VON
VZ,IN = 66 V (typ).
VZG OUT
Current sense status output
PROFET
IS
Vbb VOUT
DS
R bb
V
Z,IS
ZD
R IS RV V Z,VIS
Signal GND
Power
R IN Logic Transistor IS
IS
DS V Zb
RL
D RIS RV
V
bb V
bb
IN PROFET OUT
IS
V ZL
E AS
ELoad 10
V
bb
i L(t)
V bb
IN PROFET OUT
EL 1
IS L
0 5 10 15 20
I
IN
ZL { RL ER IL [A]
RIS
22) Latch except when Vbb -VOUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT
≠ 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 4). No latch
between turn on and td(SC).
23) Can be "switched off" by using a diode D (see page 7) or leaving open the current sense output.
S
7 34000
32000
6
30000
5
28000
4 26000
max
max
3 24000
min
22000 typ
2
20000
1
18000 min
0 16000
0 20 40 60 80 100 120 0 20 40 60 80 100 120
IL [A] IL [A]
Current sense ratio: Current sense ratio:
KILIS = f(IL), TJ = -40 °C KILIS = f(IL), TJ = 150 °C
Kilis Kilis
42000 30000
40000
38000 28000
36000
26000
34000
32000
24000
30000 max
max
28000
22000
26000
max
24000 typ
typ
20000
22000 typ
typ
20000 18000
min
min
18000 min
16000 16000
0 20 40 60 80 100 120 0 20 40 60 80 100 120
IL [A] IL [A]
1.4
600
1.2
500
VON > VON(SC) only for t < td(SC) 1
(otherwise immediate
400
0.8
300
0.6
TJ = 25°C
200
0.4
0
VON(FB)
0
0 5 10 15 20
0 20 40 60 80
VON [V]
VbIN [V]
In case of VON > VON(SC) (typ. 6 V) the device will be
switched off by internal short circuit detection.
Typ. on-state resistance
RON = f (Vbb, Tj ); IL = 20 A; VIN = 0
RON [mOhm]
10
static
9
dynamic
8
7
Tj = 150°C
6
5 85°C
4
25°C
3
-40°C
2
0
0 5 10 15 40
20
Vbb [V]
VOUT dV/dtoff
90% VOUT
t on
dV/dton
t off
10%
IL tslc(IS) t slc(IS) IL
Load 1 Load 2
IIS
IIS t
tson(IS) t
t soff(IS)
IIN
IL
IL(SCp)
VOUT td(SC)
IIL
IIS
VOUT>>0
VOUT=0
t
IIS
t
Shut down remains latched until next reset via input.
Sense current saturation can occur at very high
inrush currents (see IIS,lim on page 5).
IIN
IIS
Tj
VOUT
VIN = 0
V ON(CL)
dynamic, short
6
Undervoltage
not below
VbIN(u)
4
2 IIN = 0
VON(CL)
0
0 V bIN(u) 4 V bIN(ucp) V bb