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8-Bit UART With BIST and Hamming Code Feature Using Verilog Module

This document is a project synopsis submitted by three students for their Bachelor of Technology degree in Electronics and Communication Engineering. It describes the design of an 8-bit UART module with built-in self-test (BIST) and Hamming code capabilities implemented in Verilog. The UART allows for asynchronous serial communication between a processor and peripherals. BIST and Hamming code are added to enable error detection and correction during data transmission to improve reliability. Block diagrams show the overall architecture and data frame format. Xilinx ISE Design Suite 14.7 is the software used for synthesis and analysis of the HDL code.

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Abhishek Singh
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166 views5 pages

8-Bit UART With BIST and Hamming Code Feature Using Verilog Module

This document is a project synopsis submitted by three students for their Bachelor of Technology degree in Electronics and Communication Engineering. It describes the design of an 8-bit UART module with built-in self-test (BIST) and Hamming code capabilities implemented in Verilog. The UART allows for asynchronous serial communication between a processor and peripherals. BIST and Hamming code are added to enable error detection and correction during data transmission to improve reliability. Block diagrams show the overall architecture and data frame format. Xilinx ISE Design Suite 14.7 is the software used for synthesis and analysis of the HDL code.

Uploaded by

Abhishek Singh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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“8-Bit UART with BIST and Hamming code feature

using Verilog module”

Project synopsis submitted


In partial fulfilment of the requirements
For the award of the Degree of

BACHELOR OF TECHNOLOGY
in
ELECTRONICS AND COMMUNICATION ENGINEERING
by
ABHISHEK PRATAP SINGH (1513231011)
JITENDER KUMAR (1513231078)
AKASH AGARWAL (1513231018)

DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING


GREATER NOIDA INSTITUTE OF TECHNOLOGY
GREATER NOIDA
Affiliated to Dr. A.P.J. Abdul Kalam Technical University, Lucknow
(Formerly Uttar Pradesh Technical University, Lucknow UP)
ABSTRACT
This paper illustrates that the Asynchronous serial communication is usually implemented by
Universal Asynchronous Receiver Transmitter UAR used for short distance, low speed, low
cost data exchange between processor and peripherals. In an industrial working environment
employing multiprocessor communication using UART, noise may affect the data and data
may be received with errors. The working of the system may be affected due to these kinds of
errors resulting in an improper control. Several existing UART designs are incorporating error
detection logic. In this technique, it requires retransmission of data frames when errors are
detected. Thus, Linear block codes like hamming code as well as error detection capability can
be used to correct data and there is a need for realizing the UART function in a single or a very
few chips due to VLSI Testing problems. It is a need to ensure the data transfer is error proof.
This project introduces Status Register and BIST (Built-In Self-Test) to overcome the
testability and data integrity. With Implementation of BIST, expensive tester requirement and
testing procedures starting from circuit or logic level to field level testing are minimized.
INTRODUCTION

UART (Universal Asynchronous Receiver Transmitter) is an asynchronous serial


communicating device used for data exchange between processor and its peripherals. UART
allows full-duplex communication in serial link, thus has been widely used in the data
communication and control system applications. UART communication needs only two signals
(Transmit, Receive) to complete full-duplex data communication. Basic UART consist of a
parity check mechanism and it needs an external test bench to test and verify its efficiency
whereas to achieve better Quality Of data transmission, error detecting and correcting
techniques are used. Different error detecting and correcting techniques are available. Here we
are using hamming code for error detection and correction. Hamming code can correct single
bit error and detect single bit error. Hamming codes are used to detect and correct a larger set
of errors.

With increase in designing and complexity, testing has become a major problem as external
test bench has to created or used for this purpose and various VLSI testing problems like Test
generation problems, input combinatorial problems, gate to I/O pin ratio problems are
encountered. In order to cope up with these problems we insert a special test circuitry on the
VLSI circuit that allows efficient test coverage to answer these problems. It is addressed by the
need of design for testability (DFT) using BIST circuit. BIST is an on-chip test logic that is
utilized to test the functional logic of a chip, by itself. With the rapid increase in the design
complexity, BIST has become a major design consideration in DFT methods and is becoming
increasingly important. A properly designed BIST is able to offset the cost of added test
hardware while at the same time ensuring the reliability, testability and reduces maintenance
cost. BIST solution consists of an Automatic Test Pattern Generator (ATPG), the circuit to be
tested, a way to analyse the results, and a way to compress those results for simplicity and
handling.
BLOCK DIAGRAM

Fig. no. 1 UART with BIST architecture

Fig. no. 2 Data Frame Format


SOFTWARE

Fig. no. 3 Xilinx ISE Design Suite 14.7

The software used in this project is “Xilinx ISE design suite.” It is software which is used for
the synthesis and analysis of the HDL codes.

About the software:

Xilinx ISE (Integrated Synthesis Environment) is a software tool produced by Xilinx for
synthesis and analysis of HDL designs, enabling the developer to synthesize(‘compile”) their
design, perform timing analysis, examine RTL diagrams, simulate a design’s reaction to
different stimuli, and configure the target device with the programmer.

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