RF MICROELECTRONICS Second Edition Behzad Razavi PRENTICE HALL Upper Saddle River, NJ ¢ Boston # Indianapolis ¢ San Francisco New York # Toronto # Montreal # London # Munich # Paris # Madrid Capetown # Sydney # Tokyo ® Singapore ¢ Mexico CityMany of the designations used by manufacturers and sellers to distinguish their products are claimed as trademarks. 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To cbtain permission to use material from this work, please submit a writen request to Pearson Education, Inc, Permissions Department, One Lake Street, Upper Saddle River, New Jersey 07458, or you may fax your request to 201) 236-3290, ISBN-13: 978.0-13-713473-1 ISBN-I0: 0-13-713473-8 ‘Text printed in the United States at Hamilton Printing Company in Castleton, New York First printing, September 2011 Publisher aul Boger Acquisitions Editor Bernard Goodwin ‘Managing Editor John Fuller Full-Service Production Manager Tule B. Nahi Copy Editor Geneil Breeze Indexer Ted Laux Publishing Coordinator Michelle Housley Cover Designer Gary Adkir Compositor LaurelTechTo the memory of my parentsThis page intentionally left blankCONTENTS PREFACE TO THE SECOND EDITION. PREFACE TO THE FIRST EDITION ACKNOWLEDGMENTS ABOUT THE AUTHOR CHAPTER 1 INTRODUCTION TO RF AND WIRELESS TECHNOLOGY 1.1 A Wireless World 1.2 RF Design Is Challenging 13 The Big Picture References CHAPTER 2 BASIC CONCEPTS IN RF DESIGN 2.1 General Considerations 211 24.2 213 Units in RF Design Time Variance Nonlinearity 2.2 Effects of Nonlinearity 2.2.1 2.2.2 2.2.3 2.24 2.2.5 2.2.6 2.3. Noise 2.3.1 2.3.2 Harmonic Distortion Gain Compression Cross Modulation Intermodulation Cascaded Nonlinear Stages AM/PM Conversion Noise as a Random Process Noise Spectrum xv xix xxi xxiii wee viiviii Effect of Transfer Function on Noise Device Noise Representation of Noise in Circuits 24 vity and Dynamic Range Sens Dynamic Range 2.5 Passive Impedance Transformation 2.5.1 Quality Factor 2.5.2. Series-to-Parallel Conversion in Matching Networks 2.6 Scattering Parameters 2.7 Analysis of Nonlinear Dynamic Systems 2.7.1 Basic Considerations 2.8 Volterra Series 2.8.1 Method of Nonlinear Currents References Problems CHAPTER 3. COMMUNICATION CONCEPTS 3.1 3.2 33 34 35 3.6 37 General Considerations Analog Modulation 3.2.1 Amplitude Modulation 3.2.2. Phase and Frequency Modulation Digital Modulation 3.3.1 Intersymbol Interference 3.3.2 Signal Constellations 3.3.3. Quadrature Modulation 3.3.4 GMSK and GFSK Modulation 5 Quadrature Amplitude Modulation 3.3.6 Orthogonal Frequency Division Multiplexing Spectral Regrowth Mobile RF Communications Multiple Access Techniques 3.6.1 Time and Frequency Division Duplexing 3.6.2. Frequency-Division Multiple Access 3 Time-Division Multiple Access 3.6.4 Code-Division Multiple Access Wireless Standards 3.7.1 GSM 3.7.2. 18-95 CDMA 3.7.3 Wideband CDMA 4 Bluetooth 3.7.5 IEEES802.11a/b/g Contents 39 40 46 58 59 60 62 63 63 65 69 71 15 15 7 81 86 86 o1 91 93 93 95 99 101 105 107 112, 14 5 118 119 123 123 125 125 126 130 132 137 139 143 147Contents ix 3.8 Appendix I: Differential Phase Shift Keying 151 References 152 Problems 152 CHAPTER 4 TRANSCEIVER ARCHITECTURES 4.1 General Considerations 4.2 Receiver Architectures 4.2.1 Basic Heterodyne Receivers 4.2.2 Modern Heterodyne Receivers 4.2.3 Direct-Conversion Receivers 4.2.4 Image-Reject Receivers 4.2.5 Low-IF Receivers 43 Transmitter Architectures 43.1 General Considerations 43.2. Direct-Conversion Transmiters 43.3 Modern Direct-Conversion Transmitters 4.3.4 Heterodyne Transmitters 43.5 Other TX Architectures 44 OOK Transceivers References Problems CHAPTER 5 LOW-NOISE AMPLIFIERS 255 5.1 General Considerations 255 5.2 Problem of Input Matching 263 5.3 LNA Topologies 266 5.3.1 Common-Source Stage with Inductive Load 266 5.3.2 Common-Source Stage with Resistive Feedback 269 5.3.3 Common-Gate Stage 272 5.3.4 Cascade CS Stage with Inductive Degeneration 284 5.3.5 Variants of Common-Gate LNA 296 5.3.6 Noise-Cancelling LNAs 300 5.3.7 Reactance-Cancelling LNAs 303 5.4 Gain Switching 305 5.5 Band Swi 312 5.6 High-IP: LN, 313 5.6.1 Differential LNAs 314 5.6.2 Other Methods of IP) Improvement 323 5.7 Nonlinearity Calculati 325 5.7.1 Degenerated CS Stage 325 5.7.2 Undegenerated CS Stage 329 5.7.3. Differential and Quasi-Differential Pairs 331 5.7.4 Degenerated Differential Pair 332 References 333 Problems 333x CHAPTER 6 MIXERS 6.1 General Considerations 6.1.1 Performance Parameters 6.1.2 Mixer Noise Figures 6.1.3. Single-Balanced and Double-Balanced Mixers 6.2 Passive Downconversion Mixers 62.1 Gain 6.2.2 LO Self-Mixing Noise Input Impedance Current-Driven Passive Mixers 6.3 Active Downconversion Mixers 6.3.1 Conversion Gain 6.3.2 Noise in Active Mixers 6.3.3. Linearity 6.4 — Improved Mixer Topologies 6.4.1 Active Mixers with Current-Source Helpers 6.4.2 Active Mixers with Enhanced Transconduetance 6.4.3. Active Mixers with High IP, 6.4.4 Active Mixers with Low Flicker Noise 6.5 Upconversion Mixers 6.5.1 Performance Requirements 6.5.2. Upconversion Mixer Topologies Reference: Problems CHAPTER7 PASSIVE DEVICES WA 72 73 TA 75 16 General Considerations Inductors 7.2.1 Basic Structure 7.2.2. Inductor Geometries 7.2.3. Inductance Equations 7.2.4 Parasitic Capacitances 7.2.5 Loss Mechanisms 7.2.6 Inductor Modeling 7.2.7 Altemative Inductor Structures ‘Transformers 7.3.1 Transformer Structures 7.3.2 Effect of Coupling Capacitance 7.3.3. Transformer Modeling ‘Transmission Lines 741 T-Line Structures Varactors Constant Capacitors 7.6.1 MOS Capacitors 7.6.2. Metal-Plate Capacitors Contents 337 337 338 343 348 350 350 357 357 364 366 368 370 377 387 393 303 304 307 405 408 408 409 424 425 429 429 431 431 435 436 439 444 455 460 470 470 475 475 416 478 483 490 491 493Contents xi References 495 Problems 496 CHAPTER 8 OSCILLATORS 8.1 Performance Parameters 8.2 Basic Principles 8.2.1 Feedback View of Oscillators 8.2.2 One-Port View of Oscillators 8.3. Cross-Coupled Oscillator 8.4 Three-Point Oscillators 8.5 Voltage-Controlled Oscillators 8.5.1 Tuning Range Limitations 8.5.2 Effect of Varactor Q 8.6 LC VCOs with Wide Tuning Range 8.6.1 VCOs with Continuous Tuning 8.6.2 Amplitude Variation with Frequency Tuning 8.6.3 Discrete Tuning 8.7 Phase Noise 8.7.1 Basic Concepts 8.7.2 _ Effect of Phase Noise 8.7.3. Analysis of Phase Noise: Approach I 8.7.4 Analysis of Phase Noise: Approach II 8.7.5 Noise of Bias Current Source 8.7.6 Figures of Merit of VCOs 8.8 Design Procedure 88.1 Low-Noise VCOs 89 LO Interface 8.10 Mathematical Model of VCOs 8.11 Quadrature Oscillators 8.11.1 Basic Concepts 8.11.2 Properties of Coupled Oscillators 8.11.3 Improved Quadrature Oscillators 8.12 Appendix I: Simulation of Quadrature Oscillators References Problems CHAPTER 9 PHASE-LOCKED LOOPS 597 9.1 Basic Concepis 597 9.1.1 Phase Detector 597 9.2 Type-I PLLs 600 9.2.1 Alignment of a VCO's Phase 600 9.2.2. Simple PLL 601 9.2.3 Analysis of Simple PLL 603 9.2.4 Loop Dynamics 606 9.2.5 Frequency Multiplication 609 9.2.6 Drawbacks of Simple PLL 6llxii 9.3 94 95 96 97 98 ‘Type-II PLLs 9.3.1 Phase/Frequency Detectors 9.3.2 Charge Pumps 9.3.3 Charge-Pump PLLs 9.3.4 Transient Response 9.3.5 Limitations of Continuous-Time Approxim: 9.3.6 Frequency-Multiplying CPPLL 9.3.7 Higher-Order Loops PED/CP Nonidealities 9.4.1 Upand Down Skew and Width Mismatch 94.2 Voltage Compliance 94.3 Charge Injection and Clock Feedthrough Random Mismatch between Up and Down Currents 94.5 Channel-Length Modulation 9.4.6 Circuit Techniques Phase Noise in PLLs 95.1 VCO Phase Noise 9.5.2 Reference Phase Noise Loop Bandwidth Design Procedure Appendix I: Phase Margin of Type-II PLLs References Problems CHAPTER 10 INTEGER-N FREQUENCY SYNTHESIZERS 10.1 General Considerations 10.2 Basic Integer-N Synthesizer 10.3 Settling Behavior 10.4 Spur Reduction Techniques 10.5 PLL-Based Modulation 10.5.1 In-Loop Modulation 10.5.2 Modulation by Offset PLLs 10.6 Divider Design 10.6.1 Pulse Swallow Divider 10.6.2. Dual-Modulus Dividers 10.6.3 Choice of Prescaler Modulus 10.6.4 Divider Logic Styles 10.65 Miller Divider 10.6.6 Injection-Locked Dividers 10.6.7 Divider Delay and Phase Noise References Problems Contents oll 612 614 615 620 622 623 625 627 627 630 630 632 633 634 638 638 643 645 646 647 651 652 655, 655 659 661 664 667 667 670 673 674 677 682 683 699 707 709 712 713Contents CHAPTER 11 FRACTIONAL-N SYNTHESIZERS Wd Basic Concepts 11.2 Randomization and Noise Shaping 11.2.1 Modulus Randomization 11,22. Basic Noise Shaping 11.2.3. Higher-Order Noise Shaping 11.2.4 Problem of Out-of-Band Noise 11.2.5 Effect of Charge Pump Mismatch 11.3 Quantization Noise Reduction Techniques 11.3.1 DAC Feedforward 113.2. Fractional Divider 11.3.3. Reference Doubling 11.34 Multiphase Frequency Division 11.4 Appendix I: Spectrum of Quantization Noise References Problems CHAPTER 12, POWER AMPLIFIERS 12.1 12.2 12.3 12.4 12.5 12.6 12.7 General Considerations 12.1.1 Effect of High Curents 12.12 Efficiency 12.1.3 Linearity 12.1.4 Single-Ended and Differential PAs Classification of Power Amplifiers 12.2.1 Class A Power Amplifiers 12.2.2 Class B Power Amplifiers 12.2.3. Class C Power Amplifiers High-Efficiency Power Amplifiers 12.3.1 Class A Stage with Harmonic Enhancement 12.3.2 Class E Stage 12.3.3 Class F Power Amplifiers Cascode Output Stages Large-Signal Impedance Matching Basic Linearization Techniques 12.6.1 Feedforward 12.6.2. Cartesian Feedback 12.6.3 Predistortion 12.6.4 Envelope Feedback Polar Modulation 12.7.1 Basic Idea 12.7.2 Polar Modulation Issues 12.7.3 Improved Polar Modulation xiii m5 115 118 18 722 728 732 733 738 738 742 743 745 7A8 749 749 751 751 154 155 156 158 760 760 164 768 770 771 772 775 776 780 782 783 786 187 788 790 790 703 796xiv 128 — Outphasing 12.8.1 Basic Idea 1282 Outphasing Issues 12.9 Doherty Power Amplifier 12.10 Design Examples 12.101 Cascode PA Examples 12.10.2 Positive-Feedback PAs 12.10.3 PAs with Power Combining 12.104 Polar Modulation PAs 12.105 Outphasing PA Example References Problems CHAPTER 13 TRANSCEIVER DESIGN EXAMPLE 13.1 System-Level Considerations 13.1.1 Receiver 13.1.2 Transmitter 13.13. Frequency Synthesizer 13.14 Frequency Planning 13.2. Receiver Design 13.2.1 LNA Design 13.22 Mixer Design 13.23 AGC 13.3. TX Design 13.3.1 PA Design 13.3.2 Upconverter 13.4 Synthesizer Design 134.1 VCO Design 13.42 Divider Design 13.4.3 Loop Design References Problems INDEX Contents 802 802, 805 811 814 815 819 821 824 826 830 831 833 833 834 838 840, 844 848 849 851 856 861 861 867 869 869 878 882, 886 886, 889PREFACE TO THE SECOND EDITION In the 14 years since the first edition of this book, RF IC design has experienced a dramatic metamorphosis. Innovations in transceiver architectures, circuit topologies, and device structures have led to highly-integrated “radios” that span a broad spectrum of applica- tions, Moreover, new analytical and modeling techniques have considerably improved our understanding of RF circuits and their underlying principles. A new edition was therefore due. The second edition differs from the first in several respects: 1. I realized at the outset—three-and-a-half years ago—that simply adding “patches” to the first edition would not reflect today’s RF microelectronics. I thus closed the first edition and began with a clean slate. The two editions have about 10% overlap. 2. I wanted the second edition to contain greater pedagogy. helping the reader under- stand both the fundamentals and the subtleties. I have thus incorporated hundreds of examples and problems. 3. L also wanted to teach design in addition to analysis. I have thus included step-by- step design procedures and examples. Furthermore, I have dedicated Chapter 13 to the step-by-step transistor-level design of a dual-band WiFi transceiver. 4, With the tremendous advances in RF design, some of the chapters have inevitably become longer and some have been split into two or more chapters. As a result, the second edition is nearly three times as long as the first. Suggestions for Instructors and Students The material in this book is much more than can be covered in one quarter or semester. The following is a possible sequence of the chapters that can be taught in one term with reasonable depth. Depending on the students’ background and the instructor's preference, other combinations of topics can also be covered in one quarter or semester. xvxvi Preface to the Second Edition Chapter 1: Introduction to RF and Wireless Technology ‘This chapter provides the big picture and should be covered in about half an hour. Chapter 2: Basic Concepts in RF De: The following sections should be covere ations, Effects of Nonlinearity (the section on AM/PM Conversion can be skipped), Noise, and Sen- sitivity and Dynamic Range. (The sections on Passive Impedance Transformation, Scattering Parameters, and Analysis of Nonlinear Dynamic Systems can be skipped.) ‘This chapter takes about six hours of lecture. Chapter 3: Communication Concepts This chapter can be covered minimally in a quarter system—for example, Analog Modulation, Quadrature Modulation, GMSK Modulation, Multiple Access ‘Tech- niques, and the IEEE802.11a/b/g Standard. In a semester system, the concept of signal constellations can be introduced and a few more modulation schemes and wireless standards can be taught. This chapter takes about two hours in a quarter system and three hours in a semester system. Chapter 4: Transceiver Architectures This chapter is relatively long and should be taught selectively. The following sections should be covered: General Considerations, Basic and Modern Hetero- dyne Receivers, Direct-Conversion Receivers, Image-Reject Receivers, and Direct- Conversion Transmitters. In a semester system, Low-IF Receivers and Heterodyne ‘Transmitters can be covered as well. This chapter takes about eight hours in a quarter system and ten hours in a semester system, Chapter 5: Low-Noise Amplifiers ‘The following sections should be covered: General Considerations, Problem of Input Matching, and LNA Topologies. A semester system can also include Gain Switching and Band Switching or High-IP2 LNAS. This chapter takes about six hours in a quarter system and eight hours in a semester system. Chapter 6: Mixers The following sections should be covered: General Considerations, Passive Downconversion Mixers (the computation of noise and input impedance of voltage- driven sampling mixers can be skipped), Active Downconversion Mixers, and Active Mixers with High IP. In a semester system, Active Mixers with Enhanced Transconductance, Active Mixers with Low Flicker Noise, and Upconversion Mixers can also be covered. This chapter takes about eight hours in a quarter system and ten hours in a semester system. Chapter 7: Passive Devices ‘This chapter may not fit in a quarter system. In a semester system, about three hours can be spent on basic inductor structures and loss mechanisms and MOS. varactors, Chapter 8: Oscillators This is along chapter and should be taught selectively. The following sections should be covered: Basic Principles, Cross-Coupled Oscillator, Voltage-ControlledPreface to the Second Edition xvii Oscillators, Low-Noise VCOs. In a quarter system, there is little time to cover phase noise. In a semester system, both approaches to phase noise analysis can be taught. ‘This chapter takes about six hours in a quarter system and eight hours in a semester system. Chapter 9: Phase-Locked Loops This chapter forms the foundation for synthesizers. In fact, if taught carefully, this chapter naturally teaches integer-N synthesizers, allowing a quarter system to skip the next chapter. The following sections should be covered: Basic Concepts, Type-I PLLs, ‘Type-II PLLs, and PED/CP Nonidealities. A semester system can also include Phase Noise in PLLs and Design Procedure. This chapter takes about four hours in a quarter system and six hours in a semester system. Chapter 10: Integer-N Synthesizers This chapter is likely sacrificed in a quarter system, A semester system can spend about four hours on Spur Reduction Techniques and Divider Design. Chapter 11: Fractional-N Synthesizers This chapter is likely sacrificed in a quarter system. A semester system can spend about four hours on Randomization and Noise Shaping. The remaining sections may be skipped. Chapter 12: Power Amplifiers This is along chapter and, unfortunately, is often sacrificed for other chapters. If coverage is desired, the following sections may be taught: General Considera- tions, Classification of Power Amplifiers, High-Efficiency Power Amplifiers, Cascode Output Stages, and Basic Linearization Techniques. These topics take about four hours of lecture. Another four hours can be spent on Doherty Power Amplifier, Polar Modulation, and Outphasing. Chapter 13: Transceiver Design Example This chapter provides a step-by-step design of a dual-band transceiver. It is pos ble to skip the state-of-the-art examples in Chapters 5, 6, and 8 to allow some time for this chapter. The system-level derivations may still need to be skipped. The RX, TX, and synthesizer transistor-level designs can be covered in about four hours. A solutions manual is available for instructors via the Pearson Higher Education Instruc- tor Resource Center web site: pearsonhighered.com/irc; and a set of Powerpoint slides is available for instructors at informit.com/razavi. Additional problems will be posted on the book's website (informit.com/razavi). —Behead Razavi July 2011This page intentionally left blankPREFACE TO THE FIRST EDITION ‘The annual worldwide sales of cellular phones has exceeded $2.5B. With 4.5 million cus- tomers, home satellite networks comprise a $2.5B industry. The global positioning system is expected to become a $5B market by the year 2000. In Europe, the sales of equip- ment and services for mobile communications will reach $30B by 1998. The statistics are overwhelming. The radio frequency (RF) and wireless market has suddenly expanded to unimaginable dimensions. Devices such as pagers, cellular and cordless phones, cable modems, and RF identification tags are rapidly penetrating all aspects of our lives, evolving from luxury items to indispensable tools. Semiconductor and system companies, small and large, analog and digital, have seen the statistics and are striving to capture their own market share by introducing various RF products. RF design is unique in that it draws upon many disciplines unrelated to integrated circuits (ICs). The RF knowledge base has grown for almost a century, creating a seemingly endless body of literature for the novice. This book deals with the analysis and design of RF integrated circuits and systems. Providing a systematic treatment of RF electronics in a tutorial language, the book begins with the necessary background knowledge from microwave and communication theory and leads the reader to the design of RF transceivers and circuits. The text emphasizes both architecture and circuit level issues with respect to monolithic implementation in VLSI technologies. The primary focus is on bipolar and CMOS design, but most of the con- cepis can be applied to other technologies as well. The reader is assumed to have a basic understanding of analog IC design and the theory of signals and systems. The book consists of nine chapters. Chapter I gives a general introduction, posing ques- tions and providing motivation for subsequent chapters. Chapter 2 describes basic concepts in RF and microwave design, emphasizing the effects of nonlinearity and noise Chapters 3 and 4 take the reader to the communication system level, giving an overview of modulation, detection, multiple access techniques, and wireless standards. While ini tially appearing to be unnecessary, this material is in fact essential to the concurrent design of RF circuits and systems. xixxX Preface to the First Edition Chapter 5 deals with transceiver architectures, presenting various receiver and tans- miter topologies along with their merits and drawbacks. This chapter also includes a number of case studies that exemplify the approaches taken in actual RF products. Chapters 6 through 9 address the design of RF building blocks: low-noise amplifiers and mixers, oscillators, frequency synthesizers, and power amplifiers, with particular atten- tion to minimizing the number of off-chip components. An important goal of these chapters is to demonstrate how the system requirements define the parameters of the circuits and how the performance of each circuit impacts that of the overall transceiver. Thave taught approximately 80% of the material in this book in a 4-unit graduate course at UCLA. Chapters 3, 4, 8, and 9 had to be shortened in a ten-week quarter, but in a semester system they can be covered more thoroughly. Much of my RF design knowledge comes from interactions with colleagues. Helen Kim, Ting-Ping Liu, and Dan Avidor of Bell Laboratories, and David Su and Andrew Gzegorek of Hewlett-Packard Laboratories have contributed to the material in this book in many ways. The text was also reviewed by a number of experts: Stefan Heinen (Siemens), Bart Jansen (Hewlett-Packard), Ting-Ping Liu (Bell Labs), John Long (University of Toronto), Tadao Nakagawa (NTT), Gitty Nasserbakht (Texas Instruments), Ted Rappaport (Virginia Tech), Tirdad Sowlati (Gennum), Trudy Stetzler (Bell Labs), David Su (Hewlett- Packard), and Rick Wesel (UCLA). In addition, a number of UCLA students, including Farbod Behbahani, Hooman Darabi, John Leete, and Jacob Rael, “test drove” various chapters and provided uscful feedback. I am indebted to all of the above for their kind assistance. I would also like to thank the staff at Prentice Hall, particularly Russ Hall, Maureen Diana, and Kerry Riordan for their support. —Behzad Razavi July 1997ACKNOWLEDGMENTS T have been fortunate to benefit from the support of numerous people during the writing, review, and production phases of this book. I would like to express my thanks here. Even afier several rounds of self-editing, it is possible that typos or subtle mistakes have eluded the author. Sometimes, an explanation that is clear to the author may not be so to the reader. And, occasionally, the author may have missed a point or a recent devel- opment. A detailed review of the book by others thus becomes necessary. The following individuals meticulously reviewed various chapiers, di valuable suggestions: Ali Afsahi (Broadcom) Pietro Andreani (Lund University) Ashkan Borna (UC Berkeley) Jonathan Borremans (IMEC) Debopriyo Chowdhury (UC Berkeley) Matteo Conta (Consultant) Ali Homayoun (UCLA) Velntina del Lattorre (Consultant) Jane Gu (University of Florida) Peng Han (Beken) Pavan Hanumolu (Oregon State University) Daquan Huang (Texas Instruments) Sy-Chyuan Hwu (UCLA) Amin Jahanian (UCD) Jithin Janardhan (UCLA) Shinwon Kang (UC Berkeley) Iman Khajen (Sharif University of Technology) Yanghyo Kim (UCLA) covered my mistakes, and made Abbas Komijani (Atheros) ‘Tai-Cheng Lee (National Taiwan University) Antonio Liscidini (University of Pavia) Shen-luan Liu (National Taiwan University) Xiaodong Liu (Lund University) Jian Hua Lu (UCLA) Howard Luong (Hong Kong University of Science and Technology) Elvis Mak (University of Macau) Rabih Makarem (Atheros) Rui Martins (University of Macau) Andrea Mazzai University of Pavia) Karthik Natarajan (University of Washington) Nitin Nidhi (UCLA) Joung Park (UCLA) Paul Park (Atheros) Stefano Pellerano (Intel) Jafar Savoj (Xilinx)xxii Acknowledgments Parmoon Seddighrad Vidojkovic Vojkan (IMEC) (University of Washington) Ning Wang (UCLA) Alireza Shirvani (Ralink) Weifeng Wang (Beken) Tirdad Sowlati (Qualcomm) Zhi Gong Wang (Southeast University) Francesco Svelto (University of Pavia) Marco Zanuso (UCLA) Enrico Temporiti (ST Microelectronics) Yunfeng Zhao (Beken) Federico Vecchi (University of Pavia) Alireza Zolfaghari (Broadcom) yy Viswam (Lund University) 1 am thankful for their enthusiastic, organized, and to-the-point reviews. The book’s production was proficiently managed by the staff at Prentice Hall, including Berard Goodwin and Julie Nahil, I would like to thank both. As with my other books, my wife, Angelina, typed the entire second edition in Latex and selflessly helped me in this three-and-a-half-year endeavor. I am grateful to her. —Behzad RazaviABOUT THE AUTHOR Behzad Razavi received the BSEE degree from Sharif University of Technology in 1985 and MSEE and PhDEE degrees from Stanford University in 1988 and 1992, respectively. He was with AT&T Bell Laboratories and Hewlett-Packard Laboratories until 1996. Since 1996, he has been associate professor and, subsequently, professor of electrical engi- neering at University of California, Los Angeles. His current research includes wireless transceivers, frequency synthesizers, phase-locking and clock recovery for high-speed data communications, and data converters. Professor Razavi was an adjunct professor at Princeton University from 1992 to 1994, and at Stanford University in 1995. He served on the Technical Program Committees of the International Solid-State Circuits Conference (ISSCC) from 1993 to 2002 and VLSI Cir- cuits Symposium from 1998 to 2002, He has also served as guest editor and associate editor of the JEEE Journal of Solid-State Circuits, IEEE Transactions on Circuits and and International Journal of High Speed Electronics. Professor Razavi received the Beatrice Winner Award for Editorial Excellence at the 1994 ISSCC; the best paper award at the 1994 European Solid-State Circuits Conference; the best panel award at the 1995 and 1997 ISSCC; the TRW Innovative Teaching Award in 1997; the best paper award at the IEEE Custom Integrated Circuits Conference (CICC) in 1998; and McGraw-Hill First Edition of the Year Award in 2001. He was the co-recipient of both the Jack Kilby Outstanding Student Paper Award and the Beatrice Winner Award for Editorial Excellence at the 2001 ISSCC. He received the Lockheed Martin Excellence in Teaching Award in 2006; the UCLA Faculty Senate Teaching Award in 2007; and the CICC Best Invited Paper Award in 2009. He was also recognized as one of the top ten authors in the fifty-year history of ISSCC. He received the IEEE Donald Pederson Award in Solid-State Cireuits in 2012. Professor Razavi is an IEEE Distinguished Lecturer, a Fellow of IEEE, and the author of Principles of Data Conversion System Design, RF Microelectronics, First Edi- tion (translated to Chinese, Japanese, and Korean), Design of Analog CMOS Integrated Circuits (translated to Chinese, Japanese, and Korean), Design of Integrated Circuits for xxiiixxiv About the Author Optical Communications, and Fundamentals of Microelectronics (translated to Korean and Portuguese), and the editor of Monolithic Phase-Locked Loops and Clock Recovery Circuits and Phase-Locking in High-Performance Systems.CHAPTER INTRODUCTION TO RF AND WIRELESS TECHNOLOGY Compare two RF transceivers designed for cell phones: “A2.7-V GSM RF Transceiver IC” [1] (published in 1997) “A Single-Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW- Less CMOS Receiver with DigRF 3G Interface and +90-dBm IIP2” [2] (published in 2009) Why is the latter much more complex than the former? Does the latter have a higher perfor- mance or only greater functionality? Which one costs more? Which one consumes a higher power? What do all the acronyms GSM, WCDMA, HSDPA, EDGE, SAW, and IP mean? Why do we care? The field of RF communication has grown rapidly over the past two decades, reaching far into our lives and livelihood. Our cell phones serve as an encyclopedia, a shopping terminus, a GPS guide, a weather monitor, and a telephone—all thanks to their wireless communication devices. We can now measure a patient’s brain or heart activity and transmit the results wirelessly, allowing the patient to move around untethered. We use RF devices to wack merchandise, pets, cattle, children, and convicts. 1.1 A WIRELESS WORLD Wireless communication has become almost as ubiquitous as electricity; our refrigera- tors and ovens may not have a wireless device at this time, but it is envisioned that our homes will eventually incorporate a wireless network that controls every device and appli- ance. High-speed wireless links will allow seamless connections among our laptops, digital cameras, camcorders, cell phones, printers, TVs, microwave ovens, ete. Today’s WiFi and Bluetooth connections are simple examples of such links. How did wireless communication take over the world? A confluence of factors has contributed to this explosive growth, The principal reason for the popularity of wireless2 Chap. 1. Introduction to RF and Wireless Technology communication is the ever-decreasing cost of electronics. Today’s cell phones cost about the same as those a decade ago but they offer many more functions and features: many frequency bands and communication modes, Bluetooth, GPS, computing, storage, a digital camera, and a user-friendly interface. This affordability finds its roots in inte- gration, i.e., how much functionality can be placed on a single chip—or, rather, how few components are left off-chip. The integration, in turn, owes its steady rise to (1) the scaling of VLSI processes, particularly, CMOS technology, and (2) innovations in RF architectures, circuits, and devices. Along with higher integration levels, the performance of RF circuits has also improved. For example, the power consumption necessary for a given function has decreased and the speed of RF circuits has increased. Figure 1.1 illustrates some of the trends in RF integrated circuits (ICs) and technology for the past two decades. The minimum feature size of CMOS 1000 Oscillation Frequency and f; (GHz) Number of RF and Wireless Papers at ISSCC Figure 1.1 Trends in RF circuits and technology.Sec. 1.2. RF Design Is Challenging 3 technology has fallen from 0.5 jm to 40 nm, the transit frequency,’ fr, of NMOS devices has risen from about 12 GHz to several hundred gigahertz, and the speed of RF oscillators has gone from 1.2 GHz to 300 GHz. Also shown is the number of RF and wireless design papers presented at the International Solid-State Circuits Conference (ISSCC) each year, revealing the fast-growing activity in this field. 1.2 RF DESIGN IS CHALLENGING Despite many decades of work on RF and microwave theory and two decades of research on RF ICs, the design and implementation of RF circuits and transceivers remain chal- lenging. This is for three reasons. First, as shown in Fig. 1.2, RF design draws upon a multitude of disciplines, requiring a good understanding of fields that are seemingly irrel- evant to integrated circuits. Most of these fields have been under study for more than half a century, presenting a massive body of knowledge to a person entering RF IC design. One objective of this book is to provide the necessary background from these disciplines without overwhelming the reader. Second, RF circuits and transceivers must deal with numerous trade-offs, summarized in the “RF design hexagon” of Fig. 1.3. For example, to lower the noise of a front-end amplifier, we must consume a greater power or sacrifice linearity. We will encounter these trade-offs throughout this book. ‘Third, the demand for higher performance, lower cost, and greater functionality con- tinues to present new challenges. The early RF IC design work in the 1990s strove to integrate one transceiver—perhaps along with the digital baseband processor—on a single chip. Today’s efforts, on the other hand, aim to accommodate multiple transceivers oper- ating in different frequency bands for different wireless standards (e.g., Bluetooth, WiFi, GPS, ete.). The two papers mentioned at the beginning of this chapter exemplify this trend. It is interesting to note that the silicon chip area of early single-transceiver systems was Communication Microwave Theory Random Theory NK, | 4 ‘Signals Signal RF Desi Transceiver Propagation "= Architectures Multiple a SN Ic Desi ‘Access / \ sign Wireless cAD Standards Tools Figure 1.2 Various disciplines necessary in RF design. 1. The transit frequency is defined as the frequency at which the small-signal current gain of a device falls to unity.4 Chap. 1. Introduction to RF and Wireless Technology Noise > Power fooN Linearity Frequency ‘Supply Voltage 92 Figure 1.3 RF design hexagon. dominated by the digital baseband processor, allowing RF and analog designers some lat- itude in the choice of their circuit and device topologies. In today’s designs, however, the multiple transceivers tend to occupy a larger area than the baseband processor, requiring that RF and analog sections be designed with much care about their area consumption. For example, while on-chip spiral inductors (which have a large footprint) were ized in abundance in older systems, they are now used only sparingly. 1.3. THE BIG PICTURE ‘The objective of an RF transceiver is to transmit and receive information. We envision that the transmitter (TX) somehow processes the voice or data signal and applies the result to the antenna [Fig. 1.4(a)]. Similarly, the receiver (RX) senses the signal picked up by the antenna and processes it so as to reconstruct the original voice or data information, Each black box in Fig. 1.4(a) contains a great many functions, but we can readily make two observations: (1) the TX must drive the antenna with a high power level so that the transmitted signal is strong enough to reach far distances, and (2) the RX may sense a small signal (e.g., when a cell phone is used in the basement of a building) and must first amplify the signal with low noise, We now architect our transceiver as shown in Fig. 14(b), where the signal to be transmitted is first applied to a “modulator” or “upconverter” so that its center frequency goes from zero to, say, fe = 2.4 GHz. The result drives the antenna through a “power amplifier” (PA). On the receiver side, the signal is sensed by a “low- noise amplifier” (LNA) and subsequently by a “downconverter” or “demodulator” (also known as a “detector”). ‘The upconversion and downconversion paths in Fig. 1.4(b) are driven by an oscillator, which itself is controlled by a “frequency synthesizer.” Figure 1.4(c) shows the overall transceiver? The system looks deceptively simple, but we will need the next 900 pages to cover its RF sections. And perhaps another 900 pages to cover the analog-to-digital and digital-to-analog converters. 2. In some cases, the modulator and the upconverter are one and the same. In some other cases, the modula- tion is perfommed in the digital domain before upeonversion. Most receivers demodulate and detect the signal digizally, requiring only a downconverter in the analog domain,References 5 Transmitter (TX) Receiver (RX) voce oY) a eee Data oF] ? 2 |= Voice or Data @ Power r Voice or Amplifier 7 Data ee | Upconverter or Modulator, 4 oF ef Low-Noise Amplifier Reconstructed hb Downconverter or Voice or Data Demodulator fe f of © LNA Downconverter or Analog-to-Digital Demodulator ‘Converter Digital Baseband Processor PA < <_| Upconverter or | Digital-to-Analog Modulator Converter © Figure 1.4 (a) Simple view of RF communication, (b) more complete view, (c) generic RF iransceiver. REFERENCES [1] T. Yamawaki et al., “A 2.7-V GSM RF Transceiver IC," IEEE J. Solid-State Circuits, vol. 32, pp. 2089-2096, Dec. 1997. [2] D. Kaczman et al., “A Single-Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW- less CMOS Receiver with DigRF 3G Interface and +90-dBm IIP2,” IEEE J. Solid-State Cireuits, vol. 44, pp. 718-739, March 2000 [3] M. Banu, “MOS Oscillators with Multi-Decade Tuning Range and Gigahertz } Speed,” IEEE J. Solid-State Circuits, vol. 23, pp. 474-419, April 1988. [4] B. Razavi et al, “A 3-GHz 25-mW CMOS Phase-Locked Loop,” Dig. of Symposium on VST Circuits, pp. 131-132, June 1994. Jaximum,(5) 6) fl [81 ic) uo) Chap. 1. Introduction to RF and Wireless Technology M, Soyuer et al, “A 3-V 4GHz nMOS Voltage-Controlled Oscillator with Integrated Resonator,” JEEE J. Solid-State Circuiis, vol. 31, pp. 2042-2045, Dec. 1996. B. Kleveland et al., “Monolithic CMOS Distributed Amplifier and Oscillator,” ISSCC Dig. Tech. Papers, pp. 70-11, Feb. 1999. H. Wang, “A 50-GHz VCO in 0.25-xm CMOS,” ISSCC Dig. Tech. Papers, pp. 372-373, Feb. 2001. L. Franca-Neto, R. Bishop, and B. Bloechel, “64 GHz and 100 GHz VCOs in 90 nm CMOS Using Optimum Pumping Method,” ISSCC Dig. Tech. Papers, pp. 444-445, Feb. 2004. E. Seok et al., “A 410GHz CMOS Push-Push Oscillator with an On-Chip Patch Antenna” ISSCC Dig. Tech. Papers, pp. 472-473, Feb. 2008, B. Razavi, “A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology,” Symposium on VISI Circuits Dig. Of Tech. Papers, pp. 113-114, June 2010.CHAPTER BASIC CONCEPTS IN RF DESIGN RF design draws upon many concepts from a variety of fields, including signals and systems, electromagnetics and microwave theory, and communications, Nonetheless, RF design has developed its own analytical methods and its own language. For example, while the nonlinear behavior of analog circuits may be characterized by “harmonic distortion,” that of RF circuits is quantified by very different measures, This chapter deals with general concepts that prove essential to the analysis and design of RF circuits, closing the gaps with respect to other fields such as analog design, microwave theory, and communication systems. The outline is shown below. Nonlinearity Noise pedance Transformation ® Harmonic Distortion = Noise Spectrum — « Series-Parallel Conversion ® Compression ® Device Noise" Matching Networks ® Intermodulation ® Noise in Circuits» S-Parameters ® Dynamic Nonlinear Systems 2.1 GENERAL CONSIDERATIONS 2.1.1 Units in RF Design RF design has traditionally employed certain units to express gains and signal levels. It is helpful to review these units at the outset so that we can comfortably use them in our subsequent studies. ‘The voltage gain, Vou/Vin. and power gi |. Pour/ Pin, are expressed in decibels (dB): Vout Pout Pin” Avlan = 2010 1) Aplap = 10log 2.2)8 Chap. 2. Basic Concepts in RF Design ‘These two quantities are equal (in dB) only if the input and output voltages appear across equal impedances. For example, an amplifier having an input resistance of Ro (e.g.. 50 2) and driving a load resistance of Ro satisfies the following equation: Vous Aplag = 10 log te (2.3) Ry Vout = 20log You 20 log Vin (2.4) = Avlap. (2.5) where Vou and Vi, are rms values. In many RF systems, however, this relationship does not hold because the input and output impedances are not equal. ‘The absolute signal levels are often expressed in dBm rather than in watts or volts. Used for power quantities, the unit dBm refers to “dB's above 1 mW." To express the signal power, Psig. in dBm, we write Tm’ ‘An amplifier senses a sinusoidal signal and delivers a power of 0 dBm to a load resistance of 50 &. Determine the peak-to-peak voltage swing across the load. Psi Pune = 101g ( "#8. 26) Solution: Since 0 dBm is equivalent to I mW, fora sinusoidal having a peak-to-peak amplitude of Vpp and hence an rms value of Vip /(2/2), we write v2 De ae 7 imw, (2.7) where R, = 502. Thus, Vpp = 632 mV. (2.8) This is an extremely useful result, as demonstrated in the next example. Peer) A GSM receiver senses a narrowband (modulated) signal having a level of —100dBm, If the front-end amplifier provides a voltage gain of 15 dB, calculate the peak-to-peak voltage swing at the output of the amplifier.Sec. 2.1. General Considerations 9 enema Solution: Since the amplifier output voltage swing is of interest, we first convert the received signal level to voltage. From the previous example, we note that —100dBm is 100dB below 632mVpp. Also, 1004B for voltage quantities is equivalent to 10°. Thus, —100dBm equivalent to 6.32 ;.Vpp. This input level is amplified by 15 dB (~ 5.62), resulting in an ‘output swing of 35.5 /1Vpp, ‘The reader may wonder why the output voltage of the amplifier is of interest in the above example. This may occur if the circuit following the amplifier does not present a 50-2 input impedance, and hence the power gain and voltage gain are not equal in dB. In fact, the next stage may exhibit a purely capacitive input impedance, thereby requiring no signal “power.” This situation is more familiar in analog circuits wherein one stage drives the gate of the transistor in the next stage. As explained in Chapter 5, in most integrated RF systems, we prefer voltage quantities to power quantities so as to avoid confusion if the input and output impedances of cascade stages are unequal or contain negligible real parts. ‘The reader may also wonder why we were able to assume OdBm is equivalent to 632mVpp in the above example even though the signal is not a pure sinusoid. Afterall, only for a sinusoid can we assume that the rms value is equal to the peak-to-peak value divided by 2/2. Fortunately, for a narrowband 0-dBm signal, itis still possible to approximate the (average) peak-to-peak swing as 632 mV. Although dBm is a unit of power, we sometimes use it at interfaces that do not neces- sarily entail power transfer. For example, consider the case shown in Fig. 2.1(a), where the LNA drives a purely-capacitive load with a 632-mVpp swing, delivering no average power. We mentally attach an ideal voltage buffer to node X and drive a 50-Q load (Fig. 2.1(b)]. ‘We then say that the signal at node X has a level of 0 dBm, tacitly meaning that if this signal were applied to a 50-2 load, then it would deliver 1 mW. te Ss Uy, @) ) Figure 2.1 (a) LNA driving a capacitive impedance, (b) use of fictitious buffer to visualize the signal level in dBm. 2.1.2 Time Variance A system is linear if its output can be expressed as a linear combination (superposition) of responses to individual inputs. More spec the outputs in response t