The document summarizes the MIPS instruction set architecture. It lists 7 different instruction types - Add, Jump, Sub, Set less than, Add immediate, SLT Immediate, and Branch EQ/NEQ. It provides the mnemonic, operation, opcode, function, and register manipulation for each instruction type. It also lists the LOAD WORD, STORE WORD, LOAD WORD immediate, and MOVE instructions along with their inputs, outputs, and functionality.
The document summarizes the MIPS instruction set architecture. It lists 7 different instruction types - Add, Jump, Sub, Set less than, Add immediate, SLT Immediate, and Branch EQ/NEQ. It provides the mnemonic, operation, opcode, function, and register manipulation for each instruction type. It also lists the LOAD WORD, STORE WORD, LOAD WORD immediate, and MOVE instructions along with their inputs, outputs, and functionality.
The document summarizes the MIPS instruction set architecture. It lists 7 different instruction types - Add, Jump, Sub, Set less than, Add immediate, SLT Immediate, and Branch EQ/NEQ. It provides the mnemonic, operation, opcode, function, and register manipulation for each instruction type. It also lists the LOAD WORD, STORE WORD, LOAD WORD immediate, and MOVE instructions along with their inputs, outputs, and functionality.
The document summarizes the MIPS instruction set architecture. It lists 7 different instruction types - Add, Jump, Sub, Set less than, Add immediate, SLT Immediate, and Branch EQ/NEQ. It provides the mnemonic, operation, opcode, function, and register manipulation for each instruction type. It also lists the LOAD WORD, STORE WORD, LOAD WORD immediate, and MOVE instructions along with their inputs, outputs, and functionality.
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"MIPS" Instruction Set
INPUTS OUTPUTS Name Type Mnemonic Usage Opearation Zero Opcode Func Write enable Mode Opearation rt or imm rd or rt Alu or dm R ~W Add R add rd,rs,rt R[rd]=R[rs] + R[rt] X 4 0 1 0 0 0 0 0 1 Jump J j addr PC= addr X 15 x 0 1 x X X X 1 Sub R sub rd,rs,rt R[rd]=R[rs] - R[rt] X 4 1 1 0 1 0 0 0 1 Set less than R slt rd,rs,rt R[rd]=(R[rs] < R[rt]) 1:0 X 4 2 1 0 2 0 0 0 1 Add imm I addi rt,rs,imm R[rt]=R[rs] + imm X 5 X 1 0 0 1 1 0 1 SLT Imm I Slti rt,rs,imm R[rt]=(R[rs] < imm) 1:0 X 6 X 1 0 2 1 1 0 1
Branch EQ I beq rt,rs,imm if (R[rt]=R[rs]) PC+Simm+1 1 8 X 0 2 1 0 X X 1
// // rt,rs,imm // 0 8 X 0 0 1 0 X X 1 BRanch NEQ I bne // If (R[rt]!=R[rs]) PC= PC+Simm+1 0 9 X 0 2 1 0 X X 1 // // rt,rs,imm // 1 9 X 0 0 1 0 X X 1 LOAD WORD I lw rt,rs,imm R[rt]= DM[R[rs]+ imm] X 0 X 1 0 0 1 1 1 1 STORE WORD I sw rt,rs,imm DM[R[rs]+imm] = R[rt] X 1 X 0 0 0 1 X X 0 LOAD WORD imm I lwi rt,0,imm R[rt]= imm X 14 X 1 0 3 1 1 0 1 MOVE R mov rd,0,rt R[rd]=R[rs] X 4 3 1 0 3 0 0 0 1
