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Exp 10

This document provides instructions for an experiment to design and test half adder and full adder circuits using logic gates. The objectives are to realize the circuits using XOR and basic gates and verify their truth tables. The required ICs are listed. The procedure involves constructing the circuits according to diagrams, applying various input combinations, and noting the output sums and carries. Truth tables for half adders and full adders are provided. Tasks include implementing the circuits using NAND logic, designing a 4-bit binary adder, and implementing a BCD adder using a 4-bit full adder IC. The report will include circuit diagrams, measured vs actual truth tables, Boolean equations, and a discussion.

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Piyas Chowdhury
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370 views2 pages

Exp 10

This document provides instructions for an experiment to design and test half adder and full adder circuits using logic gates. The objectives are to realize the circuits using XOR and basic gates and verify their truth tables. The required ICs are listed. The procedure involves constructing the circuits according to diagrams, applying various input combinations, and noting the output sums and carries. Truth tables for half adders and full adders are provided. Tasks include implementing the circuits using NAND logic, designing a 4-bit binary adder, and implementing a BCD adder using a 4-bit full adder IC. The report will include circuit diagrams, measured vs actual truth tables, Boolean equations, and a discussion.

Uploaded by

Piyas Chowdhury
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Dept.

of EEE, CUET
EEE 366 - Digital Electronics Sessional

Experiment No.: 06
Experiment Name: Design and construction of half adder and full adder
circuits
OBJECTIVE:
To realize half and full adder using X-OR and basic gates and verify its truth table.

REQUIRED ICs:
1. AND gate (7408)
2. OR gate (7432)
3. X-OR gate (7486)
4. 4-bit full-adder (7483)

EXPERIMENTAL PROCEDURE:
For all ICs in this experiment; Vcc = +5 V to pin 14, 0 (ground) to pin 7.
1. Make the connections as per the circuit diagram.
2. Switch on VCC and apply various combinations of input according to truth table.
3. Note down the output readings for half/full adder sum and the carry bit for different
combinations of inputs.

Half-Adder:

Truth table for Half-Adder


Input Output
X Y S C
0 0
0 1
1 0
1 1

Prepared by Muhammad Asad Rahman Page 1 of 2


Supervised by Dr. Quazi Delwar Hossain
Dept. of EEE, CUET
EEE 366 - Digital Electronics Sessional

Full-Adder:

Truth table for Full-Adder


Input Output
X Y Z S C
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

TASK:
1. Implement the NAND logic diagram of Half-adder and Full-adder.
2. Design and Implement 4-bit binary adder.
3. Implement the BCD adder using 7483.

REPORT:
1. For each part experimented above, draw the circuit diagram and show the measured
truth table of your circuit. Compare your measured truth table with actual one.
2. Write the Boolean logic equation for each circuit output.
3. Complete all the tasks given in the sheet.
4. Discussion.

Prepared by Muhammad Asad Rahman Page 2 of 2


Supervised by Dr. Quazi Delwar Hossain

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