Low Power Displayport™ To Lvds Converter: With Single Channel 18-Bpp Output
Low Power Displayport™ To Lvds Converter: With Single Channel 18-Bpp Output
Low Power Displayport™ To Lvds Converter: With Single Channel 18-Bpp Output
ANX3111
Features
All software compatible with AMD platform - Spread Spectrum Clock (SSC) support for
driver/BIOS stacks improved EMI performance
- Designed and fully tested with extensive eDP content protection with Chip ID, OUI
APU-based platform test requirements support
- No additional firmware and EEPROM to Programmable LVDS swing, pre-emphasis,
manage LCD dimming and video timing channel swap, and polarity inversion
control
Programmable LVDS Output Spread Spectrum
Two package options available to support for Clocking Generation (SSCG) with amplitude +/-
new and running-change platforms (36 & 64- 1.75% for EMI reduction
QFN)
Optional on-chip microcontroller with 512-Byte
Backward drop-in compatible with ANX3110 program space
Super low power single channel 18-bit per pixel Recommend 3.3VIO and 1.2VCORE power supply
LVDS output for APU platform
- Single Channel: Up to 120 MHz pixel clock
Optionally support 2.5VIO/1.2VCORE application
- 50% power reduction: <100mW@65MHz
system
- Up to WSXGA+ 1680 x 1650 @ 60Hz, 18-
bpp Package
- 64-pin QFN (9x9)
Smart panel dimming control state machine - RoHS compliant and Halogen free
compatible with Travis-based family products
Programmable directly through AUX or local ANX3111 has same 64 QFN package, drop-in-
I2C slave port compatible with dual-LVDS ANX3110 product in
Compliant with VESA DisplayPort™ 1.1a AMD APU-based platform with Analogix’s low
- 1-lane with 1.62 / 2.7Gbps data rate power DisplayPort™ receiver offering 18 bit-per-
pixel and single channel LVDS output. It provides a
support
high quality interface solution between AMD’s
- AUX channel link up to 1Mbps bandwidth APU processor and LVDS panels. Please refer to
- DPCD registers accessible by the AUX the part ordering and related products
channel and I2C Slave Interface information.
Mainlink
DisplayPort™
Video
Receiver Data
processing & LVDS Tx LVDS Output
Lane 0 Decoder
formatting
AUX CH Aux
CPU_VARY_BL
VARY_BL
DVDD12
AVDD33
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
33
34
35
48
47
46
45
44
43
41
40
39
38
37
36
42
DDC_CLK 49 32 NC
CFG_SDA 52 29 NC
DVDD33 53 28 NC
NC 54 27 LVDS_CLKL_P
NC 55 26 LVDS_CLKL_N
NC 56 25 AVDD33
NC 57 24 LVDS_L2_P
DPRX_HPD 58 23 LVDS_L2_N
64-Pin QFN
DVDD12 59 22 LVDS_L1_P
DPRX_AUX_N 60 21 LVDS_L1_N
DPRX_AUX_P 61 20 LVDS_L0_P
AVSS 62 19 LVDS_L0_N
AVDD33 63 18 NC
R_BIAS 64 17 NC
15
16
12
13
14
10
11
1
2
3
4
5
6
9
DPRX_LN0_N
RESET_L
AVDD12
DVDD12
DVDD33
AVSS
DPRX_LN0_P
TEST_EN
NC
NC
AVSS
NC
DIGON
NC
BL_EN
NC
http://www.analogix.com
Features
All software compatible with AMD platform - Spread Spectrum Clock (SSC) support for
driver/BIOS stacks improved EMI performance
- Designed and fully tested with extensive eDP content protection with Chip ID, OUI
APU-based platform test requirements support
- No additional firmware and EEPROM to Programmable LVDS swing, pre-emphasis,
manage LCD dimming and video timing channel swap, and polarity inversion
control
Programmable LVDS Output Spread Spectrum
Two package options available to support for Clocking Generation (SSCG) with amplitude +/-
new and running-change platforms (36 & 64- 1.75% for EMI reduction
QFN)
Optional on-chip microcontroller with 512-Byte
Super low power single channel 18-bit per pixel program space
LVDS output
Recommend 3.3VIO and 1.2VCORE power supply
- Single channel: Up to 120 MHz pixel clock
for APU platform
- 50% power reduction: <100mW@65MHz
- Up to WSXGA+ 1680 x 1650 @ 60Hz, 18- Optionally support 2.5VIO/1.2VCORE application
bpp system
Smart panel dimming control state machine Package
compatible with Travis-based family products - 36-pin QFN (6x6)
- RoHS compliant and Halogen free
Programmable directly through AUX or local
I2C slave port
ANX3112 has small 36 QFN package for AMD APU-
Compliant with VESA DisplayPort™ 1.1a based PC platform with Analogix’s low power
- 1-lane with 1.62 / 2.7Gbps data rate DisplayPort™ receiver offering 18 bit-per-pixel
support single channel LVDS output. It provides a high
- AUX channel link up to 1Mbps bandwidth quality interface solution between AMD’s APU
- DPCD registers accessible by the AUX processor and LVDS panels. Please refer to the
part ordering and related products information.
channel and I2C Slave Interface
Mainlink
DisplayPort™
Video
Receiver Data
processing & LVDS Tx LVDS Output
Lane 0 Decoder
formatting
AUX CH Aux
CPU_VARY_BL
PROG_SDA
PROG_SCL
VARY_BL
DVDD12
DVDD25
AVDD25
BL_EN
AVSS
27
26
25
24
23
22
20
19
21
DDC_CLK 28 18 LVDS_CLKL_P
DDC_DATA 29 17 LVDS_CLKL_N
CFG_SCL 30 16 AVDD25
CFG_SDA 31 15 LVDS_L2_P
DPRX_HPD 32 14 LVDS_L2_N
DPRX_AUX_N 33 13 LVDS_L1_P
DPRX_AUX_P 34 36-Pin QFN 12
LVDS_L1_N
AVDD25 35 11 LVDS_L0_P
R_BIAS 36 10 LVDS_L0_N
1
2
3
4
5
6
9
DPRX_LN0_N
RESET_L
AVDD12
DVDD12
DVDD25
DPRX_LN0_P
TEST_EN
AVDD25
DIGON
THE INFORMATION CONTAINED IN THIS DOCUMENT IS PROVIDED “AS IS” WITHOUT ANY EXPRESS REPRESENTATIONS OF WARRANTIES. IN
ADDITION, ANALOGIX SEMICONDUCTOR INC. DISCLAIMS ALL IMPLIED REPRESENTATIONS AND WARRANTIES, INCLUDING ANY WARRANTY
OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTURAL PROPERTY
RIGHTS. SPECIFICATION IS SUBJECT TO CHANGE WITHOUT NOTICE.
This document contains proprietary information of Analogix Semiconductor, Inc. or under license from third parties. No part of this
document may be reproduced in any form or by any means or transferred to any third party without the prior written consent of Analogix
Semiconductor, Inc. The information contained in this document is not designed or intended for use in on-line control of aircraft, aircraft
navigation or aircraft communications; or in the design, construction, operation or maintenance of any nuclear facility. Analogix disclaims
any express or implied warranty of fitness for such uses.
Analogix Semiconductor, Inc., the Analogix Logo, and WideEye™ SerDes, SlimPort™and CoolHD™ are trademarks of Analogix Semiconductor,
Inc., in the United States and other countries. HDMI, the HDMI logo and High-Definition Multimedia Interface are trademarks or registered
trademarks of HDMI Licensing LLC. DisplayPort™ and the DisplayPort™ logo are trademarks or registered trademarks of the Video
Electronics Standards Association, VESA®. All other trademarks and registered trademarks are the property of their respective owners.