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MPLAB C18 Libraries 51297f

The document discusses the ports of the PIC18F4455 microcontroller. It describes Ports A-E, which can be configured as digital I/O or are multiplexed with peripherals like ADC, timers, USB. The direction and functionality of each pin is controlled by port registers like TRISx, LATx and peripheral registers. To use pins for digital I/O, associated peripherals must be disabled.
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0% found this document useful (0 votes)
59 views28 pages

MPLAB C18 Libraries 51297f

The document discusses the ports of the PIC18F4455 microcontroller. It describes Ports A-E, which can be configured as digital I/O or are multiplexed with peripherals like ADC, timers, USB. The direction and functionality of each pin is controlled by port registers like TRISx, LATx and peripheral registers. To use pins for digital I/O, associated peripherals must be disabled.
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Microcontrollers

Ports of PIC 18F4455


Contents
• Available ports
• Port A
• Port B
• Port C
• Port D
• Port E

Dr. David Antonio Torres 2


Available Ports
• The number of ports that are available for the
programmer depends on the configuration of the PIC

Dr. David Antonio Torres 3


Port Registers
• The communication of each port is handled by a set of
three registers:
• LATx is an output data latch
• TRISx is the register that configures the direction of the port
• PORTx is the register that holds the I/O data
• LATx is used to speed up write and read operations
(read-modify-write)

Dr. David Antonio Torres 4


Multiplexed Ports
• All the ports of PIC18F4455 have I/O data operations
multiplexed with peripheral control
• If a peripheral is enabled the configuration of the related
ports is going to be modified according to the
configuration of the peripheral
• TRISx registers are sometimes overwritten
• If a port is required to work in an I/O operation, the
peripherals involved with the port must be disabled

Dr. David Antonio Torres 5


Ports A
• It is an I/O port multiplexed with the following
peripherals
• ADC
• Comparator
• TIMER 0

Initialization as an I/O port


Dr. David Antonio Torres 6
Port A for ADC
• ADCON1 register configures some ports as analog
inputs for the ADC

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Port A for Comparator
• CMCON register configures the operation of the analog
comparators
• For some configurations PORT A is used as output of
the comparators

Dr. David Antonio Torres 8


Port A for TIMER 0
• T0CON register configures the operation of TIMER 0
• If TIMER 0 operates as an external event counter pin
RA4 is the input of the external events

Dr. David Antonio Torres 9


Registers Associated to Port A

Dr. David Antonio Torres 10


Port B
• It is an I/O port multiplexed with the following
peripherals
• ADC
• USB
• Parallel Port

Initialization as an I/O port

Dr. David Antonio Torres 11


Port B for ADC
• Register ADCON1 allows PORTB to be configured as
an I/O digital port

Dr. David Antonio Torres 12


Port B for SPP
• Pin RB4 performs as Chip Select of the SPP
• Register SPPCFG enables the operation of RB4

Dr. David Antonio Torres 13


Port B for USB
• RB2 and RB3 are used by the USB module to connect
an external transceiver
• By disabling the USB these pines operate as digital I/O

• On start and reset the USB module is disabled

Dr. David Antonio Torres 14


Registers Associated to Port B

Dr. David Antonio Torres 15


Port C
• It is an 7-pin port which does not implement pin RC3
• Except for pins RC4 and RC5, TRISC controls the
direction of the port
• Pins RC4 and RC5 operate either as digital input pins or
as supporting pins for the USB module when this is
enabled
• RC2 is also involved in the operation of theUSB
• To use RC2, RC4 and RC5 as traditional digital pins the
USB module must be disabled

Dr. David Antonio Torres 16


Port C for Communication Modules
• PORTC is also multiplexed with the MSSP and the
USART modules
• These are disabled on start and reset
• An example of initializing PORTC as digital I/O is shown
below

Dr. David Antonio Torres 17


Registers Associated to Port C

Dr. David Antonio Torres 18


Port D
• It is a bidirectional 8-pin port
• All the pins of PORTD have internal pull-up resistors to
implement open-collector circuits
• These resistors are enabled by setting bit 7 of PORTE
to one
• The internal resistors are automatically disabled when
the port is configured as an input or when a peripheral
makes use of the port

Dr. David Antonio Torres 19


Port D
• PORTD is multiplexed with the ECCP (enhanced CCP)
and the SPP modules
• PORTD can operate as digital I/O when both modules
are disabled, which is the case on start and reset
conditions
• An initialization of the port as digital I/O is shown below

Dr. David Antonio Torres 20


Port D for SPP
• SPP (streaming parallel port) is a high-speed parallel
port
• When enabled the whole PORTD is used as data
communication port of the SPP

Dr. David Antonio Torres 21


Registers Associated to Port D

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Port E
• It is a bidirectional 4-pin port
• RE0, RE1 and RE2 are digital I/O pins multiplexed with
the ADC, the comparators and the SPP
• RE3 is multiplexed with the master clear (MCLR) of the
PIC
• The operation of RE3 is defined during the
programming of the PIC (window of BK with the
programming setting of the PIC)

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Port E for ADC
• RE0, RE1 and RE2 operate as the analog input
channels AN5, AN6 and AN7 of the ADC
• Register ADCON1 configures PORTE as analog input
channels

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Port E for SPP
• Register SPPCON controls and enables the operation
of the SPP

Dr. David Antonio Torres 25


Port E for SPP
• Register SPPCFG configures the operation of the SPP

Dr. David Antonio Torres 26


Port E for Comparator
• Microchip recommends to switch the comparators off
when PORTE is to be used as digital I/O

Dr. David Antonio Torres 27


Registers Associated to Port E

Dr. David Antonio Torres 28

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