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Chameleon Chip: Model Polytechnic College Poonjar

This document appears to be a seminar report presented by Sanjay MS on the topic of the Chameleon Chip. It provides an introduction to the Chameleon Chip and discusses fields programmable gate arrays (FPGAs), reconfigurable computing, the architecture and components of the Chameleon Chip, technologies used in the chip like eConfigurable technology, technologies it can be compared to, advantages and disadvantages, applications, and concludes with a reference list.

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0% found this document useful (0 votes)
52 views4 pages

Chameleon Chip: Model Polytechnic College Poonjar

This document appears to be a seminar report presented by Sanjay MS on the topic of the Chameleon Chip. It provides an introduction to the Chameleon Chip and discusses fields programmable gate arrays (FPGAs), reconfigurable computing, the architecture and components of the Chameleon Chip, technologies used in the chip like eConfigurable technology, technologies it can be compared to, advantages and disadvantages, applications, and concludes with a reference list.

Uploaded by

Rejo george
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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MODEL POLYTECHNIC COLLEGE POONJAR

(Managed By IHRD A Govt. of Kerala Undertaking)

SEMINAR REPORT
ON

CHAMELEON CHIP
Presented By

SANJAY MS Reg No:16150835


In partial fulfillment for the completion of the Fifth Semester Diploma in

COMPUTER HARDWARE ENGINEERING

MODEL POLYTECHNIC COLLEGE POONJAR


(Managed By IHRD A Govt. of Kerala Undertaking)
CERTIFICATE

This is to certify that this seminar report titled CHAMELEON CHIP is a bona-fide record
work done by SANJAY MS Reg No:16150835 towards the partial fulfillment completion of
the Fifth Semester of Diploma in COMPUTER HARDWARE ENGINEERING by IHRD
a govt. of Kerala undertaking.

SEMINAR GUIDE HEAD OF THE DEPARTMENT EXTERNAL


EVALUATOR
ACKNOWLEDGEMENT
If the words are considered as symbols of Approval and Token of Acknowledgement, then
let the words play the heralding role of expressing my gratitude. First and Foremost, I praise
the God Almighty for the grace he showered on me during our studies as well as my day to
day life activities.

I would like to express my gratitude to our principal Mrs. Bindu Thomas, for
providing the facilities and constant encouragement in my achievements

I also express my heartfelt thanks to Ms. Anit V Jose H.O.D of Computer


Hardware Engineering and project co-ordinator who helped me to the materialize this
project. I also sincerely thanks the Computer Hardware Engineering Diploma in
Engineering Faculty for providing me with invaluable help.

I would like to express my heartfelt gratitude and reverence to Ms.Jayalakshmi C


K,
Ms. FathimaTimi P F, Mr.Manu T Mohan Lectures in Computer Hardware Engineering
Diploma in Engineering for the timely advices and encouragement. Last but not the least, I
owe to my family and my friends for giving me the helps, strength and courage for
accomplishing the task
CONTENTS
1. INTRODUCTION
2. CHAMELEON CHIP
3. FPGA
 GATE ARRAY DESIGN
 FPGA APPLICATIONS
 FPGA ADVANTAGES
 FPGA INTERNALS
 DESIGNING WITH FPGA
 FPGA TESTING
 FPGA TOOLS
4. MULTIFUNCTION IMPLEMENTATION
5. ARCHITECTURE OF CHAMELEON CHIP AND COMPONENTS
6. RECONFIGURABLE COMPUTING
7. RECONFIGURABLE PROCESSING FABRIC
8. PROGRAMMABLE I/O
9. TECHNOLOGIES USED IN CHIP
 ECONFIGURABLE TECHNOLOGY
 CSIDE TECHNOLOGY
 EBIOS
10. COMPARISON WITH OTHER TECHNOLOGIES
11. ADVANTAGES
12. DISADVANTAGES
13. APPLICATIONS
14. CS2112
15. A FUTURISTIC DREAM
16. CONCLUSION
17. REFERENCE
18.

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