Cpu 1
Cpu 1
• The purpose of the Central Processing Unit (CPU) is to carry out program instructions. Each
CPU is designed to execute a specific group of instructions, the instruction set.
To meet this purpose, the CPU carries out a series of functions in a continuous cycle.
• This involves retrieving an instruction from a memory address and storing it in the Current
Instruction register.
• The address of the instruction is stored in another register called the Program Counter (PC).
After an instruction is fetched, the PC is updated so the CPU knows the address of the next
instruction it has to fetch.
• This involves the CPU identifying the operation code (op-code) part of the instruction which
tells it which operation to perform. If the op-code requires the CPU to act on some data then the
second part of the instruction will contain either the data or the memory address where the data
is stored.
• In this step the control unit links together the parts of the CPU that are needed to actually carry
out (execute) the instruction.
• Examples:
• If the instruction involved integer arithmetic or logical operations then the arithmetic
logic unit (ALU) would be connected to the relevant memory locations so that:
• The data for the calculation can be passed along a data bus to the ALU as input.
• The ALU can execute the required operation
• The result of the operation can then be passed from the ALU along a data bus as
output.
• Some types of instructions alter the Program Counter rather than alter data. This allows
programs to carry out iteration loops and conditional program execution rather than
stepping through instructions in sequence.
• Some instructions change the state of single-bit flag registers. These TRUE/FALSE
registers are used to indicate the result of an execute step, for example a flag can be set
to TRUE if two numbers are compared and found to be equal or if a subtraction
produces a zero or a negative result.
• Some instructions involve an additional write-back step if data is written back to RAM.
There are huge variations in CPU designs but most will share the following key components:
An electronic clock that regulates the rate at which the CPU runs through the Fetch/Decode/Execute
cycle, as well as synchronising all the various computer components.
• The higher the clock speed, the more instructions the CPU can execute per second.
• The speed of the clock (and therefore the speed of the CPU) is measured in Megahertz (MHz).
The control unit which performs the tasks of fetching, decoding and managing the execution of
instructions and the storing of the results. It does this mainly by controlling the links between the other
components of the CPU. It also contains various registers such as:
• the Program Counter which stores the memory address of the next instruction.
• the Current Instruction register which stores the instruction currently being executed.
• The Arithmetic Logic Unit (ALU) which executes basic arithmetic and logical operations on
integer data that it is linked to. Examples of such operations include:
• Integer arithmetic operations (addition, subtraction)
• Logic operations (AND, NOT, OR, XOR)
• The Floating Point Unit (FPU) which performs math functions on floating point numbers (non-
integer numbers).
• Various registers such as the accumulator that are used to temporarily store data while
instructions are being executed.
Buses, which are sets of tiny parallel wires that carry data between CPU components and between the
CPU and external devices and RAM. A 32 wire bus can carry a 32 bit memory address or a 32 bit item
of data. The three main bus types are:
• address buses – used to set which memory address a CPU component is linked to for a
read/write operation.
• data buses – used to exchange the data between a memory address and the CPU when a
read/write operation is carried out.
• control buses – used to transfer command codes and return status signals between
components of the CPU and external devices.
The bus management unit which manages the transfer of data along the external bus connections,
including the links to RAM.
Clock Speed:
• This is the rate at which the CPU runs and is controlled by an electronic clock built into the
CPU. The frequency of this clock is measured in Hertz (Hz) so a 900 MHz CPU would
complete 900 million clock cycles per second.
• Few of the instructions that the CPU processes are actually completed in a single clock cycle
and the actual number of cycles required will depend on the CPU design (this means that
comparing one CPU with another just on clock speed can be too simplistic).
SUMMARY: A CPU with a high clock speed will process more instructions per second and will
therefore have a higher performance than the equivalent CPU with a lower clock speed.
Cache Size:
• If the CPU can process instructions and data faster than they can be fetched or exchanged with
RAM then the CPU is in effect idle for some clock cycles. One solution is to build very fast
cache memory into the CPU and use it as a buffer.
SUMMARY: The larger the cache size the higher the CPU performance because the CPU will
spend less time accessing RAM so programs will execute faster.
Number of cores:
• Processors originally had only one core so could only process one instruction at a time. A multi-
core processor is made up of two or more independent processors (called cores).
• A dual-core processor contains two cores and a quad-core processor contains four cores. Each
core can process instructions independently of the other cores.
• The biggest performance gain when using a multi-core processor is when the software has been
specifically written to run on multiple cores.
SUMMARY: A multi-core CPU will have a higher performance than a single-core CPU with the
same clock speed.
CPU Special Registers
The CPU contains a number of special-purpose registers:
Instruction Register (IR): The instruction register holds the instruction currently being executed.
Memory Data Register (MDR): The memory data register (also known as the memory buffer register
or data buffer) holds the piece of data that has been fetched from memory.
Memory Address Register (MAR): The memory address register holds the address of the next piece
of memory to be fetched.
Program Counter (PC): The program counter holds the location of the next instruction to be fetched
from memory. It is automatically incremented between supplying the address of the next instruction
and the instruction being executed.
Accumulator: The accumulator is an internal CPU register used as the default location to store any
calculations performed by the arithmetic and logic unit.
Fetch/Execute Cycle
The fetch-execute cycle of the processor refers to the sequence that is completed for each instruction in
a program.
• Fetch Sequence
1. Move the value in the program counter to the memory address register
2. Send the value in the memory address register to memory via the address bus
3. Return the value stored in memory via the data bus
4. Store the value in the memory data register
5. Copy the instruction from the memory address register to the instruction register
6. Increment the program counter. The instruction in the instruction register is then Decoded
• Execute Sequence
1. The instruction is Executed
Addressing Modes
Most CPUs have at least four addressing modes.
1. Immediate
2. Direct
3. Indirect
4. Indexed
Note that different CPUs and manufacturers may use synonyms for these modes. For example
immediate mode is also known as literal mode. Regardless of the name used the effect is the same.
Example Addressing Modes
The following examples use the following piece of computer memory.
Location 0 1 2 3 4 5 6
Value 17 3
Immediate addressing supplies the actual value and is normally prefixed with a #.
LD Acc, #5 ;Load the actual value 5 into the accumulator
Ax becomes 5.
Direct addressing uses the number as a memory location where the value is stored.
LD Acc, 5 ;Load the value in memory location 5 into the accumulator
Ax becomes 3.
Indirect addressing uses the value as a memory location that points to the memory
location that holds the value. In this case the number is usually enclosed with
square brackets.
LD Acc, [5] ;Load the value stored in the memory location pointed to by the operand into the
accumulator
Memory location 5 is accessed which contains 3. Memory location 3 is accessed which is 17.
Ax becomes 17.
Indexed addressing uses a base address and an offset to quickly access streams of
data such as those used to store arrays.