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Logic and Switching Theory

This document is an exam for a Logic and Switching Theory course. It contains 18 multiple choice and written response questions covering various topics in the subject area, including: 1. Converting numbers between binary coded decimal and other number systems. 2. Boolean algebra laws like consensus and DeMorgan's. 3. Logic circuit minimization techniques like sum of products and product of sums forms. 4. Designing circuits like multiplexers, sequence detectors, and parity generators using basic logic gates. 5. Concepts in sequential logic like state assignment and race conditions in asynchronous circuits. The questions require students to perform calculations, draw circuits, explain concepts, minimize logic functions and analyze asynchronous circuits

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Satish Bojjawar
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100 views

Logic and Switching Theory

This document is an exam for a Logic and Switching Theory course. It contains 18 multiple choice and written response questions covering various topics in the subject area, including: 1. Converting numbers between binary coded decimal and other number systems. 2. Boolean algebra laws like consensus and DeMorgan's. 3. Logic circuit minimization techniques like sum of products and product of sums forms. 4. Designing circuits like multiplexers, sequence detectors, and parity generators using basic logic gates. 5. Concepts in sequential logic like state assignment and race conditions in asynchronous circuits. The questions require students to perform calculations, draw circuits, explain concepts, minimize logic functions and analyze asynchronous circuits

Uploaded by

Satish Bojjawar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Code No. B211007/3 Date: 12.06.

2015

CVR COLLEGE OF ENGINEERING


An UGC Autonomous Institution - Affiliated to JNTUH R12
B. Tech. II year, I sem. Suppl. Examinations, June – 2015

Subject - Logic & Switching Theory


Branch – Electronics & Instrumentation Engineering

Time: 3 hours Max. Marks: 75

PART – A (10x2= 20 Marks)


(Answer ALL Questions)

1. Express the numbers (23)8, (89)10 in BCD numbers.


2. Write the Boolean equations for consensus law and Demorgans law
3. Find SOP & POS forms for the F=m (2, 3, 6, 7, 8, 9, 10, 11)
4. Draw a 4 to 1 multiplexer, using 2 to 1 multiplexers .
5. Draw sequence detector. State diagram to detect the sequence 110.
6. Define i. Hazard ii. Race
7. Give a short note on Merger chart method.
8. Implement even parity bit generator using PROM.
9. Show gray to binary and binary to gray conversion with equations.
10. What is Universal shift register?
PART – B (5x11 = 55 Marks)
(Answer any FIVE questions)

11. a) What is the equivalent binary number of


i. (11.8125)10 ii.(17.26)8 [5]
b) Discuss about error detecting code with suitable example [6]

12. a) Solve the following Boolean expression


F = ( (XY'+XYZ)'+X(Y+XY'))' [5]
b) Draw two input XOR gate using two input NAND gates [6]

13.Reduce the following Boolean function by using Quine-McCluskey method


F = 𝑚( 0,1,2,3, 5,6,10,12,14) [11]

14. a) Design 4:1 multiplexer using only NAND gates. [5]


b) What is meant by decoder? Design and implement 3 to 8 decoder with basic logic gates [6]

15. a) Design and realize a modulo-8 counter using JK flip-flops. [6]


b) What is meant by race –around condition ?How can you overcome that ,explain. [5]

16. a) Explain about race free state assignment with example [5]
b) Analyze the asynchronous circuit whose next state equation is Y=x1+(x2x1+x2)y and z=y [6]

P.T.O
17. a) Explain partition techniques with example [5]
b) Minimise the following state table and find the distinguishable sequence for A to D. [6]

NS,Z
PS
I1 I2
A A,0 B,0
B C,0 B,0
C A,0 B,0
D D,0 E,1
E B,0 C,1

18. a) Implement the following Boolean function with PAL [6]


F(A,B,C) = 𝑚( 4,5,6,7) & F2(ABC) = m(1367)
b) Write shorts on PLDS. [5]

*****

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