Metropolitan University, Sylhet
Department of Computer Science and Engineering
Midterm Examination, Spring – 2018
Program: CSE, Batch: 38 (A & B)
Course Title: CSE-211::Digital Logic Design
Time: 1 Hour 30 minutes Full Marks: 30
(Answer any three questions)
1. a) Write down few differences between Analog and Digital signal. 4
b) Convert the following: 3
i) (A29C)16 = (?)8 ii) (5635.35)8 = (?)10
c) Define Universal gate. Explain NOR is an Universal gate. 3
2. a) Prove De Morgan’s theorem for three variables. 3
b) Find a simplified switching expression and logic network for the logic circuit in the 5
following figure.
c) What is SOP and POS 2
3. a) Design a logic circuit that controls an elevator door in a three story building. 4
b) What is adder? Construct a full adder logic circuit by using proper simplification. 4
c) Define Don’t care condition. 2
4. a) Simplifying the following equations using Boolean Rules and show the outputs in 6
basic gates.
i) A'B'C' + A'BC + ABC + AB'C' + AB'C
ii) ((A'+C ) (AB)')'
b) Simplify the expression F(W,X,Y,Z) = W´X´Y´ + X´YZ´ + W´XYZ´ + WX´Y´ 4
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