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XCH - Exchange - AVR Assembler

The XCH instruction exchanges one byte between a register and the data location pointed to by the Z pointer register. It leaves the Z pointer register unchanged. This instruction is useful for writing or reading status bits stored in SRAM. It operates in 2 cycles and exchanges the contents of the register and memory location pointed to by Z without affecting any status flags.

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224 views1 page

XCH - Exchange - AVR Assembler

The XCH instruction exchanges one byte between a register and the data location pointed to by the Z pointer register. It leaves the Z pointer register unchanged. This instruction is useful for writing or reading status bits stored in SRAM. It operates in 2 cycles and exchanges the contents of the register and memory location pointed to by Z without affecting any status flags.

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Regard'sDexterZacheus
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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5/9/2018 XCH - Exchange - - AVR Assembler

XCH - Exchange

Description:
Exchanges one byte indirect between register and data space.

The data location is pointed to by the Z (16 bits) Pointer Register in the Register File. Memory access is limited to the current data segment of 64K bytes. To access another data
segment in devices with more than 64K bytes data space, the RAMPZ in register in the I/O area has to be changed.

The Z-pointer Register is left unchanged by the operation. This instruction is especially suited for writing/reading status bits stored in SRAM.

Operation:

(Z) ← Rd,(Z) ← Rd

Syntax: Operands: Program Counter:

XCH Z, Rd 0 ≤ d ≤ 31 PC ← PC + 1

16-bit Opcode:

1001 000r rrrr 0100

Status Register (SREG) and Boolean Formula:


I T H S V N Z C

- - - - - - - -

Words:1 (2 bytes)

Cycles: 2

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