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EE 668: Models: Madhav P. Desai March 9, 2010

This document discusses models for digital systems. It defines a model as a representation of a system that allows investigation of its properties and prediction of outcomes. In this course, the focus will be on synchronous models where time is discrete. Specific models that will be covered include finite state machines, communicating finite state machines, queueing networks, and shared memory multiprocessing. Synchronous systems are defined as having a sequence of discrete time instants. Examples of how basic digital components like registers and RAM can be modeled as synchronous systems are also provided.

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49 views3 pages

EE 668: Models: Madhav P. Desai March 9, 2010

This document discusses models for digital systems. It defines a model as a representation of a system that allows investigation of its properties and prediction of outcomes. In this course, the focus will be on synchronous models where time is discrete. Specific models that will be covered include finite state machines, communicating finite state machines, queueing networks, and shared memory multiprocessing. Synchronous systems are defined as having a sequence of discrete time instants. Examples of how basic digital components like registers and RAM can be modeled as synchronous systems are also provided.

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Pratik Kamat
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EE 668: Models

Madhav P. Desai
March 9, 2010

1 Overview
A model is (definition borrowed from http://www.investorwords.com/5662/model.html)
A representation of a system that allows for investigation of the
properties of the system and, in some cases, prediction of future
outcomes.
A model is usually an abstract representation of some concrete system. For
example, Boolean algebra is a useful model for describing combinational digital
circuits.
When we are designing a system from a specification, we will eventually
be arriving at a description of the system. This description is considerably
simplified if it is in terms of an appropriate model. In fact, if there is no model,
then it is unlikely that we will be able to prove any useful properties of our
design, leave alone making quantitative predictions about its behaviour.
In the context of digital VLSI systems, an appropriate model needs to define
• the notion of time: Is time discrete or continuous? In a synchronous model,
time consists of a sequence of discrete points, whereas in asynchronous
models, time is considered to be a continuous variable.
• the computation model: The framework in which the algorithm being
implemented by the system is expressed. Such models include combi-
national circuits, finite state machines, communicating Finite-state ma-
chines, Petri-nets, Turing machines, Processors, Queueing Networks, Shared-
memory multi-processing, Message-passing based multi-processing.
In this course, we will be looking at synchronous models. The computation
models that we will consider are the finite-state machines, communicating finite-
state machines, queueing networks and shared-memory multi-processing.

1
2 Synchronous (or discrete-time) systems
In such systems, time is a sequence {k}∞
0 . An observable x in such a system is
defined by a sequence {x(k)} in which x(k) is interpreted as the value taken by
x at time instant k.
When such systems are implemented physically, the time instant k is usually
(but not always!) identified with some physical event related to the rising edge
of a clock signal.

3 Synchronous Mealy machines


Suppose that {x(k)}∞
k , x(k) ∈ Σ, {y(k)}k , yk ∈ Π, and {q(k)}0 , q(k) ∈ Q
∞ ∞

are sequences. Then a synchronous Mealy machine is defined by the following


relations

q(0) = q0
y(k) = λ(x(k), q(k))
q(k + 1) = θ(x(k), q(k))

The sequence {k}∞ 0 is assumed to be defined by a clock. For instance, k could


correspond to the k th rising edge on a square wave signal in a system. Thus, k
corresponds to the k th tick of a clock. Then x(k) (similarly y(k), q(k)) is to be
interpreted as a sample of the input to (similarly the output and state of) the
Mealy machine at index k (or at the k th tick of the clock).

3.1 Some synchronous models of useful digital system build-


ing blocks
A combinational logic has a very simple model: if x(k) is the input and y(k) is
the output, then
y(k) = f (x(k))
where f is a combinational function.
A simple register has data inputs din and two control inputs reset and
enable. The register has a single output dout. The register can then be modeled
by 
 0 if reset(k) = true
dout(k + 1) = din(k) if reset(k).enable(k) = true
dout(k) otherwise

A single ported synchronous RAM with a single cycle delay is described as


follows. The RAM contains an array D of words, and has an address input ain,

2
a data input din, control signals enable and rd, and a data output dout. The
behaviour of the RAM is then

din(k) if enable(k).rd(k) = true
D(ain)(k + 1) =
D(ain)(k) otherwise

D(ain)(k) if enable(k).rd(k) = true
dout(k + 1) =
dout(k) otherwise

4 Notes
There is an alternate formulation of a finite state machine, the Moore model. A
Mealy machine is more general (that is, a Mealy machine can always model a
Moore machine). On the other hand, even though a Moore machine can model
the sequential behaviour of a Mealy machine, it cannot model the timing of a
Mealy machine (in which the output is an immediate function of the input).
Thus, we will stick to the Mealy model throughout this course. Also, note that
a Mealy machine can also model a combinational circuit.
Another point to note is that a Mealy machine need not be synchronous.
That is, it may operate without a clock, and can react to the arrival of input
symbols. Thus, the significant instants of time are those corresponding to the
arrival of input symbols. We will not be considering such asynchronous Mealy
machines in this course (for various reasons which will become clearer as we go
along).

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