As7263 DS000476 1-00

AS7263
6-Channel NIR Spectral_ID Device with

Electronic Shutter and Smart Interface
General Description The AS7263 is a digital 6-channel spectrometer for spectral

identification in the near IR (NIR) light wavelengths. AS7263
consists of 6 independent optical filters whose spectral re-
sponse is defined in the NIR wavelengths from approximately
600nm to 870nm with full-width half-max (FWHM) of 20nm. An
integrated LED driver with programmable current is provided
for electronic shutter applications.
The AS7263 integrates Gaussian filters into standard CMOS sil-
icon via Nano-optic deposited interference filter technology
and is packaged an LGA package that provides a built in aper-
ture to control the light entering the sensor array.
Control and Spectral data access is implemented through either
the I²C register set, or with a high level AT Spectral Command
set via a serial UART.
Ordering Information and Content Guide appear at end of
datasheet.
Key Benefits & Features

The benefits and features of AS7263, 6-Channel NIR
Spectral_ID Device with Electronic Shutter and Smart Interface
are listed below:
Figure 1:
Added Value of Using AS7263
Benefits Features
• 6 near-IR channels: 610nm, 680nm, 730nm, 760nm,

• Compact 6-channel spectrometry solution
810nm and 860nm, each with 20nm FWHM
• Simple text-based command interface via UART,

or direct register read and write with interrupt • UART or I²C slave digital Interface
on sensor ready option on I²C
• Lifetime-calibrated sensing with no drift over

• NIR filter set realized by silicon interference filters
time or temperature
• No additional signal conditioning required • 16-bit ADC with digital access
• Electronic shutter control/synchronization • Programmable LED drivers
• Low voltage operation • 2.7V to 3.6V with I²C interface
• 20-pin LGA package 4.5mm x 4.7mm x 2.5mm,

• Small, robust package, with built-in aperture
-40°C to 85°C temperature range
ams Datasheet Page 1

[v1-00] 2016-Nov-25 Document Feedback
AS7263 − General Description
Applications
The AS7263 applications include:
• Product authentication
• Bank note/document validation
• Chemical analysis
• Food/beverage safety
Block Diagram
The functional blocks of this device are shown below:
Figure 2:
AS7263 NIR Spectral_ID System
3V
100nF 10uF
3V
VDD1 VDD2
3V
RX / SCL_S
uP
TX / SDA_S LED_IND
INT LED_DRV
AS7263 Light
MOSI 6-channel
Source
Flash MISO NIR
Memory SCK Sensor Light in
CSN_EE Reflective
GND Surface
Page 2 ams Datasheet

Document Feedback [v1-00] 2016-Nov-25
AS7263 − Pin Assignment
Pin Assignment The device pin assignments are described below.
Figure 3:
Pin Diagram (Top View)
20 16
1 15
5 11
6 10
Figure 4:
Pin Description
Pin Number Pin Name Description
1 NF Not Functional. Do not connect.
2 RESN Reset, Active LOW
3 SCK SPI Serial Clock
4 MOSI SPI Master Out Slave In
5 MISO SPI Master In Slave Out
6 CSN_EE Chip Select for External Serial Flash Memory, Active LOW
7 CSN_SD Chip Select for SD Card Interface, Active LOW
8 I2C_ENB Select UART (Low) or I²C (High) Operation
11 RX/SCL_S RX (UART) or SCL_S (I²C Slave) Depending on I²C_ENB
12 TX/SDA_S TX (UART) or SDA_S (I²C Slave) Depending on I²C_ENB
13 INT Interrupt, Active LOW
14 VDD2 Voltage Supply

AS7263 − Pin Assignment
Pin Number Pin Name Description
15 LED_DRV LED Driver Output for Driving LED, Current Sink
16 GND Ground
17 VDD1 Voltage Supply
18 LED_IND LED Driver Output for Indicator LED, Current Sink

AS7263 − Absolute Maximum Ratings
Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. These are stress
ratings only. Functional operation of the device at these or any
other conditions beyond those indicated under
Electrical Characteristics is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability. The device is not designed for high energy UV
(ultraviolet) environments, including upward looking outdoor
applications, which could affect long term optical performance.
Figure 5:
Absolute Maximum Ratings
Symbol Parameter Min Max Units Comments
Electrical Parameters
VDD1_MAX Supply Voltage VDD1 -0.3 5 V Pin VDD1 to GND
VDD2_MAX Supply Voltage VDD2 -0.3 5 V Pin VDD2 to GND
Input/Output Pin
VDD_IO -0.3 VDD+0.3 V Input/Output Pin to GND
Voltage
Input Current
ISCR ± 100 mA JESD78D
(latch-up immunity)
Electrostatic Discharge
ESDHBM ± 1000 V JS-001-2014
HBM
ESDCDM ± 500 V JSD22-C101F
CDM
Temperature Ranges and Storage Conditions
Storage Temperature
TSTRG -40 85 °C
Range
IPC/JEDEC J-STD-020
The reflow peak soldering
temperature (body
temperature) is specified
according to IPC/JEDEC
Package Body
TBODY 260 °C J-STD-020
Temperature
“Moisture/Reflow
Sensitivity Classification
for Non-hermetic Solid
State Surface Mount
Devices.”
Relative Humidity
RHNC 5 85 %
(non-condensing)
Moisture Sensitivity Maximum floor life time of

MSL 3
Level 168 hours

AS7263 − Electrical Characteristics
Electrical Characteristics All limits are guaranteed with VDD = VDD1 = VDD2 = 3.3V,
TAMB=25°C. The parameters with min and max values are
guaranteed with production tests or SQC (Statistical Quality
Control) methods.
Figure 6:
Electrical Characteristics of AS7263
Symbol Parameter Conditions Min Typ Max Unit
General Operating Conditions
VDD1
Voltage Operating Supply UART Interface 2.97 3.3 3.6 V
/VDD2
VDD1
/VDD2
Voltage Operating Supply I2C Interface 2.7 3.3 3.6 V
TAMB Operating Temperature -40 25 85 °C
IVDD Operating Current 5 mA
ISTANDBY(1) Standby Current 12 μA
Internal RC Oscillator
Internal RC Oscillator
FOSC 15.7 16 16.3 MHz
Frequency
tJITTER(2) Internal Clock Jitter @25°C 1.2 ns
Temperature Sensor
Absolute Accuracy of the

DTEMP Temperature -8.5 8.5 °C
Measurement
Indicator LED
IIND LED Current 1 4 8 mA
IACC Accuracy of Current -30 30 %
Voltage Range of
VLED Vds of current sink 0.3 VDD V
Connected LED
LED_DRV
ILED1 LED Current 12.5, 25, 50 or 100 12.5 100 mA
IACC Accuracy of Current -10 10 %
Voltage Range of
VLED Vds of current sink 0.3 VDD V
Connected LED

AS7263 − Electrical Characteristics
Digital Inputs and Outputs
IIH, IIL Logic Input Current Vin=0V or VDD -1 1 μA
Logic Input Current (RESN

IILRESN Vin=0V -1 -0.2 mA
pin)
0.7*
VIH CMOS Logic High Input VDD V
VDD
0.3*
VIL CMOS Logic Low Input 0 V
VDD
VDD -
VOH CMOS Logic High Output I=1mA V
0.4
VOL CMOS Logic Low Output I=1mA 0.4 V
tRISE(2) Current Rise Time C(Pad)=30pF 5 ns
tFALL(2) Current Fall Time C(Pad)=30pF 5 ns
Note(s):
1. 15μA over temperature
2. Guaranteed, not tested in production

AS7263 − Timing Characteristics
Timing Characteristics
Figure 7:
AS7263 I²C Slave Timing Characteristics
Symbol Parameter Condition Min Typ Max Unit
I²C Interface
fSCLK SCL Clock Frequency 0 400 kHz
Bus Free Time

tBUF Between a STOP and 1.3 μs
START
Hold Time
tHS:STA 0.6 μs
(Repeated) START
LOW Period of SCL

tLOW 1.3 μs
Clock
HIGH Period of SCL

tHIGH 0.6 μs
Clock
Setup Time for a

tSU:STA 0.6 μs
Repeated START
tHS:DAT Data Hold Time 0 0.9 μs
tSU:DAT Data Setup Time 100 ns
Rise Time of Both

tR 20 300 ns
SDA and SCL
Fall Time of Both SDA

tF 20 300 ns
and SCL
Setup Time for STOP

tSU:STO 0.6 μs
Condition
Capacitive Load for CB — total capacitance of

CB 400 pF
Each Bus Line one bus line in pF
I/O Capacitance
CI/O 10 pF
(SDA, SCL)

Figure 8:
I²C Slave Timing Diagram
tLOW
tR tF
SCL
P S tHIGH S P
tHD:STA tHD:DAT tSU:DAT t SU:STA tSU:STO
VIH
SDA
tBUF VIL
Stop Start
Figure 9:
AS7263 SPI Timing Characteristics
SPI Interface
fSCK Clock Frequency 0 16 MHz
tSCK_H Clock High Time 40 ns
tSCK_L Clock Low Time 40 ns
tSCK_RISE SCK Rise Time 5 ns
tSCK_FALL SCK Fall Time 5 ns
Time between CSN high-low

tCSN_S CSN Setup Time transition to first SCK high 50 ns
transition
Time between last SCK

tCSN_H CSN Hold Time falling edge and CSN 100 ns
low-high transition
tCSN_DIS CSN Disable Time 100 ns
tDO_S Data-Out Setup Time 5 ns
tDO_H Data-Out Hold Time 5 ns
tDI_V Data-In Valid 10 ns
Note(s):
1. Guaranteed, not tested in production

Figure 10:
SPI Master Write Timing Diagram
tCSN_DIS
CSN
tSCK_RISE tSCK_FALL tCSN_H

tCSN_S
SCK
t DO_S tDO_H
MOSI MSB LSB
HI-Z HI-Z
MISO
Figure 11:
SPI Master Read Timing Diagram
CSN_xx
tSCK_H tSCK_L
SCK
tDI_V
Dont care
MOSI
MISO MSB LSB

Optical Characteristics
Figure 12:
Optical Characteristics of AS7263 (Pass Band)(1)
Channel
Symbol Parameter Test Conditions Min Typ Max Unit
(nm)
counts/
R Channel R Incandescent (2), (4) 610 35 (3),(4)
(μW/cm2)
counts/
S Channel S Incandescent (2), (4) 680 35 (3),(4)
(μW/cm2)
counts/
T Channel T Incandescent (2), (4) 730 35 (3),(4)
(μW/cm2)
counts/
U Channel U Incandescent (2), (4) 760 35 (3),(4)
(μW/cm2)
counts/
V Channel V Incandescent (2), (4) 810 35 (3),(4)
(μW/cm2)
counts/
W Channel W Incandescent (2), (4) 860 35 (3),(4)
(μW/cm2)
Full Width
FWHM 20 20 nm
Half Max
Wavelength
Wacc ±5 nm
Accuracy
Dark
GAIN=64,
dark Channel 5 counts
TAMB=25°C
Counts
Angle of
f On the sensors ±20.0 deg
Incidence
Note(s):
1. Calibration & measurements are made using diffused light.
2. Each channel is tested with GAIN = 16x, Integration Time (INT_T) = 166ms and VDD = VDD1 = VDD2 = 3.3V, TAMB=25°C.
3. The accuracy of the channel counts/μW/cm 2 is ±12%.
4. The light source is an incandescent light with an irradiance of ~1500μW/cm 2 (300-1000nm). The energy at each channel (R, S, T, U,
V, W) is calculated with a ±33nm bandwidth around the center wavelengths (610, 680, 730, 760, 810, 860nm).

AS7263 − Typical Operating Characteristics
Typical Operating
Characteristics
Figure 13:
Spectral Responsivity
AS7263
1
0.9
Normalized Responsivity
0.8
0.7
R
0.6
S
0.5
T
0.4
U
0.3 V
0.2 W
0.1
0
550 600 650 700 750 800 850 900 950
λ - Wavelength (nm)

AS7263 − Detailed Description
Detailed Description
Figure 14:
Internal Block Diagram
VDD1 VDD2
INT LED_IND
RX / SCL_S 2
UART / I C LED_DRV
TX / SDA_S
I2C_ENB
°C
MISO
Spectral_ID SPI
MOSI
Engine Master
SCK
Multi CSN_SD
Spectral
Sensor
R S T U V W SYNC / RESN
RC Osc
16MHz
GND
6-Channel NIR Spectral_ID Detector

The AS7263 6-channel Spectral_ID is a next-generation digital
spectral sensor device. Each channel has a Gaussian filter
characteristic with a full width half maximum (FWHM)
bandwidth of 20nm. The channels are spaced roughly at 50nm
intervals in the NIR spectrum: R, S, T, U, V, W. The sensor contains
analog-to-digital converters (16-bit resolution ADC), which
integrate the current from each channel’s photodiode. Upon
completion of the conversion cycle, the integrated result is
transferred to the corresponding data registers. The transfers
are double-buffered to ensure that the integrity of the data is
maintained.
Interference filters enable high temperature stability and
eliminate lifetime drift. Filter accuracy will be affected by the
angle of incidence, and require 0° angle of incidence ±20.0° for
specified accuracy. Angles of light beyond this will shift the
spectral response of the filters. The LGA package aperture
assists in the control of the light input, helping to maintain the
proper angle of incidence at the sensors.

Data Conversion Description

AS7263 spectral conversion is implemented via two photodi-
ode banks per device. Bank 1 consists of data from the S, T, U,
V photodiodes. Bank 2 consists of data from the R, T, U, W pho-
todiodes. Spectral conversion requires the integration time (IT
in ms) set to complete. If both photodiode banks are required
to complete the conversion, the 2nd bank requires an addition-
al IT ms. Minimum IT for a single bank conversion is 2.8 ms. If
data is required from all 6 photodiodes then the device must
perform 2 full conversions (2 x Integration Time).
The spectral conversion process is controlled with BANK Mode
settings as follows:
BANK Mode 0: Data will be available in registers S, T, U & V (R
and W registers will be zero)
BANK Mode 1: Data will be available in registers R, T, U & W (V
and W registers will be zero)
BANK Mode 2: Data will be available in registers R, S, T, U, V & W
When the bank setting is Mode 0, Mode 1, or Mode 2, the spec-
tral data conversion process operates continuously, with new
data available after each IT ms period. In the continuous modes,
care should be taken to assure prompt interrupt servicing so
that integration values from both banks are all derived from the
same spectral conversion cycle.
BANK Mode 3: Data will be available in registers R, S, T, U, V & W
in One-Shot mode
When the bank setting is Mode 3, the device operates in
One-Shot mode. Spectral conversion occurs only when bit 0 of
the control register (1SHOT) is set to 1. The 1SHOT bit in the
control register is subsequently cleared by hardware at the
same time the DATA_RDY bit is set to 1 indicating the availability
of spectral conversion result data. The One-Shot mode is in-
tended for use when it is critical to ensure that spectral conver-
sion results are obtained contemporaneously.

Figure 15:
Photo Diode Array
Photo Diode Array
T U S
R V W
Figure 16:
Bank Mode and Data Conversion
BANK Mode 0
One Conversion S, T, U, V
Integration Time
BANK Mode 1
One Conversion R, T, U, W
Integration Time
BANK Mode 2
1st Conversion S, T, U, V
Integration Time 2nd Conversion R, T, U, W
Integration Time
RC Oscillator
The timing generation circuit consists of an on-chip 16MHz,
temperature compensated oscillator, which provides the mas-
ter clock for the AS7263.

Temperature Sensor
The Temperature Sensor is constantly measuring the on-chip
temperature and enables temperature compensation proce-
dures.
Reset
Pulling down the RESN pin for longer than 100ms resets the
AS7263.
Figure 17:
Reset Circuit
RESN
CLE
Reset
Push > 100ms
AS7263
Indicator LED
The LED, connected to pin LED_IND, can be used to indicate
programming progress of the device.
While programming the AS7263 via the external SD card the
indicator LED starts flashing (500ms pulses). When program-
ming is completed the indicator LED is switched off. The LED
(LED0) can be turned ON/OFF via AT commands or via I²C reg-
ister control. The LED sink current is programmable from 1mA,
2mA, 4mA and 8mA.
Electronic Shutter with LED_DRV Driver Control

There are two LED driver outputs that can be used to control
up to 2 LEDs. This will allow different wavelength light sources
to be used in the same system. The LED output sink currents are
programmable and can drive external LED sources: LED_IND
from 1mA, 2mA, 4mA and 8mA and LED_DRV from 12.5mA,
25mA, 50mA and 100mA. The sources can be turned off and on
via I²C registers control or AT commands and provides the de-
vice with an electronic shutter.

Interrupt Operation
If BANK is set to Mode 0 or Mode 1 then the data is ready after
the 1 st integration time. If BANK is set to Mode 2 or Mode 3 then
the data is ready after two integration times. If the interrupt is
enabled (INT = 1) then when the data is ready, the INT line is
pulled low and DATA_RDY is set to 1. The INT line is released
(returns high) when the control register is read. DATA_RDY is
cleared to 0 when any of the sensor registers R, S, T, U, V, W are
read. Since each sensor value is 2 bytes, after the 1 st byte is read
the 2 nd byte is shadow-protected in case an integration cycle
completes just after the 1 st byte is read.
In continuous spectral conversion mode (BANK setting of Mode
0, Mode 1, or Mode 2), the sensors continue to gather informa-
tion at the rate of the integration time, hence if the sensor reg-
isters are not read when the interrupt line goes low, it will stay
low and the next cycle’s sensor data will be available in the
registers at the end of the next integration cycle. When the con-
trol register BANK bits are written with a value of Mode 3,
One-Shot Spectral Conversion mode is entered. When a single
set of contemporaneous sensor readings is desired, writing
BANK Mode 3 to the control register immediately triggers ex-
actly two spectral data conversion cycles. At the end of these
two conversion cycles, the DATA_RDY bit is set as for the other
BANK modes. To perform a new One-Shot sequence, the control
register BANK bits should be written with a value of Mode 3
again. This process may continue until the user writes a different
value into the BANK bits.
I²C Slave Interface

If selected by the I2C_ENB pin setting, interface and control can
be accomplished through an I²C compatible slave interface to
a set of registers that provide access to device control functions
and output data. These registers on the AS7263 are, in reality,
implemented as virtual registers in software. The actual I²C slave
hardware registers number only three and are described in the
table below. The steps necessary to access the virtual registers
defined in the following are explained in pseudocode for exter-
nal I²C master writes and reads below.
I²C Feature List

• Fast mode (400kHz) and standard mode (100kHz) support.
• 7+1-bit addressing mode.
• Write format: Byte.
• Read format: Byte.
• SDA input delay and SCL spike filtering by integrated
RC-components.

Figure 18:
I²C Slave Device Address and Physical Registers
Entity Description Note
Byte = 1001 001x

Device Slave
8-bit Slave Address x= 1 for Master Read (byte = 93 hex)
Address
x= 0 for Master Write (byte = 92 hex)
Register Address = 0x00

Bit 1: TX_VALID
I²C slave interface STATUS 0 -> New data may be written to WRITE register
STATUS
register. 1 -> WRITE register occupied. Do NOT write.
Register
Read-only. Bit 0: RX_VALID
0 -> No data is ready to be read in READ register.
1 -> Data byte available in READ register.

I²C slave interface WRITE
8-Bits of data written by the I²C Master intended
WRITE Register register.
for receipt by the I²C slave. Used for both virtual
Write-only.
register addresses and write data.
I²C slave interface

READ Register READ register.
8-Bits of data to be read by the I²C Master.
Read-only.
I²C Virtual Register Write Access

Figure 19 shows the pseudocode necessary to write virtual
registers on the AS7263. Note that, because the actual registers
of interest are realized as virtual registers, a means of indicating
whether there is a pending read or write operation of a given
virtual register is needed. To convey this information, the most
significant bit of the virtual register address is used as a marker.
If it is 1, then a write is pending, otherwise the slave is expecting
a virtual read operation. The pseudocode illustrates the proper
technique for polling of the I²C slave status register to ensure
the slave is ready for each transaction.

Figure 19:
I²C Virtual Register Byte Write
Pseudocode
Poll I²C slave STATUS register;
If TX_VALID bit is 0, a write can be performed on the interface;
Send a virtual register address and set the MSB of the register address to 1 to indicate the pending write;
If TX_VALID bit is 0, the virtual register address for the write has been received and the data may now be written;
Write the data.
Sample Code:
#define I2C_AS72XX_SLAVE_STATUS_REG0x00
#define I2C_AS72XX_SLAVE_WRITE_REG0x01
#define I2C_AS72XX_SLAVE_READ_REG0x02
#define I2C_AS72XX_SLAVE_TX_VALID0x02
#define I2C_AS72XX_SLAVE_RX_VALID0x01
void i2cm_AS72xx_write(uint8_t virtualReg, uint8_t d)

{
volatile uint8_tstatus;
while (1)
{
// Read slave I²C status to see if the write buffer is ready.
status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG);
if ((status & I2C_AS72XX_SLAVE_TX_VALID) == 0)

// No inbound TX pending at slave. Okay to write now.
break ;
}
// Send the virtual register address (setting bit 7 to indicate a pending write).
i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, (virtualReg | 0x80)) ;
while (1)
{
// Read the slave I2C status to see if the write buffer is ready.
status = i2cm_read(I2C_AS72XX_SLAVE_STATUS_REG) ;

// No inbound TX pending at slave. Okay to write data now.
break;
}
// Send the data to complete the operation.
i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, d);
}

I²C Virtual Register Read Access

Figure 20 shows the pseudocode necessary to read virtual reg-
isters on the AS7263. Note that in this case, reading a virtual
register, the register address is not modified.
Figure 20:
I²C Virtual Register Byte Read
Pseudocode
If TX_VALID bit is 0, the virtual register address for the read may be written;
Send a virtual register address;
If RX_VALID bit is 1, the read data is ready;
Read the data.
Sample Code:
uint8_t i2cm_AS72xx_read(uint8_t virtualReg)
{
volatile uint8_t status, d ;
while (1)
{
// Read slave I2C status to see if the read buffer is ready.

// No inbound TX pending at slave. Okay to write now.
break ;
}
// Send the virtual register address (setting bit 7 to indicate a pending write).
i2cm_write(I2C_AS72XX_SLAVE_WRITE_REG, virtualReg) ;
while (1)
{
// Read the slave I²C status to see if our read data is available.
if ((status & I2C_AS72XX_SLAVE_RX_VALID) != 0)

// Read data is ready.
break ;
}
// Read the data to complete the operation.
d = i2cm_read(I2C_AS72XX_SLAVE_READ_REG) ;
return d ;s
}
The details of the i2cm_read() and i2cm_write() functions in
previous Figures are dependent upon the nature and imple-
mentation of the external I²C master device.

I²C Virtual Register Set

The figure below provides a summary of the AS7263 I²C register
set. Figures after that provide additional details. All register
data is hex or, where noted, 32-bit floating point, and all
multi-byte entities are Big Endian (most significant byte is
situated at the lowest register address).
Figure 21:
I²C Register Set Overview
Addr Name <D7> <D6> <D5> <D4> <D3> <D2> <D1> <D0>
Version Registers
0x00:
HW_Version Hardware Version
0x01
0x02:
FW_Version Firmware Version
0x03
Control Registers
DATA_
0x04 Control_Setup RST INT GAIN Bank RSVD
RDY
0x05 INT_T Integration Time
0x06 Device_Temp Device Temperature
LED_
0x07 LED_Control RSVD ICL_DRV ICL_IND LED_IND
DRV
Sensor Raw Data Registers
0x08 R_High Channel R High Data Byte
0x09 R_Low Channel R Low Data Byte
0x0A S_High Channel S High Data Byte
0x0B S_Low Channel S Low Data Byte
0x0C T_High Channel T High Data Byte
0x0D T_Low Channel T Low Data Byte
0x0E U_High Channel U High Data Byte
0x0F U_Low Channel U Low Data Byte
0x10 V_High Channel V High Data Byte
0x11 V_Low Channel V Low Data Byte
0x12 W_High Channel W High Data Byte
0x13 W_Low Channel W Low Data Byte

Addr Name <D7> <D6> <D5> <D4> <D3> <D2> <D1> <D0>
Sensor Calibrated Data Registers
0x14:
R_Cal Channel R Calibrated Data (float)
0x17
0x18:
S_Cal Channel S Calibrated Data (float)
0x1B
0x1C:
T_Cal Channel T Calibrated Data (float)
0x1F
0x20:
U_Cal Channel U Calibrated Data (float)
0x23
0x24:
V_Cal Channel V Calibrated Data (float)
0x27
0x28:
W_Cal Channel W Calibrated Data (float)
0x2B
Detailed Register Description
Figure 22:
HW Version Registers
Addr: 0x00 HW_Version
Bit Bit Name Default Access Bit Description
7:0 Device Type 0100000 R Device type number
Addr: 0x01 HW_Version
7:0 HW Version 00111111 R Hardware version

Figure 23:
FW Version Registers
Addr: 0x02 FW_Version
Minor
7:6 R Minor Version [1:0]
Version
5:0 Sub Version R Sub Version
Addr: 0x03 FW_Version
Major
7:4 R Major Version
Version
Minor
3:0 R Minor Version [5:2]
Version
Figure 24:
Control Setup Register
Addr: 0x04/0x84 Control_Setup
Soft Reset, Set to 1 for soft reset, goes

7 RST 0 R/W
to 0 automatically after the reset
Enable interrupt pin output (INT),

6 INT 0 R/W
1: Enable, 0: Disable
Sensor Channel Gain Setting (all

channels)
5:4 GAIN 0 R/W
‘b00=1x; ‘b01=3.7x; ‘b10=16x;
‘b11=64x
Data Conversion Type (continuous)

3:2 BANK 10 R/W ‘b00=Mode 0; ‘b01=Mode 1;
‘b10=Mode 2; ‘b11=Mode 3 One-Shot
1: Data Ready to Read, sets INT active

1 DATA_RDY 0 R/W if interrupt is enabled.
Can be polled if not using INT.
0 RSVD 0 R Reserved; Unused

Figure 25:
Integration Time Register
Addr: 0x05/0x85 INT_T
Integration time =
7:0 INT_T 0xFF R/W
<value> * 2.8ms
Figure 26:
Device Temperature Register
Addr: 0x06 Device_Temp
Device temperature
7:0 Device_Temp R
data byte (°C)
Figure 27:
LED Control Register
Addr: 0x07/0x87 LED Control
7:6 RSVD 0 R Reserved
LED_DRV current limit

5:4 ICL_DRV 00 R/W ‘b00=12.5mA; ‘b01=25mA;
‘b10=50mA; ‘b11=100mA
Enable LED_DRV
3 LED_DRV 0 R/W
1: Enabled; 0: Disabled
LED_IND current limit

2:1 ICL_IND 00 R/W ‘b00=1mA; ‘b01=2mA; ‘b10=4mA;
‘b11=8mA
Enable LED_IND
0 LED_IND 0 R/W
1: Enabled; 0: Disabled

Figure 28:
Sensor Raw Data Registers
Addr: 0x08 R_High
7:0 R_High R Channel R High Data Byte
Addr: 0x09 R_Low
7:0 R_Low R Channel R Low Data Byte
Addr: 0x0A S_High
7:0 S_High R Channel S High Data Byte
Addr: 0x0B S_Low
7:0 S_Low R Channel S Low Data Byte
Addr: 0x0C T_High
7:0 T_High R Channel T High Data Byte
Addr: 0x0D T_Low
7:0 T_Low R Channel T Low Data Byte
Addr: 0x0E U_High
7:0 U_High R Channel U High Data Byte
Addr: 0x0F U_Low
7:0 U_Low R Channel U Low Data Byte

Addr: 0x10 V_High
7:0 V_High R Channel V High Data Byte
Addr: 0x11 V_Low
7:0 V_Low R Channel V Low Data Byte
Addr: 0x12 W_High
7:0 W_High R Channel W High Data Byte
Addr: 0x13 W_Low
7:0 W_Low R Channel W Low Data Byte
Figure 29:
Sensor Calibrated Data Registers
Addr: 0x14:0x17 R_Cal
31:0 R_Cal R Channel R Calibrated Data (float)
Addr: 0x18:0x1B S_Cal
31:0 S_Cal R Channel S Calibrated Data (float)
Addr: 0x1C:0x1F T_Cal
31:0 T_Cal R Channel T Calibrated Data (float)
Addr: 0x20:0x23 U_Cal
31:0 U_Cal R Channel U Calibrated Data (float)

Addr: 0x24:0x27 V_Cal
31:0 V_Cal R Channel V Calibrated Data (float)
Addr: 0x28:0x2B W_Cal
31:0 W_Cal R Channel W Calibrated Data (float)
4-Byte Floating-Point (FP) Registers

Several 4-byte registers (hex) are shown in the tables. Here is
an example of how the registers are used to represent floating
point data (based on the IEEE 754 standard):
Figure 30:
Example of the IEEE 754 Standard
The floating point (FP) value assumed by 32 bit binary32 data

with a biased exponent e (the 8 bit unsigned integer) and a 23
bit fraction is (for the above example).
23
 
sign  –i  ( e – 127 )
FPvalue = ( – 1 )  1 +  ( b 23 – i ) ( 2 ) x2
 i=1 
23
 
FPvalue = ( – 1 )  1 +  ( b 23 – i ) ( 2 ) x2
0 –i ( 124 – 127 )
 i=1 

–2 ( –3 )
FPvalue = ( 1 )x ( 1 + 2 )x2 = 0.15625
UART Interface
If selected by the I2C_ENB pin setting, the UART module imple-
ments the TX and RX signals as defined in the RS-232 / V.24
standard communication protocol.
It has on both, receive and transmit path, a 16 entry deep FIFO.
It can generate interrupts as required.
UART Feature List 1

• Full Duplex Operation (Independent Serial Receive and
Transmit Registers) with FIFO buffer of 8 byte for each.
• At a clock rate of 16MHz it supports communication at
115200Baud.
• Supports Serial Frames with 8 Data Bits, 1 Parity Bit and 1
Stop Bit.
• High Resolution Baud Rate Generator.
Theory of Operation
Transmission
If data is available in the transmit FIFO, it will be moved into the
output shift register and the data will be transmitted at the
configured Baud Rate, starting with a Start Bit (logic zero) and
followed by a Stop Bit (logic one).
Reception
At any time, with the receiver being idle, if a falling edge of a
start bit is detected on the input, a byte will be received and
stored in the receive FIFO. The following Stop Bit will be checked
to be logic one.
1. With UART operation, min VDD of 2.97V is required as shown in Electrical Characteristics Figures.

Figure 31:
UART Protocol
Data Bits
TX D0 D1 D2 D3 D4 D5 D6 D7 P D0
Start Bit Parity Bit Stop Bit Next Start

Tbit=1/Baude Rate
Always Low Even or odd Always High
RX D0 D1 D2 D3 D4 D5 D6 D7 P D0
Start Bit detected

After Tbit/2: Sampling of Start Bit
After Tbit: Sampling of Data
Sample Points
AT Command Interface
The microprocessor interface to control the NIR Spectral_ID
Sensor is via the UART, using the AT Commands across the UART
interface.
The 6-channel Spectral _ID sensor provides a text-based serial
command interface borrowed from the “AT Command” model
used in early Hayes modems.
For example:
• Read DATA value: ATDATA → <data>OK
• Set the gain of the sensor to 1x: ATGAIN =0 → OK
The “AT Command Interface Block Diagram”, shown below be-
tween the network interface and the core of the system, pro-
vides access to the Spectral_ID engine’s control and configura-
tion functions.
Figure 32:
AT Command Interface Block Diagram
RX
AT Commands AT
Spectral_ID
uP Command
Engine
TX Interface
AT Command Interface
AS726x

In the Figure below, numeric values may be specified with no

leading prefix, in which case they will be interpreted as
decimals, or with a leading “0x” to indicate that they are
hexadecimal numbers, or with a leading “‘b” to indicate that
they are binary numbers. The commands are loosely grouped
into functional areas. Texts appearing between angle brackets
(‘<‘ and ‘>‘) are commands or response arguments. A carriage
return character, a linefeed character, or both may terminate
commands and responses. Note that any command that
encounters an error will generate the “ERROR” response shown,
for example, in the NOP command at the top of the first table,
but has been omitted elsewhere in the interest of readability
and clarity.
Figure 33:
AT Commands
Command Response Description / Parameters
Spectral Data per Channel
<R_value>,
<S_value>,
<T_value>, Read R, S, T, U, V & W data. Returns comma-separated 16-bit
ATDATA
<U_value>, integers.
<V_value>,
<W_value> OK
<Cal_R_value>,
<Cal_S_value>,
<Cal_T_value>, Read calibrated R, S, T, U, V & W data. Returns comma-separated
ATCDATA
<Cal_U_value>, 32-bit floating point values.
<Cal_V_value>,
<Cal_W_value> OK
Sensor Configuration
Set sensor integration time. Values should be in the range [1...

ATINTTIME=<value> OK 255], with
integration time = <value> * 2.8ms.
Read sensor integration time, with

ATINTTIME <value> OK
integration time = <value> * 2.8ms.
ATGAIN=<value> OK Set sensor gain: 0=1X, 1=3.7x, 2=16x, 3=64x
Read sensor gain setting, returning 0, 1, 2, or 3 as defined

ATGAIN <value>OK
immediately above.
ATTEMP <value>OK Read temperature of chip in degree Celsius

Command Response Description / Parameters
Set Sensor Mode

0 = BANK Mode 0;
1 = BANK Mode 1;
2 = BANK Mode 2;
ATTCSMD=<value> OK
3 = BANK Mode 3 One-Shot;
4 = Sensors OFF
In One-Shot mode, each ATTCSMD=3 command triggers a
One-Shot reading
ATTCSMD <value> OK Read Sensor Mode, see above
<value>= # of samples
ATBURST=<value> OK (ATBURST=1 means run until ATBURST=0 is received (a special
case for continuous output)
LED Driver Controls
ATLED0=<value> OK Sets LED_IND: 100=ON, 0=OFF
ATLED0 <100|0>OK Reads LED_IND setting: 100=ON, 0=OFF
ATLED1=<value> OK Sets LED_DRV: 100=ON, 0=OFF
ATLED1 <100|0>OK Reads LED_DRV setting: 100=ON, 0=OFF
Sets LED_IND and LED_DRV current

LED_IND: bits 3:0; LED_DRV: 7:4 bits
ATLEDC=<value> OK
LED_IND: ‘b00=1mA; ‘b01=2mA; ‘b10=4mA; ‘b11=8ma
LED_DRV: ‘b00=12.5mA; ‘b01=25mA; ‘b10=50mA; ‘b11=100mA
ATLEDC <value>OK Reads LED_IND and LED_DRV current settings as shown above
NOP, Version Access, System Reset
OK → Success
AT NOP
ERROR → Failure
ATRST None Software Reset – no response
<SWversion#>→OK
ATVERSW Returns the system software version number
ERROR → Failure
Returns the system hardware revision and product ID, with bits
<HWversion#>→ OK
ATVERHW 7:4 containing the part ID, and bits 3:0 yielding the chip revision
ERROR → Failure
value.
Firmware Update
<value>= 16-bit checksum. Initial the firmware update process.

ATFWU=<value> OK
Bytes that follow is always 56k bytes
Download new firmware

Up to 7 Bytes represented as hex chars with no leading or
ATFW=<value> OK
trailing 0x.
Repeat command till all 56k bytes of firmware are downloaded
Causes the active image to switch between the two possible

ATFWS OK
current images and then resets the IC

AS7263 − Application Information
Application Information
Figure 34:
AS7263 Typical Application Circuit
3V3
3V3
17 VDD1 CSN_SD 7 1uF
8
VCC
100nF 10uF 14 VDD2 CSN_EE 6 1 /CS
10K
RST
2 RESN MISO 5 2 DO
16 GND MOSI 4 5 DI
Flash
3V3 Vled Memory
SCK 3 6 CLK
15 LED_DRV AS7263 I2C_ENB 8 3 /WP
GND
18 LED_IND 7 /HOLD
DNP
4
RX
11 RX/SCL_S NC 19
NC 20 0R
TX
12 TX/SDA_S NC 1
NC 10
INT
13 INT NC 9

AS7263 − Package Drawings & Markings
Package Drawings & Markings
Figure 35:
Package Drawing LGA
RoHS
Green
Note(s):
1. XXXXX = tracecode

AS7263 − PCB Pad Layout
PCB Pad Layout Suggested PCB pad layout guidelines for the LGA device are
shown.
Figure 36:
Recommended PCB Pad Layout
0.30
Unit: mm 0.65
1.10
1
4.60
4.40

AS7263 − Mechanical Data
Mechanical Data
Figure 37:
Tape & Reel Information
Note(s):
1. Each reel contains 2000 parts.
2. Measured from centreline of sprocket hole to centreline of pocket.
3. Cumulative tolerance of 10 sprocket holes is ±0.20.
4. Other material available.
5. All dimensions in millimeters unless otherwise stated.

AS7263 − Storage & Soldering Information
Storage & Soldering

Information
Soldering Information
The module has been tested and has demonstrated an ability
to be reflow soldered to a PCB substrate. The solder reflow
profile describes the expected maximum heat exposure of
components during the solder reflow process of product on a
PCB. Temperature is measured on top of component. The
components should be limited to a maximum of three passes
through this solder reflow profile.
Figure 38:
Solder Reflow Profile
Parameter Reference Device
Average temperature gradient in preheating 2.5°C/s
Soak time tsoak 2 to 3 minutes
Time above 217°C t1 Max 60 s
Time above 230°C t2 Max 50 s
Time above Tpeak -10°C t3 Max 10 s
Peak temperature in reflow Tpeak 260° C
Temperature gradient in cooling Max -5°C/s
Figure 39:
Solder Reflow Profile Graph
Not to scale — for reference only

Tpeak
T3
T2
T1
Temperature (5C)
Time (s) t3
t2
tsoak t1
Note(s):
1. Not to scale - for reference only.

Manufacturing Process Considerations

The AS7263 package is compatible with standard reflow
no-clean and cleaning processes including aqueous, solvent or
ultrasonic techniques. However, as an open-aperture device,
precautions must be taken to avoid particulate or solvent
contamination as a result of any manufacturing processes,
including pick and place, reflow, cleaning, integration assembly
and/or testing. Temporary covering of the aperture is allowed.
To avoid degradation of accuracy or performance in the end
product, care should be taken that any temporary covering and
associated sealants/debris are thoroughly removed prior to any
optical testing or final packaging.
Storage Information
Moisture Sensitivity
Optical characteristics of the device can be adversely affected
during the soldering process by the release and vaporization of
moisture that has been previously absorbed into the package.
To ensure the package contains the smallest amount of
absorbed moisture possible, each device is baked prior to being
dry packed for shipping.
Devices are dry packed in a sealed aluminized envelope called
a moisture-barrier bag with silica gel to protect them from
ambient moisture during shipping, handling, and storage
before use.
Shelf Life
The calculated shelf life of the device in an unopened moisture
barrier bag is 12 months from the date code on the bag when
stored under the following conditions:
• Shelf Life: 12 months
• Ambient Temperature: <40°C
• Relative Humidity: <90%
Rebaking of the devices will be required if the devices exceed
the 12 month shelf life or the Humidity Indicator Card shows
that the devices were exposed to conditions beyond the
allowable moisture region.

Floor Life
The module has been assigned a moisture sensitivity level of
MSL 3. As a result, the floor life of devices removed from the
moisture barrier bag is 168 hours from the time the bag was
opened, provided that the devices are stored under the
following conditions:
• Floor Life: 168 hours
• Ambient Temperature: <30°C
• Relative Humidity: <60%
If the floor life or the temperature/humidity conditions have
been exceeded, the devices must be rebaked prior to solder
reflow or dry packing.
Rebaking Instructions
When the shelf life or floor life limits have been exceeded,
rebake at 50°C for 12 hours.

AS7263 − Ordering & Contact Information
Ordering & Contact Information

Figure 40:
Ordering Information (1) (2)
Ordering Delivery Delivery

Package Marking Description
Code Form Quantity
6-Channel NIR Spectral_ID

AS7263-BLGT 20-pin LGA AS7263 Device with Electronic Tape & Reel 2000 pcs/reel
Shutter & Smart Interface
Note(s):
1. Required companion serial flash memory (must be ams verified) is ordered from the flash memory supplier (e.g. AT25SF041-SSHD-B
from Adesto Technologies)
2. AS7263 flash memory software is available from ams.
Online product information is available at

www.ams.com/AS7263
Buy our products or get free samples online at:
www.ams.com/ICdirect
Technical Support is available at:
www.ams.com/Technical-Support
Provide feedback about this document at:
www.ams.com/Document-Feedback
For further information and requests, e-mail us at:
[email protected]
For sales offices, distributors and representatives, please visit:
www.ams.com/contact
Headquarters
ams AG
Tobelbader Strasse 30
8141 Premstaetten
Austria, Europe
Tel: +43 (0) 3136 500 0

Website: www.ams.com

AS7263 − RoHS Compliant & ams Green Statement
RoHS Compliant & ams Green RoHS: The term RoHS compliant means that ams AG products
fully comply with current RoHS directives. Our semiconductor
Statement products do not contain any chemicals for all 6 substance
categories, including the requirement that lead not exceed
0.1% by weight in homogeneous materials. Where designed to
be soldered at high temperatures, RoHS compliant products are
suitable for use in specified lead-free processes.
ams Green (RoHS compliant and no Sb/Br): ams Green
defines that in addition to RoHS compliance, our products are
free of Bromine (Br) and Antimony (Sb) based flame retardants
(Br or Sb do not exceed 0.1% by weight in homogeneous
material).
Important Information: The information provided in this
statement represents ams AG knowledge and belief as of the
date that it is provided. ams AG bases its knowledge and belief
on information provided by third parties, and makes no
representation or warranty as to the accuracy of such
information. Efforts are underway to better integrate
information from third parties. ams AG has taken and continues
to take reasonable steps to provide representative and accurate
information but may not have conducted destructive testing or
chemical analysis on incoming materials and chemicals. ams AG
and ams AG suppliers consider certain information to be
proprietary, and thus CAS numbers and other limited
information may not be available for release.

AS7263 − Copyrights & Disclaimer
Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten,
Austria-Europe. Trademarks Registered. All rights reserved. The
material herein may not be reproduced, adapted, merged,
translated, stored, or used without the prior written consent of
the copyright owner.
Devices sold by ams AG are covered by the warranty and patent
indemnification provisions appearing in its General Terms of
Trade. ams AG makes no warranty, express, statutory, implied,
or by description regarding the information set forth herein.
ams AG reserves the right to change specifications and prices
at any time and without notice. Therefore, prior to designing
this product into a system, it is necessary to check with ams AG
for current information. This product is intended for use in
commercial applications. Applications requiring extended
temperature range, unusual environmental requirements, or
high reliability applications, such as military, medical
life-support or life-sustaining equipment are specifically not
recommended without additional processing by ams AG for
each application. This product is provided by ams AG “AS IS”
and any express or implied warranties, including, but not
limited to the implied warranties of merchantability and fitness
for a particular purpose are disclaimed.
ams AG shall not be liable to recipient or any third party for any
damages, including but not limited to personal injury, property
damage, loss of profits, loss of use, interruption of business or
indirect, special, incidental or consequential damages, of any
kind, in connection with or arising out of the furnishing,
performance or use of the technical data herein. No obligation
or liability to recipient or any third party shall arise or flow out
of ams AG rendering of technical or other services.

AS7263 − Document Status
Document Status
Document Status Product Status Definition
Information in this datasheet is based on product ideas in

the planning phase of development. All specifications are
Product Preview Pre-Development
design goals without any warranty and are subject to
change without notice
Information in this datasheet is based on products in the

design, validation or qualification phase of development.
Preliminary Datasheet Pre-Production The performance and parameters shown in this document
are preliminary without any warranty and are subject to
change without notice
Information in this datasheet is based on products in

ramp-up to full production or full production which
Datasheet Production conform to specifications in accordance with the terms of
ams AG standard warranty as given in the General Terms of
Trade
Information in this datasheet is based on products which

conform to specifications in accordance with the terms of
Datasheet (discontinued) Discontinued ams AG standard warranty as given in the General Terms of
Trade, but these products have been superseded and
should not be used for new designs

AS7263 − Revision Information
Revision Information
Changes from 0-90 (2016-Nov-04) to current revision 1-00 (2016-Nov-25) Page
Initial production version for release
Completely revised version
Note(s):
1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision.
2. Correction of typographical errors is not explicitly mentioned.

AS7263 − Content Guide
Content Guide 1 General Description

1 Key Benefits & Features
2 Applications
2 Block Diagram
3 Pin Assignment
5 Absolute Maximum Ratings
6 Electrical Characteristics
8 Timing Characteristics
11 Optical Characteristics
12 Typical Operating Characteristics
13 Detailed Description
13 6-Channel NIR Spectral_ID Detector
14 Data Conversion Description
15 RC Oscillator
16 Temperature Sensor
16 Reset
16 Indicator LED
16 Electronic Shutter with LED_DRV Driver Control
17 Interrupt Operation
17 I²C Slave Interface
17 I²C Feature List
18 I²C Virtual Register Write Access
20 I²C Virtual Register Read Access
21 I²C Virtual Register Set
22 Detailed Register Description
27 4-Byte Floating-Point (FP) Registers
28 UART Interface
28 UART Feature List
28 Theory of Operation
28 Transmission
28 Reception
29 AT Command Interface
32 Application Information
33 Package Drawings & Markings
34 PCB Pad Layout
35 Mechanical Data
36 Storage & Soldering Information

36 Soldering Information
37 Manufacturing Process Considerations
37 Storage Information
37 Moisture Sensitivity
37 Shelf Life
38 Floor Life
38 Rebaking Instructions
39 Ordering & Contact Information

AS7263 − Content Guide
40 RoHS Compliant & ams Green Statement

41 Copyrights & Disclaimer
42 Document Status
43 Revision Information


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AS7263

6-Channel NIR Spectral_ID Device with

General Description The AS7263 is a digital 6-channel spectrometer for spectral

Key Benefits & Features

• 6 near-IR channels: 610nm, 680nm, 730nm, 760nm,

• Simple text-based command interface via UART,

• Lifetime-calibrated sensing with no drift over

• No additional signal conditioning required • 16-bit ADC with digital access

• Electronic shutter control/synchronization • Programmable LED drivers

• Low voltage operation • 2.7V to 3.6V with I²C interface

• 20-pin LGA package 4.5mm x 4.7mm x 2.5mm,

ams Datasheet Page 1

Page 2 ams Datasheet

Pin Assignment The device pin assignments are described below.

Pin Number Pin Name Description

1 NF Not Functional. Do not connect.

2 RESN Reset, Active LOW

3 SCK SPI Serial Clock

4 MOSI SPI Master Out Slave In

5 MISO SPI Master In Slave Out

7 CSN_SD Chip Select for SD Card Interface, Active LOW

8 I2C_ENB Select UART (Low) or I²C (High) Operation

9 NF Not Functional. Do not connect.

10 NF Not Functional. Do not connect.

11 RX/SCL_S RX (UART) or SCL_S (I²C Slave) Depending on I²C_ENB

12 TX/SDA_S TX (UART) or SDA_S (I²C Slave) Depending on I²C_ENB

13 INT Interrupt, Active LOW

14 VDD2 Voltage Supply

ams Datasheet Page 3

Pin Number Pin Name Description

15 LED_DRV LED Driver Output for Driving LED, Current Sink

17 VDD1 Voltage Supply

18 LED_IND LED Driver Output for Indicator LED, Current Sink

19 NF Not Functional. Do not connect.

20 NF Not Functional. Do not connect.

Page 4 ams Datasheet

Symbol Parameter Min Max Units Comments

VDD1_MAX Supply Voltage VDD1 -0.3 5 V Pin VDD1 to GND

VDD2_MAX Supply Voltage VDD2 -0.3 5 V Pin VDD2 to GND

Temperature Ranges and Storage Conditions

Moisture Sensitivity Maximum floor life time of

ams Datasheet Page 5

Symbol Parameter Conditions Min Typ Max Unit

General Operating Conditions

TAMB Operating Temperature -40 25 85 °C

IVDD Operating Current 5 mA

ISTANDBY(1) Standby Current 12 μA

tJITTER(2) Internal Clock Jitter @25°C 1.2 ns

Absolute Accuracy of the

IIND LED Current 1 4 8 mA

IACC Accuracy of Current -30 30 %

ILED1 LED Current 12.5, 25, 50 or 100 12.5 100 mA

IACC Accuracy of Current -10 10 %

Page 6 ams Datasheet

Symbol Parameter Conditions Min Typ Max Unit

Digital Inputs and Outputs

IIH, IIL Logic Input Current Vin=0V or VDD -1 1 μA

Logic Input Current (RESN

VOL CMOS Logic Low Output I=1mA 0.4 V