Digital System Design

Course code: EEE344

Prerequisites:

EEE 241, CSC 141

Co-requisites:

None

Course Catalog Description:

This course (EEE344) introduces the student to the design of digital logic circuits, both combinational
and sequential, and the design of digital systems. The student is also introduced to the use of computer-
aided design tools to develop complex digital circuits. The behavioral level design of a digital system is
often performed using hardware description languages (HDLs) such as Verilog.

Students taking this course will learn how to use Verilog to describe behavior and functionalities of any
complex digital systems. The gate level implementation of a digital system is mapped to a Field
programmable gate array (FPGA) device for verification. Therefore, students will go through the entire
design process of describing hardware using software languages, mapping it into gates and simulating the
gate level design, and finally load the schematic design on to a silicon chip to verify the functionality of
the system in hardware.

Text book:

1. FPGA prototyping by Verilog examples Xilinx spartantm-3 version by Pong P. Chu, John Wiley &
sons.

Recommended Text(s)/Reference Books:

1. Advanced Digital Design with Verilog HDL by Michael D. Ciletti, Prentice Hall Publisher.
2. Verilog HDL-A guide to digital design and synthesis by Samir Palnitkar, Prentice Hall Publisher.
3. Digital Design of Signal Processing Systems by Shoab A. Khan

Course Learning Objectives:

1. Ability to use computer-aided design tools for design of complex digital logic circuits.

2. Ability to model, simulate, verify, and synthesize with hardware description languages.

3. Ability to design and prototype with programmable logic.

Course Learning Outcomes:

After successfully completing the course, the students will be able to:

1. Design Combinational and Sequential logic circuits.

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2. Construct the model of a state machine and apply them on real world scenarios.
3. Evaluate digital circuits for computational intensive problems.
4. Relate and design real world applications in digital domain.
5. Translate designed digital circuits in to Hardware Descriptive Language.
6. Apply digital techniques to meet the performance requirement of a certain application.

Course Schedule:

3 credit hours / week

One laboratory session / week (3 hours / session)

Course Outline:

Week 01  Introduction to digital system design , Hardware description languages,

Verilog HDL
Week 02  Introduction to logic design with Verilog HDL, structural models of
combinational logic
Week 03  Logic simulation, Design verification and test methodology, Propagation
delay.
Week 04  Design, analysis and testing of adder circuits. Ripple carry adder, Carry look
ahead adder.
Week 05  Carry select adder, Conditional sum adder. Comparison on the basis of
speed and area.
Week 06  Basic multiplier circuit. Partial product reduction techniques for
multipliers. Carry save, Dual carry save and Wallace tree reduction
techniques.
Week 07  Dada tree reduction technique. String property, Modified booth recoding
algorithm.
Week 08  Number system, Floating point and fixed point formats, Addition and
multiplication in Qn.m format. Bit growth in fixed point arithmetic. Overview of
FPGA and EDA software.
Week 09  Introduction to FSM, FSM representation, FSM code development.

Week 10  Design examples for FSM, Rising edge detector, Mealy, Moore based design,
Direct implementation and comparison.
Week 11  Design examples contd…. Bouncing circuit and testing circuit

Week 12  Introduction to FSMD, ASMD chart, Code development of an FSMD

Week 13  Design examples.

Week 14  Selected topics of Verilog HDL, Blocking versus non blocking assignments,
Alternating coding style for sequential circuit, Use of sign data type, Use of
function is synthesis
Week 15  Design and implementation of a very simple CPU.

Week 16  Design verification.

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 Assessment Plan:

Theory Quizzes(4) 15%

Homework assignments 10%
2 Sessional exams (in class, 60-80 minutes each, 10%+15%) 25%
Terminal exam (3 hours) 50%
Total (theory) 100%
Lab work Lab reports (12) 25%
2 Lab sessional 25%
Lab project and terminal exam 50%
Total (lab) 100%
Final marks Theory marks * 0.75 + Lab marks * 0.25

Learning Outcomes Assessment plan

Sr. # Course Learning Outcomes Assessment

1. 1, 2 Assignment No. 1
2. 1, 2 Quiz No. 1
3. 1, 2, 3 Sessional No. 1
4. 4 Assignment No. 2
5. 4 Quiz No. 2
6. 5 Assignment No. 3
7. 5 Quiz No. 3
8. 4, 5 Sessional No. 2
9. 6 Assignment No. 4
10. 6 Quiz No. 4
11. 1, 2, 3, 5, and 6 Terminal Examination
Table 1 - Assessment Plan for Learning Objectives

Computer Resources:

ModelSim and Xilinx are used for simulations, design and implementation and testing of digital circuits.

Laboratory Resources:

The Digital System Design and VLSI Lab Room Z226 in Z block supports this class with work benches
equipped with a range of FPGA boards including Spartan 3, Spartan 3E, Virtex-II, Virtex-II Pro and
Virtex- 4 .

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Mapping Course Learning Outcomes (CLOs) to Standard Program Outcomes
(SPOs):

Standard Program Outcomes:

a) An ability to apply knowledge of mathematics, science, and engineering
b) An ability to design and conduct experiments, as well as to analyze and interpret data
c) An ability to design a system, component, or process to meet desired needs within realistic
constraints such as economic, environmental, social, political, ethical, health and safety,
manufacturability, and sustainability
d) An ability to function on multidisciplinary teams
e) An ability to identify, formulate, and solve engineering problems
f) An understanding of professional and ethical responsibility
g) An ability to communicate effectively
h) The broad education necessary to understand the impact of engineering solutions in a global,
economic, environmental, and societal context
i) A recognition of the need for, and an ability to engage in life-long learning
j) A knowledge of contemporary issues
k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering
practice.

Table 2 – Course Learning Outcomes mapped to Standard Program Outcomes.

Standard Program Outcomes

a B c d e f g h i J K
1 X X X X X
Course Learning

2 X X X X X
3 X X X X X
Outcomes

4 X X X X X
5 X
6 X X X X X X X
To 6 5 5 0 5 1 1 0 0 0 5
tal
HIGH HIGH HIGH N/A HIGH LOW LOW N/A N/A N/A HIGH

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Outcome Coverage Explanation:
(a) An ability to apply knowledge of math, science and engineering. The student learn to model real
world problem in digital domain that need the basic knowledge of mathematic and engineering design
concepts. (High relevance to course)

(b) An ability to design and conduct experiments, as well as to analyze and interpret data. Student
becomes familiar with modelling and doing experiment in digital domain. Students are also eligible to
interpret the output data in specific formats. (High relevance to course)

(c) An ability to design a system, component, or process to meet desired needs within realistic
constraints such as economic, environmental, social, political, ethical, health and safety,
manufacturability, and sustainability: student become eligible to identify basic system component and
specific constraint and model the working solution. (High relevance to course)

(e) An ability to identify, formulate and solve engineering problems. The course shows the value of
theory, by making it possible for the students to solve relevant engineering problems, which form the
basis of more complex problems in power flow and analysis (High relevance to course)

(f) An understanding of professional and ethical responsibility: In the in introduction of the course
and during analysis and compilation of results, the students become capable to understand their moral and
ethical responsibility. During the presentations and preparation of presentation the students learn
engineering ethics (Low relevance to course)

(g) An ability to communicate effectively: The presentations of different assignments are designed in
such a way that communication ability is developed in students (Low relevance to course)

(k) An ability to use the techniques, skills, and modern engineering tools necessary for engineering
practice. : The students learn state of the art simulation tools and implementation platforms. The
students are eligible to complete the cycle from software to hardware implementation.

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 Annex I

List of Experiments