Data Sheet P2504BDG

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The document provides specifications for an N-Channel Logic Level Enhancement Mode Field Effect Transistor.

The absolute maximum ratings include a drain-source voltage of 40V, gate-source voltage of ±20V, drain current of 10A, and power dissipation of 32W.

The electrical characteristics include a drain-source breakdown voltage of 40V, gate threshold voltage of 1-3V, on-state drain current of 45A, and drain-source on-state resistance of 21-25mΩ.

NIKO-SEM N-Channel Logic Level Enhancement P2504BDG

Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK)


Lead-Free

D
PRODUCT SUMMARY
1. GATE
V(BR)DSS RDS(ON) ID
G 2. DRAIN
40V 25mΩ 12A 3. SOURCE

S
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNITS

Drain-Source Voltage VDS 40 V


Gate-Source Voltage VGS ±20 V
TC = 25 °C 12
Continuous Drain Current ID
TC = 100 °C 10
A
Pulsed Drain Current 1 IDM 45
TC = 25 °C 41
Power Dissipation PD W
TC = 100 °C 32
Operating Junction & Storage Temperature Range Tj, Tstg -55 to 150
°C
Lead Temperature (1/16” from case for 10 sec.) TL 275

THERMAL RESISTANCE RATINGS


THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNITS

Junction-to-Case RθJc 3 °C / W

Junction-to-Ambient RθJA 75 °C / W
1
Pulse width limited by maximum junction temperature.
Duty cycle ≤ 1%
2

ELECTRICAL CHARACTERISTICS (TC = 25 °C, Unless Otherwise Noted)


LIMITS
PARAMETER SYMBOL TEST CONDITIONS UNIT
MIN TYP MAX
STATIC

Drain-Source Breakdown Voltage V(BR)DSS VGS = 0V, ID = 250µA 40


V
Gate Threshold Voltage VGS(th) VDS = VGS, ID = 250µA 1 2.0 3.0
Gate-Body Leakage IGSS VDS = 0V, VGS = ±20V ±250 nA
VDS = 32V, VGS = 0V 1
Zero Gate Voltage Drain Current IDSS µA
VDS = 30V, VGS = 0V, TC = 125 °C 10

On-State Drain Current 1 ID(ON) VDS = 10V, VGS = 10V 45 A

Drain-Source On-State Resistance1 VGS = 4.5V, ID = 10A 35 45


RDS(ON) mΩ
VGS = 10V, ID = 12A 21 25

JAN-17-2005
1
NIKO-SEM N-Channel Logic Level Enhancement P2504BDG
Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK)
Lead-Free

Forward Transconductance1 gfs VDS = 10V, ID = 12A 18 S

DYNAMIC

Input Capacitance Ciss 760


Output Capacitance Coss VGS = 0V, VDS = 10V, f = 1MHz 165 pF

Reverse Transfer Capacitance Crss 55


2
Total Gate Charge Qg 16
Gate-Source Charge2 Qgs VDS = 0.5V (BR)DSS, VGS = 10V, 2.5 nC

Gate-Drain Charge2 Qgd ID = 12A 2.1


2
Turn-On Delay Time td(on) 2.1 4.2
2
Rise Time tr VDS = 20V, RL = 1Ω 7.2 14
nS
Turn-Off Delay Time2 td(off) ID ≅ 1A, VGS = 10V, RGEN = 6Ω 11.6 21.0

Fall Time2 tf 3.5 7.2

SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS (TC = 25 °C)

Continuous Current IS 12
A
Pulsed Current 3 ISM 40
Forward Voltage1 VSD IS = IS, VGS = 0V 1.2 V
Reverse Recovery Time trr IF = 5 A, dlF/dt = 100A / µS 14.5 nS
Reverse Recovery Charge Qrr 7.2 nC
1
Pulse test : Pulse Width ≤ 300 µsec, Duty Cycle ≤ 2%.
2
Independent of operating temperature.
3
Pulse width limited by maximum junction temperature.

REMARK: THE PRODUCT MARKED WITH “P2504BDG”, DATE CODE or LOT #


Orders for parts with Lead-Free plating can be placed using the PXXXXXXG parts name.

JAN-17-2005
2
NIKO-SEM N-Channel Logic Level Enhancement P2504BDG
Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK)
Lead-Free

Body Diode Forward Voltage Variation with Source Current and Temperature
100
V GS = 0V
T A = 125°C
10
Is - Reverse Drain Current(A)

25°C
1

0.1 -55°C

0.01

0.001
0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
VSD - Body Diode Forward Voltage(V)

JAN-17-2005
3
NIKO-SEM N-Channel Logic Level Enhancement P2504BDG
Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK)
Lead-Free

JAN-17-2005
4
NIKO-SEM N-Channel Logic Level Enhancement P2504BDG
Mode Field Effect Transistor ( Preliminary ) TO-252 (DPAK)
Lead-Free

TO-252 (DPAK) MECHANICAL DATA

mm mm
Dimension Dimension
Min. Typ. Max. Min. Typ. Max.

A 9.35 10.1 H 0.8

B 2.2 2.4 I 6.4 6.6

C 0.48 0.6 J 5.2 5.4

D 0.89 1.5 K 0.6 1

E 0.45 0.6 L 0.64 0.9

F 0.03 0.23 M 4.4 4.6

G 6 6.2 N

A
B

E
C

H G
L
XXXXXXXXX
NIKOS

M
J
I

JAN-17-2005
5

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