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Maj2-202-T102 - Key

The document is a 9-page exam for a digital logic design course. It contains 5 questions testing various concepts in digital logic including: [1] Boolean algebra, [2] designing a 3-bit decrementer circuit, [3] designing a 7-segment display driver, [4] binary arithmetic, and [5] implementing logic functions using decoders, multiplexers, and other basic gates. Students are instructed to show their work and identify any assumptions. The exam is out of a total of 100 points.

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0% found this document useful (0 votes)
146 views9 pages

Maj2-202-T102 - Key

The document is a 9-page exam for a digital logic design course. It contains 5 questions testing various concepts in digital logic including: [1] Boolean algebra, [2] designing a 3-bit decrementer circuit, [3] designing a 7-segment display driver, [4] binary arithmetic, and [5] implementing logic functions using decoders, multiplexers, and other basic gates. Students are instructed to show their work and identify any assumptions. The exam is out of a total of 100 points.

Uploaded by

mirzabaa
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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Page 1 of 9

King Fahd University of Petroleum and Minerals


College of Computer Science and Engineering
Computer Engineering Department

COE 202: Digital Logic Design (3-0-3)


Term 102 (Spring 2011)
Major Exam II
Thursday April 28, 2011

Time: 120 minutes, Total Pages: 9

Name:__KEY__________________________ ID:______________ Section: _______

Notes:
 Do not open the exam book until instructed
 Calculators are not allowed (basic, advanced, cell phones, etc.)
 Answer all questions
 All steps must be shown
 Any assumptions made must be clearly stated

Question Maximum Points Your Points


1 26
2 16
3 12
4 26
5 20
Total 100
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Question 1. (26 points)

(A). For the following Boolean function F(A, B, C, D)=m(0, 1, 2, 5, 6, 7, 8, 9, 10, 12, 13)

(i) Identify all the prime implicants and the essential prime implicants of F. (7+2=9 points)

(ii) Simplify the Boolean function F into a minimal sum-of-products expression. (5 points)
Page 3 of 9

(B) Consider the following Boolean function F together with the don`t care conditions d
F(A, B, C, D)=m(0, 2, 5, 8, 10), d(A, B, C, D)=m(1, 4, 7, 9, 11, 12, 14, 15)

(i) Simplify the Boolean function F together with the don`t care conditions d, into minimal sum-
of-products expression. (4 points)

(ii) Starting with the sum-of-products expression, implement the function using only NAND gates
and Inverters. (4 points)

(iii) Starting with the sum-of-products expression, implement the function using only NOR gates
and Inverters. (4 points)
Page 4 of 9
Question 2. (16 Points)

Design a 3-bit decrementer using only basic gates (AND, OR, and NOT). The circuit takes a 3-bit
unsigned number I=I2I1I0 as input and generates a 3-bit output number Z = Z2Z1Z0 and a Valid output
V. Whenever I > 0 the output Z = I-1 and V=1. If I=0, the output is invalid which is indicated by an
output V=0. Derive the simplified Boolean expressions of all outputs.
Page 5 of 9
Question 3. (12 Points)

driver

WX Y Z
It is required to design a 7-segment display driver whose input is a Hexadecimal digit such that the
resulting 7-seg display is as shown above (Note that HEX digits larger than 9 are displayed as A  A,
B  b, C  C, D  d, E  E, F  F). The driver circuit should generate the 7-segment control
signals (a to g).
If a single decoder and number of OR gates are used to build this driver circuit;
a. What is the minimum size of the decoder? (3 points)
b. What is the minimum a number of OR gates required to build the 7-segment display driver
circuit (3 points)
c. Draw the block diagram of the circuit showing in details how the control signals g and c are
generated. (6 points)
Page 6 of 9

Question 4. (26 Points)


(A)
i. Determine the decimal value of the 7-bit binary number (1011010) when interpreted as:

ii. Represent the decimal value (- 21) in binary using a total of 7 bits in the following notations:

iii. Perform the following signed-2’s complement arithmetic operations in binary using 5 bits. All
numbers given are represented in the signed-2’s complement notation. Indicate clearly the carry values
from the last two stages. For each of the three operations, check and indicate whether overflow
occurred or not.
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(B) Consider the 2’s complement 4-


bit adder/subtractor hardware shown
(FA = full adder).
Page 8 of 9

Question 5. (20 Points)

(A) Given the function


F (A,B,C) = Π M (0,2,4,5,6)

i. Implement F using one (1) 3-to-8 decoder, and one (1) NOR gate. Properly label all input and output
lines.

ii. Implement F using two (2) 2-to-4 decoders with enable, one (1) inverter, and one (1) OR gate.
Properly label all input and output lines.
Page 9 of 9

(B) Given the function


F (A,B,C) =  m (1,3,7)

i. Implement F using an 8-to-1 MUX. Properly label all input and output lines.

ii. Implement F using a 4-to-1 MUX. Show how you obtained your solution, and properly label all
input and output lines.

OR

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