Semiconductor IRF540, IRF541, IRF542,

IRF543, RF1S540, RF1S540SM

25A and 28A, 80V and 100V, 0.077 and 0.100 Ohm,
November 1997 N-Channel Power MOSFETs

Features Description
• 25A and 28A, 80V and 100V These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
• rDS(ON) = 0.077Ω and 0.100Ω
MOSFETs designed, tested, and guaranteed to withstand a
• Single Pulse Avalanche Energy Rated specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
• Nanosecond Switching Speeds applications such as switching regulators, switching conver-
• Linear Transfer Characteristics tors, motor drivers, relay drivers, and drivers for high power
bipolar switching transistors requiring high speed and low
• High Input Impedance gate drive power. These types can be operated directly from
• Related Literature integrated circuits.
- TB334 “Guidelines for Soldering Surface Mount Formerly developmental type TA17421.
Components to PC Boards”

Ordering Information Symbol

PART NUMBER PACKAGE BRAND
D
IRF540 TO-220AB IRF540

IRF541 TO-220AB IRF541

IRF542 TO-220AB IRF542 G

IRF543 TO-220AB IRF543

S
RF1S540 TO-262AA RF1S540

RF1S540SM TO-263AB RF1S540SM

NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S540SM9A.

Packaging
JEDEC TO-220AB JEDEC TO-262AA

SOURCE SOURCE
DRAIN DRAIN
DRAIN
GATE GATE
(FLANGE)

DRAIN (FLANGE)

JEDEC TO-263AB

DRAIN
(FLANGE)
GATE
SOURCE

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper ESD Handling Procedures. File Number 2309.3
Copyright © Harris Corporation 1997
5-1
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified

IRF540, RF1S540,
RF1S540SM IRF541 IRF542 IRF543 UNITS
Drain to Source Breakdown Voltage (Note 1). . . . . . . . . .VDS 100 80 100 80 V
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . VDGR 100 80 100 80 V
Continuous Drain Current. . . . . . . . . . . . . . . . . . . . . . . . . . ID 28 28 25 25 A
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID 20 20 17 17 A
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . IDM 110 110 100 100 A
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . .VGS ±20 ±20 ±20 ±20 V
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . PD 150 150 150 150 W
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 1 W/oC
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . EAS 230 230 230 230 mJ
Operating and Storage Temperature . . . . . . . . . . . . TJ, TSTG -55 to 175 -55 to 175 -55 to 175 -55 to 175 oC

Maximum Temperature for Soldering

Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . TL 300 300 300 300 oC
Package Body for 10s, See Techbrief 334 . . . . . . . . . Tpkg 260 260 260 260 oC

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to TJ = 150oC.

Electrical Specifications TC = 25oC, Unless Otherwise Specified

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Drain to Source Breakdown Voltage BVDSS ID = 250µA, VGS = 0V (Figure 10)

IRF540, IRF542, 100 - - V
RF1S540, RF1S540SM

IRF541, IRF543 80 - - V

Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA 2 - 4 V

Zero Gate Voltage Drain Current IDSS VDS = Rated BVDSS, VGS = 0V - - 25 µA

VDS = 0.8 x Rated BVDSS, VGS = 0V - - 250 µA

TJ = 150oC

On-State Drain Current (Note 2) ID(ON) VDS > ID(ON) x rDS(ON) MAX, VGS = 10V
IRF540, IRF541, (Figure 7) 28 - - A
RF1S540, RF1S540SM

IRF542, IRF543 25 - - A
Gate to Source Leakage Current IGSS VGS = ±20V - - ±100 nA

Drain to Source On Resistance (Note 2) rDS(ON) ID = 17A, VGS = 10V (Figures 8, 9)

IRF540, IRF541, - 0.060 0.077 Ω
RF1S540, RF1S540SM

IRF542, IRF543 - 0.080 0.100 Ω

Forward Transconductance (Note 2) gfs VDS ≥ 50V, ID = 17A (Figure 12) 8.7 13 - S

Turn-On Delay Time td(ON) VDD = 50V, ID ≈ 28A, RG ≈ 9.1Ω, RL = 1.7Ω - 15 23 ns

(Figures 17, 18) MOSFET Switching Times are
Rise Time tr - 70 110 ns
Essentially Independent of Operating
Turn-Off Delay Time td(OFF) Temperature - 40 60 ns

Fall Time tf - 50 75 ns

Total Gate Charge Qg(TOT) VGS = 10V, ID = 28A, VDS = 0.8 x Rated - 38 59 nC
(Gate to Source + Gate to Drain) BVDSS , Ig(REF) = 1.5mA (Figures 14, 19, 20)
Gate Charge is Essentially Independent of Op-
Gate to Source Charge Qgs - 8 - nC
erating Temperature
Gate to Drain “Miller” Charge Qgd - 21 - nC

5-2
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Electrical Specifications TC = 25oC, Unless Otherwise Specified (Continued)

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Input Capacitance CISS VDS = 25V, VGS = 0V, f = 1MHz - 1450 - pF
(Figure 11)
Output Capacitance COSS - 550 - pF

Reverse Transfer Capacitance CRSS - 100 - pF

Internal Drain Inductance LD Measured From the Modified MOSFET - 3.5 - nH

Contact Screw on Tab Symbol Showing the
To Center of Die Internal Devices
Inductances
Measured From the D - 4.5 - nH
Drain Lead, 6mm
(0.25in) from Package to LD
Center of Die
G
Internal Source Inductance LS Measured From the - 7.5 - nH
LS
Source Lead, 6mm
(0.25in) From Header to S
Source Bonding Pad

Thermal Resistance Junction to Case RθJC - - 1 oC/W

Thermal Resistance RθJA Free Air Operation - - 80 oC/W

Junction to Ambient oC/W
RθJA RF1S540SM Mounted on FR-4 Board with - - 62
Minimum Mounting Pad

Source to Drain Diode Specifications

PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS

Continuous Source to Drain Current ISD Modified MOSFET Sym- - - 28 A

bol Showing the Integral D
Pulse Source to Drain Current ISDM Reverse - - 110 A
(Note 3) P-N Junction Diode
G

Source to Drain Diode Voltage (Note 2) VSD TJ = 25oC, ISD = 27A, VGS = 0V (Figure 13) - - 2.5 V

Reverse Recovery Time trr TJ = 25oC, ISD = 28A, dISD/dt = 100A/µs 70 150 300 ns

Reverse Recovery Charge QRR TJ = 25oC, ISD = 28A, dISD/dt = 100A/µs 0.44 1.0 1.9 µC

NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 25V, starting TJ = 25oC, L = 440µH, RG = 25Ω, peak IAS = 28A. (Figures 15, 16).

5-3
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Typical Performance Curves Unless Otherwise Specified

1.2 30
POWER DISSIPATION MULTIPLIER

1.0 24

ID, DRAIN CURRENT (A)

IRF540, IRF541
0.8 RF1S540, RF1S540SM
18

0.6 IRF542, IRF543

12
0.4

6
0.2

0
0
0 25 50 75 100 125 150 175 25 50 75 100 125 150 175
TC , CASE TEMPERATURE (oC) TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
TEMPERATURE CASE TEMPERATURE

10
THERMAL IMPEDANCE (oC/W)
ZθJC, TRANSIENT

0.5

0.2 PDM

0.1 0.1
0.05 t1
t2
0.02 NOTES:
0.01 DUTY FACTOR: D = t1/t2
SINGLE PULSE PEAK TJ = PDM x ZθJC + TC
0.01
10-5 10-4 10-3 10-2 10-1 1 10
t1, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

IRF540, 1, RF1S540, SM TC = 25oC 80µs PULSE TEST

100 10µs
IRF542, 3 50
ID, DRAIN CURRENT (A)

VGS = 7V
ID, DRAIN CURRENT (A)

100µs VGS = 10V

IRF540, 1, RF1S540, SM 40 VGS = 8V

IRF542, 3
1ms 30 VGS = 6V
10

20
OPERATION IN THIS
RF1S540, SM

10ms
AREA MAY BE VGS = 5V
IRF540, 2

LIMITED BY rDS(ON)
10
TJ = MAX RATED DC
IRF541, 3 VGS = 4V
SINGLE PULSE
0
1 1 10 100 0 12 24 36 48 60
VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS

5-4
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Typical Performance Curves Unless Otherwise Specified (Continued)

50 100
80µs PULSE TEST 80µs PULSE TEST VDS ≥ 50V

ID(ON), ON-STATE DRAIN CURRENT (A)

VGS = 8V
DUTY CYCLE = 0.5% MAX
40 VGS = 7V
ID, DRAIN CURRENT (A)

VGS = 10V 10
30
VGS = 6V

20
175oC 25oC
1
VGS = 5V
10
VGS = 4V

0 0.1
0 1.0 2.0 3.0 4.0 5.0 0 2 4 6 8 10
VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V)

FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS

1.0 3.0
80µs PULSE DURATION NORMALIZED DRAIN TO SOURCE VGS = 10V, ID = 28A
rDS(ON), DRAIN TO SOURCE

0.8 2.4
ON RESISTANCE (Ω)

ON RESISTANCE

0.6 1.8

0.4 1.2

0.2 VGS = 10V 0.6

VGS = 20V
0 0.0
0 25 50 75 100 125 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
ID, DRAIN CURRENT (A) TJ , JUNCTION TEMPERATURE (oC)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE FIGURE 9. NORMALIZED DRAIN TO SOURCE ON

VOLTAGE AND DRAIN CURRENT RESISTANCE vs JUNCTION TEMPERATURE

1.25 3000
ID = 250µA VGS = 0V, f = 1MHz
NORMALIZED DRAIN TO SOURCE

CISS = CGS + CGD

1.15 2400 CRSS = CGD
COSS ≈ CDS + CGD
BREAKDOWN VOLTAGE

C, CAPACITANCE (pF)

1.05 1800
CISS

0.95 1200

COSS
0.85 600
CRSS

0.75 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180 1 10 100
TJ , JUNCTION TEMPERATURE (oC) VDS, DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
VOLTAGE vs JUNCTION TEMPERATURE

5-5
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Typical Performance Curves Unless Otherwise Specified (Continued)

20 1000
VDS ≥ 50V, 80µs PULSE TEST

ISD, SOURCE TO DRAIN CURRENT (A)

gfs, TRANSCONDUCTANCE (S)

16

25oC 100
12

175oC 175oC
8
25oC
10

0
1
0 10 20 30 40 50 0 0.6 1.2 1.8 2.4 3.0
ID , DRAIN CURRENT (A) VSD, SOURCE TO DRAIN VOLTAGE (V)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

20
ID = 28A
VGS, GATE TO SOURCE VOLTAGE (V)

VDS = 50V
16
VDS = 20V

12

VDS = 80V
8

0
0 12 24 36 48 60
Qg , TOTAL GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

5-6
 IRF540, IRF541, IRF542, IRF543, RF1S540, RF1S540SM

Test Circuits and Waveforms

VDS
BVDSS

L tP
VDS

VARY tP TO OBTAIN IAS

+ VDD
REQUIRED PEAK IAS RG
VDD
VGS -
DUT

tP
0V IAS
0
0.01Ω
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON tOFF

td(ON) td(OFF)

tr tf
RL VDS
90% 90%

+
VDD 10% 10%
RG 0
-
DUT 90%

VGS 50% 50%

PULSE WIDTH
VGS 10%
0

FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
CURRENT (ISOLATED
REGULATOR SUPPLY) VDD

Qg(TOT)
SAME TYPE VGS
12V AS DUT Qgd
0.2µF 50kΩ
BATTERY Qgs
0.3µF

D VDS

G DUT 0

Ig(REF) S
0 IG(REF)
VDS
IG CURRENT ID CURRENT
SAMPLING SAMPLING 0
RESISTOR RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS

5-7