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Computer Architecture: Madhu Mutyam

This document introduces a course on computer architecture. It will cover layered computer design, defining computer architecture in terms of functionality, organization and efficient implementation. It will also cover Flynn's classifications of computer architectures and the objectives of understanding fundamentals of computer architecture, superscalar processors, and multi-core processors. The syllabus and reference books are also listed.

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RameeshPaul
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172 views7 pages

Computer Architecture: Madhu Mutyam

This document introduces a course on computer architecture. It will cover layered computer design, defining computer architecture in terms of functionality, organization and efficient implementation. It will also cover Flynn's classifications of computer architectures and the objectives of understanding fundamentals of computer architecture, superscalar processors, and multi-core processors. The syllabus and reference books are also listed.

Uploaded by

RameeshPaul
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Computer Architecture

Introduction

Madhu Mutyam
PACE Laboratory
Department of Computer Science and Engineering
Indian Institute of Technology Madras
!
Layered Computer Design

Application Layer
Algorithm Designer +
Algorithm Layer
Programmer +
High-Level Language Layer
System Personnel +
Operating System Layer
Computer Architect +
Architecture Layer
Computer Designer +
Microarchitecture Layer
Logic Designer +
Logic Layer
Chip Designer +
Transistor Layer
!

Madhu Mutyam (IIT Madras) 1/7


Defining Computer Architecture

I Functionality – Instruction set architecture


I Organization – Microarchitecture
I Efficient Implementation
I Personal mobile devices – Energy efficiency, responsiveness
I Desktop computing – Price-performance
I Servers – Availability, scalability, throughput
I Embedded computers – Price

Madhu Mutyam (IIT Madras) 2/7


Flynn’s Classification of Computer Architectures

Instruction Pool SIMD Instruction Pool


SISD
PE

Data Pool
Data Pool

PE • Data-level parallelism
PE • Vector architectures
PE • Multimedia extensions
• Instruction-level parallelism
• Uniprocessor systems • GPUs
PE

MISD Instruction Pool Instruction Pool MIMD

PE PE

• Thread-level parallelism
Data Pool
Data Pool

PE PE • Tightly coupled MIMD


PE PE
• Request-level parallelism
PE PE • Loosely-coupled MIMD
• No commercial
• WSC
implementation PE PE

Madhu Mutyam (IIT Madras) 3/7


Course Objectives

I Understanding the fundamentals of computer architecture


I Understanding the design of superscalar processors
I Providing an overview on multi-core processors

Madhu Mutyam (IIT Madras) 4/7


Syllabus

I Instruction Set Principles (1 week)


I Memory Hierarchy Design (2 weeks)
I Fundamentals of Pipelining (1 week)
I Exploiting Instruction-Level Parallelism (2 weeks)
I Exploiting Thread-Level Parallelism (2 weeks)

Madhu Mutyam (IIT Madras) 5/7


Reference Books

I J.L. Hennessy and D.A. Patterson. Computer Architecture: A


Quantitative Approach. Morgan Kaufmann. 5th Edition, 2012.
I J.P. Shen and M.H. Lipasti. Modern Processor Design. Fundamentals of
Superscalar Processors. McGraw-Hill International, 2005.
I B. Jacob, N.G. Spencer, and D. Wang. Memory Systems: Cache,
DRAM, and Disk. Morgan Kaufmann, 2006.

Madhu Mutyam (IIT Madras) 6/7

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