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Assembly: Bits and Bytes The Binary Number System

1. The document discusses the basic components and concepts of computer hardware and architecture, including bits, bytes, binary numbering, registers, memory types, addressing schemes, and CPU components like ALU, control unit, and pipelines. 2. It explains key concepts like how bytes are formed from bits, binary and hexadecimal numbering, data types and sizes, memory types like RAM and ROM, and CPU components like registers, buses, caches and their functions. 3. The document provides information on computer hardware building blocks from the lowest level of bits and bytes up through memory, addressing, CPU architecture and pipelining.
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0% found this document useful (0 votes)
63 views4 pages

Assembly: Bits and Bytes The Binary Number System

1. The document discusses the basic components and concepts of computer hardware and architecture, including bits, bytes, binary numbering, registers, memory types, addressing schemes, and CPU components like ALU, control unit, and pipelines. 2. It explains key concepts like how bytes are formed from bits, binary and hexadecimal numbering, data types and sizes, memory types like RAM and ROM, and CPU components like registers, buses, caches and their functions. 3. The document provides information on computer hardware building blocks from the lowest level of bits and bytes up through memory, addressing, CPU architecture and pipelining.
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ASSEMBLY

Bits and Bytes The Binary Number System Bus - has wires attached to the system board that
connects the components
Bit - the fundamental building block of computer Binary - a base-2 numbering system - it transfer data between the processor, memory,
storage - contraction of “Binary digit” and external devices, in effect managing data
- may be off so that its values is considered 0, or it traffic
may be on so that its value is considered 1 Negative Binary Numbers
Positive – if leftmost bit is 0 Power Supply - converts the standard 220-volt
Byte - a group of nine related bits which represents a Negative – if leftmost bit is 1 alternating current into direct current with
storage location internally in memory and on Two’s Complement System - rule to represent a binary voltages reduced to the computer’s
external devices number as negative requirements, commonly rated about 300
- each byte consist of eight bits for data and one Hexadecimal (hex) - 16 digits watts
bit for parity - involves the “digits” 0 through F
Data - numeric (binary data used for arithmetic) Single-Stage Pipeline - used by processors up through
- alphanumeric (character and descriptive data) 80486 which restricts them to completing one
data bits parity
instruction before starting the next
Rule of parity:
ASCII - American Standard Code for Information
Pipelining
 The number of bits that are on in each byte must Interchange
always be odd - standardize the representation of data - involves the way a processor divides an
 If parity is even, the system assumes that a bit is instruction into sequential steps using different resources
“lost” and displays an error message PC Components
Execution Unit and Bus Interface Unit
Causes of parity error: System Board (Motherboard)
Two logical units of a processor:
 hardware fault - the main component of the PC
- contains the processor, coprocessors, main  Execution Unit (EU)- execute instructions
 electrical disturbance memory, connectors, and expansion slots for o Arithmetic Logic Unit (ALU)
Related Bytes optional cards
- arithmetic and logical operations
Data Item / Field - a group of bytes that defines a Slots and Connectors - provide access to such
o Control Unit (CU)
particular value components as read-only memory (ROM), random
o Registers
access memory (RAM), hard disk, CD-ROM drives,
Data Sizes:  Bus Interface Unit (BIU) - delivers data
additional main memory, video units, keyboard,
instructions and data to the EU
mouse, parallel and serial devices, sound
 Word = 2 bytes, 16 bits - manage the bus control unit, segment registers,
synthesizers, and cache memory
 Doubleword = 4 bytes, 32 bits and instruction queue
 Quadword = 8 bytes, 64 bits Cache - a high-speed memory used by the processor to Two types of internal memory:
 Paragraph = 16 bytes, 128 bits decrease its need to access the slower main
 Kilobyte (KB) = 210 = 1,024 memory
1. Random Access Memory (RAM)
 Megabyte (MB) = 220 = 1 megabyte - read-write memory
- available as a “worksheet” for temporary storage Segment Boundaries - 16 bits in size and contains the FS and GS Register - additional extra segment
and execution of programs starting address of a segment registers for handling storage requirements
- turning off the power erases the contents of RAM
but does not affect ROM Offset / Displacement - the distance in bytes from the Pointer Registers - 32-bit EIP, ESP, and EBP
segment address to another - 16-bit portions are IP, SP, and BP
2. Read-Only Memory (ROM) location within the segment Instruction Pointer (IP) Register
- consists of special memory chips that can only be - contains the offset address of the next
Registers - used to control instructions being instruction that is to execute
read
executed, to handle addressing of - associated with the CS register (as CS:IP) in that
- instructions and data are permanently “burned
memory, and to provide arithmetic IP indicates the current instruction within the
into” the chips, they cannot be altered
capability currently executing code segments
Basic Input/Output System (BIOS) - when switching on
- references by name, such as CS, DS, and Stack Pointer (SP) Register
the power it performs various check-outs and loads special
SS - 16-bit SP register provides an offset value, which,
systems data from disk into RAM
Segment Register - provides for addressing an area when associated with the SS register (SS:SP), refers
Two types of addressing schemes: of memory known as the current to the current word being processed in the stack
segment Base Pointer (BP) Register
1. absolute address - 16-bit facilities referencing parameters, which
- such as 04A26H is a 20-bit value that directly CS Register - contains the starting address of a
are data and addresses that a program passes via
references a specific location in memory program’s code segment
the stack
2. segment:offset address - this segment address, plus an offset
- combines the address in SS with the offset in BP
- combines the starting address of a segment with value in the Instruction Pointer (IP)
- can be also combined with DI and with SI as a
an offset value register, indicates the address of an
base register for special addressing
instruction to be fetched for execution
Segments - special areas defined in a program for DS Register - contains the starting address of a data General Purpose Register
containing the code, the data, and what is known segment - the 32-bit EAX, EBX, ECX, and EDX
as the stack - this address, plus an offset value in an - the rightmost 16 portions are AX, BX, CX, and DX
- it requires only as much space as the instruction, causes a reference to a AX (Accumulator) Register
program requires for its use, that is, data and specific byte location in the data segment - used for operations involving input/output and
instruction that process the data most arithmetic
Paragraph Boundary - begins the segment, that is, at a SS Register - permits the implementation of a stack in BX (Base) Register
location evenly divisible by 16, or hex 10 memory, which a program uses for temporary - the only general-purpose register that can be
storage of addresses and data used as an index to extend addressing
Three main segments: - this segment address, plus an offset - another common purpose is computations
value in the Stack Pointer (SP) register, indicates CX (Count) Register
1. Code Segment - contains the machine instructions
the current word in the stack being addressed - may contain a value to control the number of
2. Data Segment - contains a program’s defined data,
constants, and work areas times a loop is repeated or a value to shift bits left
ES (Extra Segment) Register - used by some string or right
3. Stack Segment - contains any data and addresses (character data) operations to handle memory - also used for many computations
that the program needs to save temporarily or for addressing DX (Data) Register
use by your own “called” subroutines - associated with the DI (Index) register
- some input/output operations require its use, - step through execution a single instruction at a 4. Predefined symbols (e.g. @Data, @Model)
and multiply and divide operations that involve time to examine its effect on registers and - return information to your program during the
large values assume the use of DX and AX together memory assembly
as a pair SF (sign)
Index Register - contains the resulting sign of an arithmetic Identifiers - a name that you apply to an item in your
- 32-bit ESI and EDI operation (0=positive and 1=negative) program that you expect to reference
- rightmost 16-bit portions are SI and DI ZF (zero)
- available for index addressing and for some use - indicates the result of an arithmetic or Two types of identifier:
in addition and subtraction comparison operation (0=nonzero and 1=zero
SI (Source Index) Register result) 1. Name (e.g. COUNTER)
- required for some string (character) handling AF (auxiliary) - refers to the address of a data item
operations - contains a carry out of bit 3 into bit 4 in an 2. Label (e.g. MAIN, B30)
- associated with the DS register arithmetic operation, for specialized arithmetic - refers to the address of an instruction,
DI (Destination Index) Register PF (parity)
procedure, or segment
- required for some string operations - indicates the number of 1-bits that result from an
- associated with the ES register operation
Flags Register - even number of bits causes so-called even parity Two types of statement:
- indicate the current status of the computer and and an odd number causes odd parity 1. instruction (e.g. MOV, ADD)
the results of processing CF (carry) - the assembler translates to object code
- instructions involving the comparison and - contains carries from a high-order (leftmost) bit 2. directives
arithmetic change the status of the flags, which following an arithmetic operation
- tell the assembler to perform a specific action,
some instructions may test to determine the - contains the contents of the last bit of a shift or
such as define a data item
subsequent action rotate operation
OF, SF, ZF, AND CF - for comparison and arithmetic
The common flag bits: operations
OF (overflow) DF - direction of string operations Label - the term applies to the name of an instruction
- indicates overflow of a high-order (leftmost) bit Hardware Interrupts
following arithmetic - causes the processor to suspend the current Operation - must be coded, is most commonly used for
DF (direction) operation and to act on the reason for the defining data areas and coding instructions
- determines the left or right direction for moving interruption  data item (e.g. DB, DW) - defines a field, work
or comparing string (character) data
IF (interrupt) area, or constant
RESERVED WORDS
- indicates that all external interrupts, such as  instruction (e.g. MOV, ADD) - indicates an action
keyboard entry, are to be processed or ignored 1. instructions (e.g. MOV, ADD) to perform
TF (trap) - operations that the computer can execute operand (if any)
- permits operation of the processor in single-step 2. directives (e.g. END, SEGMENT) - provides information for the operation to act on
mode - used to provide information to the assembler
3. operators (e.g. FAR, SIZE)
- used in expressions
MICROPROCESSOR

Program Memory - also known as Flash memory, houses


the instructions to be handled by the MCU.

- the program memory space is handled by a 13-bit


wide register known as the Program Counter (PC).

Stack - is associated with the PC. This stack stores the


current value of the PC when the program jumps
to a sub-routine or when an interrupt occurs.

Program bus - sends the instruction from the program


memory to the instruction register.

Instruction Register - stores the instruction currently being


executed or decoded.

- An instruction can be 12, 14 or 16 bit wide. An


instruction in assembly is divided into two parts:
opcode and constant

Instruction Pipelining - provides the capability of


overlapping the fetch and execute steps to increase
the speed at which the instructions are executed.

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